Performance of PV HgCdTe arrays for 1-14-µm applications

Recent developments in HgCdTe epitaxial-growth techniques and device-surface passivation resulted in major performance improvements of photovoltaic infrared detectors. By utilizing CdTe substrates, thin HgCdTe layers are grown from the liquid phase with any desired composition, thereby yielding detector material with peak sensitivity that can be adjusted for a wavelength from 1 to 14 µm. Two approaches for junction formation are reported; implanted homojunction and double-layer heterojunction. Detectivity limited by background radiation (BLIP) is reported. Theoretically predicted values ofR_{0}Aare measured for diodes designed to cover the 1-3-, 3-5-, and 8-14-µm bands. The frequency and junction-bias dependence of the dark noise current are characterized at a level of 5 × 10^-15A/Hz^1/2. It is shown that the device performance at any wavelength and temperature of interest can be described in terms of generation-recombination (G-R) and diffusion of minority-carrier current mechanisms.     

Sensitivity measurement of a 10.6-µm parametric upconverter

The sensitivity of a parametric upconverter for the detection of 10.6-µm radiation was measured. 10.6-µm radiation was mixed with the 1.06 µm beam of an Nd :YAG laser in properly oriented single-crystal proustite. The upconverted output at 0.967 µm was then detected by an S-1 photomultiplier tube. NEP of 1.1×10^-9W . s^½was measured.     

InGaAsP/InP 1.3-µm wavelength surface-emitting LED's for high-speed short-haul optical communication systems

Performance and reliability for InGaAsP/InP 1.3-µm wavelength high-speed surface-emitting DH light emitting diodes (LED's) have been investigated. High-speed and high-radiance performances were obtained by the optimal design of both structural parameters and LED driving circuit. Rise and fall times were both 350 ps and peak optical power coupled to a 50-µm core 0.20 NA graded-index fiber at the 100-mA pulse current was - 15.8 dBm with 6-dB optical ON/OFF ratio. A 2-Gbit/s non-return-to-zero (NRZ) pulse transmission over a 500-m span was carried out, Feasibility of using surface-emitting LED's in a high-speed optical communication system has been confirmed. Accelerated aging tests on high-speed LED's were carried out. The half-power lifetimes have been estimated to be more than 1 × 10⁸h at 50°C ambient temperature.     

Reduction of extrinsic base resistance in GaAs/AlGaAs heterojunction bipolar transistors and correlation with high-frequency performance

Improved high-frequency performance in GaAs/AlGaAs heterojunction bipolar transistors (HBT's) by reduction of extrinsic base resistance is demonstrated. A new self-aligned process which is very simple, yet capable of producing 0.25-µm emitter-to-base contact gaps, is described. By the use of AuBe, we have also been able to produce contact resistances to p-type GaAs (p = 5 × 10¹⁸) as low as 1.2 × 10^-7Ω.cm². This is the lowest value reported to p-type GaAs considering the relatively low doping levels used. By employing these techniques, we have produced HBT's with 2.5-µm-wide emitters having current gain cutoff frequencies fTthat appear to be greater than 35 GHz and maximum oscillation frequenciesf_{max}of 22 GHz.     

Three-phase GaAs Schottky-barrier CCD operated up to 100-MHz clock frequency

GaAs CCD's with 5-µm electrodes were fabricated using a process fully compatible to MESFET integrated circuits. The devices were operated at clock frequencies from 100 kHz to 100 MHz. The transfer inefficiency was found to be ≈ 1 × 10^-2in the frequency range from 100 kHz to 30 MHz. This is due to an incomplete charge transfer caused by interelectrode gaps larger than the layer thickness.     

Characteristics of a 1.2-µm CMOS technology fabricated on an RF-heated zone-melting recrystallized SOI

0.7-5-µm CMOSFET's were fabricated on SOI which was recrystallized using an RF-heated zone-melting recrystallization (RFZMR) method. The leakage currents of n-channel MOSFET's having gate lengths between 5- and 0.7-µm range between 10^-14and 10^-12A/µm and show no dependence on channel length. Those of the p-channel MOSFET's were 10^-14-10^-12A/µm when the gate lengths were longer than 1.2 µm, and increased when the gate lengths were shorter than 1.0 µm. The propagation delay time of the CMOSFET inverter was 0.13 ns per stage at a supply voltage of 3.5 V.     

Monolithic silicon mosaics for far-infrared imaging

Monolithic detector mosaics were constructed for image sensing at wavelengths from three to 30 µm. The mosaics use impurity photoconduction in silicon to sense infrared radiation. Operation in the 25 to 40°K temperature range is obtained with closed-cycle cooling. Photosensor elements, spaced on 32 mil centers, are formed by solid-state diffusion, and a junction diode is constructed in series with each photoresistor to reduce crosstalk. The integrated 30-by-30 mosaics have crossedX-Yelectrodes for direct-wire readout of picture elements. Performance of individual elements is described. At 25°K, a detectivity of 1 × 10⁸cm Hz^1/2/W per element is found using 10.6 µm CO2laser radiation. The quantum efficiency at 10.6 µm is about 7 percent, and the response time is observed to be less than 0.2 µs. Uniformity and crosstalk data on prototype arrays are presented, and the integration of these arrays with cryogenic amplifier and scanning circuits is discussed.     

Ga0.4In0.6As/Al0.55In0.45As pseudomorphic modulation-doped field-effect transistors

High-performance pseudomorphic Ga0.4In0.6As/ Al0.55In0.45As modulation-doped field-effect transistors (MODFET's) grown by MBE on InP have been fabricated and characterized. DC transconductances as high as 271, 227, and 197 mS/mm were obtained at 300K for 1.6-µm and 2.9-µm gate-length enhancement-mode and 2-µm depletion-mode devices, respectively. An average electron velocity as high as 2.36 × 10⁷cm/s has been inferred for the 1.6-µm devices, which is higher than previously reported values for 1-µm gate-length Ga0.47In0.53As/Al0.48In0.52As MODFET's. The higher bandgap Al0.55In0.45As pseudomorphic barrier also offers the advantages of a larger conduction-band discontinuity and a higher Schottky barrier height.     

Source—Drain contact resistance in CMOS with self-aligned TiSi2

The contact resistance between TiSi2and n⁺-p⁺source-drain in CMOS is studied for a variety of junction profiles and silicide thicknesses. It is shown that the measured contact resistance is consistent with the transmission-line model for electrically long contacts. The contact contribution to the total device series resistance can be significant if excessive silicon is consumed during silicide formation. Contact resistivities of 3 × 10^-7and 1 × 10^-6Ω . cm²can be obtained for 0.15-0.20-µm-deep arsenic and boron junctions, respectively, if the interface doping concentration is kept at 1 × 10²⁰/cm³. Furthermore, low-temperature measurements show that the contact resistivity is nearly constant from 300 to 77 K, as would be expected from a tunneling-dominated current transport at the TiSi2-n⁺and TiSi2-P⁺interfaces.     

Normally-off InGaAs junction field-effect transistor with InGaAs buffer layer

InGaAs junction field-effect transistors (JFET's) with 1-µm gate length were successfully fabricated with an n⁺-InGaAs active layer (8 × 10¹⁶cm^-3) and an undoped InGaAs buffer layer grown on semi-insulating InP:Fe substrate by liquid-phase epitaxy. The device showed good pinch-off behavior with a threshold voltage of 0.25 V, a low drain current of 1 µA at zero gate-source voltage, and a very high transconductance of 553 mS/mm at room temperature. This is one of the highest transconductance values ever reported for a 1-µm gate-length FET.     

Electrical properties of tellurium thin films

Semiconducting properties of evaporated tellurium thin films, in the thickness range of 100 to 400 Å, are studied and correlated with observed structural properties. It is found that less-than-monolayer gold films can act as nucleation sites and stimulate the growth of large crystallites in deposited Te films. The Au-nucleated Te films are preferentially oriented with the c axis in the substrate plane and have crystallite diameters ranging from 2 to 5 µm. Hall mobilities as high as 250 cm²/V ċ s are observed in 400-Å Au-nucleated films with 5-µm crystallites. These large-grain films exhibit a temperature dependence for mobility of the form µ ∼ T^3/2between 85°K and 250°K, while the carrier concentrations in the films do not change appreciably with temperature. Transconductances greater than 1000 µmhos are achieved for Au-nucleated Te thin-film transistors with 3-mil channels (operating with a saturated drain current of 1 mA). Several devices exhibit field-effect mobilities greater than 100 cm²/V ċ s, a value consistent with the observed Hall mobilities for similar films. Transconductance measurements indicate that Te thin-film transistor (TFT) instabilities result primarily from hole trapping at the Te-insulator interface. It is possible to alter the threshold voltage of Te TFTs by applying a gate bias at room temperature. Improved stability (changes in V0less than 50 mV in 1 h) is observed at 77°K. From the observed changes in threshold, a lower limit of the trapping-state density at the surface is inferred to be 5×10¹²traps/cm². The surface-state density at the Te-SiO interface is estimated to be less than 6×10¹²surface states/cm²ċ eV as determined from capacitance and conductance measurements.     

A silicon-thermopile-based infrared sensing array for use in automated manufacturing

This paper describes a new low-cost infrared detector array that has been realized using standard silicon MOS process technology and micromachining. This array uses thermopiles as infrared detecting elements and multiple layers of silicon oxide and silicon nitride for diaphragm windows measuring 0.4 mm × 0.7 mm × 1.3 µm. Each thermopile consists of 40 polysilicon-gold thermocouples. A high fill factor for this array structure has been achieved by using the boron etch-stop technique to provide 20-µm thick silicon support rims. The array shows a response time of less than 10 ms, a responsivity of 12 V/ W; and a broad-band input spectral sensitivity. The process is compatible with silicon MOS devices, and a 16 × 2 staggered array with on-chip multiplexers has been designed for applications in process monitoring. The array theoretically achieves an NETD of 0.9°C and an MRTD of 1.4°C at a spatial frequency of 0.2 Hz/mrad in a typical imaging system.     

Formation of TiN/TiSi2/p+-Si/n-Si by rapid thermal annealing (RTA) silicon implanted with boron through titanium

A low temperature method of fabricating conductive (3.5 Ω/ sq.) p⁺/n junction diodes possessing excellentI-Vcharacteristics with reverse-bias leakage less than -3 nA.cm^-2at -5 V is described. Single crystal n-type 〈100〉 Si is implanted with 60 keV¹¹B+through 0.028-µm thick sputtered Ti film. Rapid thermal annealing (RTA) in an N2ambient simultaneously forms a 0.36-µm deep p⁺/n junction and a 0.063-µm thick bilayer of TiN and TiSi2with a resistivity of 22 µΩ.cm. The electrical properties of these diodes are not degraded by annealing for 30 min at 500°C, suggesting that the outer layer of TiN is an effective diffusion barrier between TiSi2and Al.     

Limitations on injection efficiency in power devices

In this paper the mechanisms of bandgap narrowing, Shockley-Read-Hall (SRH) recombination, Auger recombination, and carrier-carrier and carrier-lattice scattering are included in an exact one-dimensional model of a bipolar transistor. The transistor is used as a vehicle for studying the relative importance of each of these phenomena in determining emitter efficiency in devices with emitter junction depths of 1 µm to 8 µm. It is shown that bandgap narrowing is the dominant influence for devices with shallow emitters of 2 µm or less and that SRH recombination dominates for emitter depths greater than 4 µm. Calculations are also presented showing the effects of the emitter surface concentration and high-level injection on the current gain for devices with emitter junction depths of 1 µm to 8 µm. It is shown that there is an optimum surface concentration of 5 × 10¹⁹cm^-3for the 1-µm emitter depth but no optimum under 10²¹cm^-3for devices with emitter depths greater than 4 µm.     

Monolithic microwave amplifiers formed by ion implantation into LEC gallium arsenide substrates

A fabrication procedure for broad-band monolithic power GaAs integrated circuits has been demonstrated which includes formation of via holes through the 100-µm-thick GaAs substrate. A selective implant of²⁹Si ions into the GaAs substrate is used to dope the FET channel region to 1.2 × 10¹⁷cm^-3. The ohmic contacts are AuGe/Ni/Pt and the gates are Ti/Pt/Au. A 1.5-µm-thick circuit pattern is achieved using metal rejection assited by chlorobenzene treatment of AZ1350J photoresist. Using undoped Czochralski wafers of GaAs pulled from a pyrolytic boron nitride crucible, integrated amplifiers have been produced which deliver 28 ± 0.7 dBm from 5.7 to 11 GHz. These chips are 2 mm × 4.75 mm × 0.1 mm thick.     

A novel voltage tuneable infrared spectrometer-detector

A novel voltage tuneable spectrometer-detector has been demonstrated whose principles are associated with the electric subbands existent at the interface between silicon and silicon dioxide. The photoresistive response of n-channel MOSFET structures to radiation resonant with energy levels in the inversion layer has been characterized and compared with existent theory. Operating at 4.2 K, typical devices have continuous tuneability from 8 MeV (∼150 µm) to 30 MeV (∼40 µm), a bandwidth of approximately 1 MeV, a response time of 2.5 × 10^-4s, and a noise equivalent power (NEP) of approximately 2.5 × 10^-10W/(Hz)^1/2limited by the available amplifiers.     

Utilization of NiSi2as an interconnect material for VLSI

The applicability of NiSi2as an interconnect material was investigated using narrow (5 µm- × 2600-µm) lines. 2500-Å-thick silicide lines were thermally oxidized to form a passivation layer of SiO2for the next metallization level. Isolation of more than 50 V for 2200-Å SiO2is achieved. The interconnect resistivity following the oxidation is 1.2-1.4 Ω. The maximum current capability of the lines was found to be > 5 × 10⁶A/cm²and their stability under prolonged high current densities was demonstrated. We propose a scheme to increase the local metallization-level density using NiSi2as an interconnect.     

Germanium reachthrough avalanche photodiodes for optical communication systems at 1.55-µm wavelength region

Germanium reachthrough avalanche photodiodes (Ge RAPD's) with high-frequency response have been designed, fabricated, and tested. In the calculation of frequency response, optimum depletion layer width of 21 µm has been found for 1.55-µm wavelength with the highest cutoff frequency of 830 MHz. The diodes fabricated by this design showed frequency degradation of less than 2 dB at 500 MHz and at 1.55 µm. This response has been unchanged up to 1.58 µm, indicating useful spectral limit lies at more than 1.58 µm. The diodes exhibited quantum efficiency of 80 percent and excess noise factor of 6.1 at a multiplication of 10 both for 1.55 µm. The breakdown voltage was 60- 90 v. The sensitivity of the diodes was measured at 100 Mb/s and 1.55 µm. The minimum detectable power of -44.3 dBm which is by 5.2 dB better than the conventional p⁺-n Ge APD has been achieved for 10^-11error rate. Comparison with InGaAs APD and p-i-n/FET receiver has been made by calculating minimum detectable power of RAPD at 500 Mb/s. Calculated sensitivity of RAPD is 1-2 dB worse than InGaAS APD and comparable to that of InGaAs p-i-n/FET receiver estimated from the reported experimental results.     

Submicrometer fully self-aligned AlGaAs/GaAs Heterojunction bipolar transistor

A novel submicrometer fully self-aligned AlGaAs/GaAs heterojunction bipolar transistor (HBT) for reducing parasitic capacitances and resistances is proposed. The fabrication process utilizes SiO2sidewalls for defining base electrode width and separating this electrode from both emitter and collector electrodes. Measured common-emitter current gain β for a fabricated HBT with 0.6 × 10-µm²emitter dimension and 0.7 × 10-µm²× 2 base dimension is 26 at 9 × 10⁴-A/cm²collector current density.     

A polysilicon—Silicon n-p junction

Phosphorus-doped polycrystalline silicon is grown in an epitaxial reactor by the reduction of a hydrogen-diluted silane-phosphine mixture passing over a substrate heated to 800°C. The influence of the phosphine-silane ratio on growth rate, electrical resistivity, active donor concentration, and Hall mobility is examined. It is found that phosphine inhibits growth rate at 800°C to a lesser degree than it does at lower growth temperatures. Growth rate progressively drops to 0.6 of the undoped value as the phosphine-silane ratio is increased to 10^-1. Resistivity drops from 1 to 10^-3Ω. cm as active phosphorus concentration varies between 10¹⁸and 4 × 10²⁰cm^-3, while Hall mobility rises from 4 to 30 cm²/ V.s. Diodes are formed between the grown polysilicon layers and the single-crystal p-type silicon substrates. They are found to have recombination currents critically dependent on the phosphine/ silane ratio during growth of the polysilicon. As this ratio increases above 10^-5, recombination decreases, while mobility in the polysilicon increases. These results support the "dopant segregation" theory of conduction in polysilicon. For ratios of 10^-3to 10^-2the diodes obtained showed a recombination factor approaching those of diffused diodes and are useful devices, for example, as the emitter-base junction of a shallow-base high-frequency, bipolar transistor.