Comparison of Solid-State Microwave Annealing with Conventional Furnace Annealing of Ion-Implanted SiC

Rapid solid-state microwave annealing was performed for the first time on N⁺-, Al⁺-, and B⁺-implanted SiC, and the results were compared with the conventional furnace annealing. For microwave annealing, temperatures up to 2,000 °C were attained with heating rates exceeding 600 °C/s. An 1,850 °C/35 s microwave anneal yielded a root-mean-square (RMS) surface roughness of 2 nm, which is lower than the 6 nm obtained for 1,500 °C/15 min conventional furnace annealing. For the Al implants, a minimum room-temperature sheet resistance (R _s ) of 7 kΩ/□ was measured upon microwave annealing. For the microwave annealing, Rutherford backscattering (RBS) measurements indicated a better structural quality, and secondary-ion-mass-spectrometry (SIMS) boron implant depth profiles showed reduced boron redistribution compared to the corresponding results of the furnace annealing.     

Hot-implantation of nitrogen donors into p- type α-SiC and characterization of n+-p junction

N⁺ implantation into p-type a-SiC (6H-SiC, 4H-SiC) epilayers at elevated temperatures was investigated and compared with implantation at room temperature (RT). When the implant dose exceeded 4 × 10₁₅ cm₋₂, a complete amorphous layer was formed in RT implantation and severe damage remained even after post implantation annealing at 1500°C. By employing hot implantation at 500~800°C, the formation of a complete amorphous layer was suppressed and the residual damage after annealing was significantly reduced. For implant doses higher than 10¹⁵ cm⁻², the sheet resistance of implanted layers was much reduced by hot implantation. The lowest sheet resistance of 542Ω/ was obtained by implantation at 500 ~ 800°C with a 4 × 10¹⁵ cm⁻² dose. Characterization of n⁺-p junctions fabricated by N⁺ implantation into p-type epilayers was carried out in detail. The net doping concentration in the region close to the junction showed a linearly graded profile. The forward current was clearly divided into two components of diffusion and recombination. A high breakdown voltage of 615 ∼ 810V, that is almost an ideal value, was obtained, even if the implant dose exceeded 10¹⁵ cm⁻². By employing hot implantation at 800°C, the reverse leakage current was significantly reduced.     

Rapid thermal annealing of dual Si and P implants in InP

In this study we evaluate the effects of dual implantation with different doses of Si and P on dopant activation efficiency and carrier mobility in InP:Fe. The implants were activated by a rapid thermal annealing step carried out in an optimized phosphoruscontaining ambient. For high dose implants (10¹⁴–10¹⁵ cm⁻²), which are typically employed for source/drain regions in FETs, dual implantation of equal doses of Si and P results in a higher sheet carrier concentration and lower sheet resistance. For 10¹⁴ cm⁻² Si implants at 150 keV, the optimal P co-implant dose is equal to the Si dose for most anneal temperatures. We obtain an activation efficiency of ∼70% for dual implanted samples annealed at 850° C for 10 sec. The high activation efficiencies and low sheet resistances obtained in this study emphasize the importance of stoichiometry control through the use of P co-implants and a phosphorus-containing ambient during the thermal processing of InP.     

Buried-guarded layer ion-implanted resistors

Megohm silicon monolithic resistors have been fabricated with sheet resistances up to 120 kΩ/□ using an implanted p-layer resistor which is buried under an implanted n-guard layer. The n-guard layer protects against slice-to-slice variations of the fixed surface charge, and was made using phosphorus doses and energy of 1.5-5 × 10¹²/cm²and 30 keV. Resistors have been fabricated up to 20 MΩ; sheet resistances were in the range of 7-120 kΩ/□ using boron doses and energies of 1-3 × 10^:12/cm²and 30-300 keV. The sheet resistance, voltage dependence of resistance, temperature coefficients, junction leakage, and parasitic capacitance have been measured for different implantation parameters. This process has been used to fabricate two matched 8-MΩ resistors for use in a high input impedance differential preamplifier integrated circuit. A match of 2 percent and a magnitude tolerance of ±10 percent has been achieved. The temperature coefficient of resistance (TCR) is about 4000 ppm/°C and tracks within 400 ppm/ °C. These resistors are linear up to ∼1 V, about 50 times higher bias voltage than required in the application. The structure and fabrication are compatible with present monolithic silicon integrated circuit processing.     

Structural and electrical properties of stable ni/cr thin films

The electrical and structural properties of nickel-chrome (NiCr) thin film resistors were studied for the effect of post-deposition annealing on stability. The temperature coefficient of resistance (TCR) of sheet resistivities in the range of 100 to 200 Ω/□ could be improved by both air and vacuum annealing to achieve 5 ± 5 ppm/°C over the temperature range of -180° C to +100° C. With stability tests, air annealing proved to be more favorable for stable TCR. Studies via SIMS and ESCA identified surface segregation of Cr whereas TEM micrographs revealed correlating structural transformation of the films upon annealing. An intentional impurity, Si, played an important role in achieving a low TCR.     

P-type doping of GaAs by carbon implantation

The electrical properties of C-implanted <100> GaAs have been studied following rapid thermal annealing at temperatures in the range from 750 to 950°C. This includes dopant profiling using differential Hall measurements. The maximum p-type activation efficiency was found to be a function of C-dose and annealing temperature, with the optimum annealing temperature varying from 900°C for C doses of 5 × 10¹³ cm⁻² to 800°C for doses ≥5 × 10¹⁴cm⁻². For low dose implants, the net p-type activation efficiency was as high as 75%; while for the highest dose implants, it dropped to as low as 0.5%. Moreover, for these high-dose samples, 5 × 10¹⁵ cm⁻², the activation efficiency was found to decrease with increasing annealing temperature, for temperatures above ∼800°C, and the net hole concentration fell below that of samples implanted to lower doses. This issue is discussed in terms of the amphoteric doping behavior of C in GaAs. Hole mobilities showed little dependence on annealing temperature but decreased with increasing implant dose, ranging from ∼100 cm²/V·s for low dose implants, to ∼65 cm²/V·s for high dose samples. These mobility values are the same or higher than those for Be-, Zn-, or Cd-implanted GaAs.     

Phosphorus implantation into 4H-silicon carbide

Sheet resistances in nitrogen- and phosphorus-implanted 4H-SiC are measured to assess the time and temperature dependencies of this variable. In 4H-SiC implanted with 3 × 10¹⁵ cm^?2 nitrogen ions to a depth of 2800 Å, the minimum sheet resistance observed is 534 Ω/□. The minimum sheet resistance in 4H-SiC implanted with 4 × 10¹⁵ cm^?2 phosphorus ions to a depth of 4000 Å is 51 Ω/□, a record low value for any implanted element into any polytype of SiC. Time-independent sheet resistances are observed following anneals at 1700°C for nitrogen and phosphorus samples. Lower temperature anneals produce sheet resistances which decrease monotonically with increasing time of anneal. Overall, sheet resistances from phosphorus-implanted 4H-SiC are an order of magnitude below those measured from nitrogen implanted samples. The response of phosphorus to low-temperature annealing is significant, and sheet resistances below 500 Ω/□ are achieved at 1200°C. Activation of phosphorus is attempted in an oxidizing atmosphere with and without prior argon annealing. A three-hour gate oxidation in wet O₂ at 1150°C, followed by a 30 min argon anneal, produced a sheet resistance of 1081 Ω/□. Oxidation after argon annealing caused sheet resistances to increase by about 20% compared to samples subjected solely to argon annealing. It is also found that oxide growth rates are much higher over phosphorus implanted than over unimplanted 4H-SiC. Reasons for the disparity in sheet resistances between nitrogen and phosphorus implants, and for the difference in oxide growth rates are suggested.     

Fe and Ti implants in In0.52Al0.48As

Single (200 keV) and multiple energy Fe implants in n-type and Ti implants in p-type material were performed in In_0.52Al_0.48As at both room temperature and 200°C. For the Fe implants, the secondary ion mass spectrometry profiles showed a severe out-diffusion for all rapid thermal annealing schemes used, independent of the implantation temperature. The Fe implant peaks observed after annealing, at 0.8Rp, Rp+ΔRp and 2Rp (where Rp and ΔRp are range and straggle, respectively) depth locations in other In-based compounds like InP and InGaAs were not observed here. On the contrary, Ti implants showed only a slight in- and out-diffusion for both room temperature and 200°C implants as in the case of InP and InGaAs. The Rutherford backscattering measurements on the annealed samples implanted at 200°C showed a crystal quality similar to that of the virgin material. The resistivity of all the samples after annealing was higher than 10⁶ Ω-cm.     

Electrical properties of He+ ion-implanted GaInP

The electrical properties of high resistivity GaInP layers produced by He⁺ ion implantation have been studied. Thick high-resistivity layers (ρ > 10⁷ Ω-cm) were obtained using multi-energy implants (80 keV, 120 keV, and 150 keV). Current-voltage (I-V) measurements of mesa diodes with two ohmic contacts indicate that in the temperature range from 200 to 300K, the dominant current flow mechanism in both n-type and p-type implanted materials is Poole-Frenkel emission, especially in the range of high electric field (>10⁵ V/cm). The thermal activation energy E_a and the potential barrier height Φ_o of the generated deep levels are 0.16±0.005 eV and 0.33±0.005 eV, respectively. At low temperature, the hopping current dominates at low and moderate applied electric fields, and the I-V curves show an ohmic characteristic. The high-temperature annealing behavior of the implanted GaInP indicates that the compensation of free carriers in the material is dominated by damage-related levels, which are annealed out at high temperatures. In regard to typical alloying cycles of metal contacts in device fabrication, it is worth noting that the resistivity is still as high as 2 × 10⁸ Ω-cm for n-type samples (5 × 10⁷ Ω-cm for p-type) after 350°C annealing, which suggests that multi-energy He⁺ implantation is suitable for implant isolation in the GaInP device technology.     

Thermal Stability of Nitride-Based Diffusion Barriers for Ohmic Contacts to <Emphasis Type="Italic">n</Emphasis>-GaN

The use of TaN, TiN, and ZrN diffusion barriers for Ti/Al-based contacts on n-GaN (n ∼ 3 × 10¹⁷ cm⁻³) is reported. The annealing temperature (600–1,000°C) dependence of the Ohmic contact characteristics using a Ti/Al/X/Ti/Au metallization scheme, where X is TaN, TiN, or ZrN, deposited by sputtering was investigated by contact resistance measurements and Auger electron spectroscopy (AES). The as-deposited contacts were rectifying and transitioned to Ohmic behavior for annealing at ≥600°C. A minimum specific contact resistivity of ∼6 × 10⁻⁵ Ω-cm⁻² was obtained after annealing over a broad range of temperatures (600–900°C for 60 s), comparable to that achieved using a conventional Ti/Al/Pt/Au scheme on the same samples. The contact morphology became considerably rougher at the high end of the annealing range. The long-term reliability of the contacts at 350°C was examined; each contact structure showed an increase in contact resistance by a factor of three to four over 24 days at 350°C in air. AES profiling showed that the aging had little effect on the contact structure of the nitride stacks.     

High-Dose Phosphorus-Implanted 4H-SiC: Microwave and Conventional Post-Implantation Annealing at Temperatures ≥1700°C

Semi-insulating 4H-SiC ⟨0001⟩ wafers have been phosphorus ion implanted at 500°C to obtain phosphorus box depth profiles with dopant concentration from 5 × 10¹⁹ cm⁻³ to 8 × 10²⁰ cm⁻³. These samples have been annealed by microwave and conventional inductively heated systems in the temperature range 1700°C to 2050°C. Resistivity, Hall electron density, and Hall mobility of the phosphorus-implanted and annealed 4H-SiC layers have been measured in the temperature range from room temperature to 450°C. The high-resolution x-ray diffraction and rocking curve of both virgin and processed 4H-SiC samples have been analyzed to obtain the sample crystal quality up to about 3 μm depth from the wafer surface. For both increasing implanted phosphorus concentration and increasing post-implantation annealing temperature the implanted material resistivity decreases to an asymptotic value of about 1.5 × 10⁻³ Ω cm. Increasing the implanted phosphorus concentration and post-implantation annealing temperature beyond 4 × 10²⁰ cm⁻³ and 2000°C, respectively, does not bring any apparent benefit with respect to the minimum obtainable resistivity. Sheet resistance and sheet electron density increase with increasing measurement temperature. Electron density saturates at 1.5 × 10²⁰ cm⁻³ for implanted phosphorus plateau values ≥4 × 10²⁰ cm⁻³, irrespective of the post-implantation annealing method. Implantation produces an increase of the lattice parameter in the bulk 4H-SiC underneath the phosphorus-implanted layer. Microwave and conventional annealing produce a further increase of the lattice parameter in such a depth region and an equivalent recovered lattice in the phosphorus-implanted layers.     

Activation of silicon ion-implanted gallium nitride by furnace annealing

Ion implantation into III–V nitride materials is animportant technology for high-power and high-temperature digital and monolithic microwave integrated circuits. We report the results of the electrical, optical, and surface morphology of Si ion-implanted GaN films using furnace annealing. We demonstrate high sheet-carrier densities for relatively low-dose (n_atoms=5×10¹⁴ cm⁻²) Si implants into AlN/GaN/sapphire heteroepitaxial films. The samples that were annealed at 1150°C in N₂ for 5 min exhibited a smooth surface morphology and a sheet electron concentration n_s ∼9.0×10¹³ cm⁻², corresponding to an estimated 19% electrical activation and a 38% Si donor activation in GaN films grown on sapphire substrates. Variable-temperature Hall-effect measurem entsindicate a Si donor ionization energy ∼15 meV.     

Growth and doping of SiC-thin films on low-stress,amorphous Si<Subscript>3</Subscript>N<Subscript>4</Subscript>/Si substrates for robust microelectromechanical systems applications

The N₂-doped 3C-SiC thin films have been grown by low-pressure, chemical vapor deposition (LPCVD) on amorphous Si₃N₄/p-Si (111) substrates using the single, organosilane-precursor trimethylsilane [(CH₃)₃SiH]. The effects of N₂ flow rate and growth temperature on the electrical properties of SiC films were investigated by Hall-effect measurements. The electron-carrier concentration is between 10¹⁷–10¹⁸/cm³. The lowest resistivities at 400 K and 300 K are 1.12×10⁻² and 1.18×10⁻¹ cm, respectively. The corresponding sheet resistances are 75.02 Ω/□ and 790.36 Ω/□. The SiC film structure was studied by x-ray diffraction. The 3C-SiC films oriented in the 〈111〉 direction with a 2ϑ peak at 35.5° and line widths between 0.18–0.25° were obtained. The SiC/Si₃N₄ interface is very smooth and free of voids. The fabrication of microelectromechanical (MEMS) structures incorporating the SiC films is discussed.     

Ta/Au ohmic contacts to n-type ZnO

Ta/Au ohmic contacts are fabricated on n-type ZnO (∼1 × 10¹⁷ cm⁻³) epilayers, which were grown on R-plane sapphire substrates by metal organic chemical vapor deposition (MOCVD). After growth and metallization, the samples are annealed at 300°C and 500°C for 30 sec in nitrogen ambient. The specific contact resistance is measured to be 3.2×10⁻⁴ Ωcm² for the as-deposited samples. It reduces to 5.4×10⁻⁶ Ωcm² after annealing at 300°C for 30 sec without significant surface morphology degradation. When the sample is annealed at 500°C for 30 sec, the specific contact resistance increases to 3.3 × 10⁻⁵ Ωcm². The layer structures no longer exist due to strong Au and Ta in-diffusion and O out-diffusion. The contact surface becomes rough and textured.     

Very low resistance ohmic contacts to n-GaN

Ohmic contacts with low resistance are fabricated on n-GaN films using Al/Ti bilayer metallization. GaN films used are 0.3 μm thick layers with carrier concentrations of 1 × 10¹⁹ cm⁻³ grown on the c-plane sapphire by ion-removed electron cyclotron resonance molecular beam epitaxy. The lowest value for the specific contact resistivity (ρ_c) of 1.2×10⁻⁸ Ω·cm² was obtained with furnace annealing at 500°C for 60 min. This result shows the effectiveness of high carrier concentration GaN layers and the low temperature annealing for the realization of low resistance ohmic contacts. Sputtering Auger electron spectroscopy analysis reveals that Al diffuses into Ti layer and comes into contact with the GaN surface.     

Sheet resistance variations of phosphorus implanted silicon at elevated temperatures

Silicon has been implanted to high doses (2 × 10¹⁵–2 × 10¹⁶ ions cm^?2) with 40 keVP⁺ at constant temperatures in the range 20–300°C. The sheet resistance following implantation is shown to have a break point at 167°C in its temperature variation characteristic. It is suggested that sheet resistance variations result from changes in the depth of the amorphous layer formed during implantation. A dose rate effect has also been observed. The behaviour correlates with the variations which have been observed on colour-banded wafers. It is also demonstrated that small temperature rises during implantation can result in significant variations in the sheet resistance, even after high temperature annealing.     

Electrical characterization of heavily doped polycrystalline silicon for high-frequency bipolar transistor application

Electrical conduction data from heavily doped p-type polysilicon thin films at room temperature and above are presented. Specifically, the sheet resistance, in the range from 1 kΩ/□ to 100 Ω/□ for a doping level of 10¹⁹cm^-3to 10²⁰cm^-3, is characterized over temperatures from 300 to 450 K. It is shown that the polysilicon resistivity, larger than the corresponding crystalline value by a factor ∼ 10, is flat over the entire temperature range used for measurement. This large resistivity is correlated to the degree of dopant activation and the mobility in polysiUcon. The measured mobility varying from 8 to 20 cm²/V . s is shown to be smaller than the crystalline mobility at the same doping level by a factor 7 ∼ 3. These data are comprehensively discussed and quantified, based on a distributed resistivity model.     

Mo- and Ti-silicided low-resistance shallow junctions formed using the ion implantation through metal technique

Mo-and Ti-silicided junctions were formed using the ITM technique, which consists of ion implantation through metal (ITM) to induce metal-Si interface mixing and subsequent thermal annealing. Double ion implantation, using nondopant ions (Si or Ar) implantation for the metal-Si interface mixing and dopant ion (As or B) implantation for doping, has resulted in ultrashallow ( ≤ 0.1-µm) p⁺-n or n⁺-p junctions with ∼30-Ω sheet resistance for Mo-silicided junctions and ∼5.5-Ω sheet resistance for Ti-silicided junctions. The leakage current levels for the Mo-silicided n⁺-p junctions (0.1-µm junction depth) and the Mo-silicided p⁺-n junction (0.16-µm junction depth) are comparable to that for unsilicided n⁺-p junction with greater junction depth ( ∼0.25 µm).     

Lateral schottky GaN rectifiers formed by Si<Superscript>+</Superscript> ion implantation

Type conversion of p-GaN by direct Si⁺ ion implantation and subsequent annealing was demonstrated by the fabrication of lateral Schottky diodes. The Si⁺ activation percentage was measured as a function of annealing time (30–300 sec) and temperature (1,000–1,200°C), reaching a maximum of ∼30% for 1,200°C, 2-min anneals. The resulting n-type carrier concentration was 1.1×10¹⁸ cm⁻³ for a moderate Si⁺ ion dose of ∼2×10¹⁴ cm⁻². The lateral Schottky diodes displayed a negative temperature coefficient of −0.15 V·K for reverse breakdown voltage.     

Low resistance bilayer Nd/Al ohmic contacts on n-type GaN

A bilayer Nd/Al metallization structure has been deposited onto low pressure organometallic vapor phase epitaxy grown n-type GaN ( 1 × 10¹⁸ cm⁻³) by electron-beam evaporation. Ohmic metal contacts were patterned photolithographically for standard transmission line measurement, and then thermally annealed at temperatures ranging from 200 to 350°C and from 500 to 650°C using conventional thermal annealing (CTA) and rapid thermal annealing (RTA), respectively. The lowest values for the specify contact resistivity of 9.8 × 10⁻⁶ Ω−cm² and 8 × 10⁻⁶ Ω−cm² were obtained using Nd/Al metallization with CTA of 250°C for 5 min and RTA of 600°C for 30 s. Examination of the surface morphology using atomic force microscopy as a function of annealing temperature revealed that the surface roughness was strongly influenced by conventional thermal annealing, it was smooth in the temperature range from 550 to 650°C for rapid thermal annealing. Auger electron spectroscopy depth profiling was employed to investigate the metallurgy and interdiffusion of contact formation.