Atomic-layer-deposited Al2O3 and HfO2 on GaN: A comparative study on interfaces and electrical characteristics

Al₂O₃, HfO₂, and composite HfO₂/Al₂O₃ films were deposited on n-type GaN using atomic layer deposition (ALD). The interfacial layer of GaON and HfON was observed between HfO₂ and GaN, whereas the absence of an interfacial layer at Al₂O₃/GaN was confirmed using X-ray photoelectron spectroscopy and transmission electron microscopy. The dielectric constants of Al₂O₃, HfO₂, and composite HfO₂/Al₂O₃ calculated from the C-V measurement are 9, 16.5, and 13.8, respectively. The Al₂O₃ employed as a template in the composite structure has suppressed the interfacial layer formation during the subsequent ALD-HfO₂ and effectively reduced the gate leakage current. While the dielectric constant of the composite HfO₂/Al₂O₃ film is lower than that of HfO₂, the composite structure provides sharp oxide/GaN interface without interfacial layer, leading to better electrical properties.     

采用ALD Al2O3作为栅介质的薄势垒增强型AlGaN/GaN MIS-HEMT

本文报道了高性能的增强型（E-mode）氮化镓（GaN）基金属-绝缘体-半导体高电子迁移率晶体管（MIS-HEMT）,该器件势垒层为5-nm厚的铝镓氮（Al0.3Ga0.7N）,并采用氮化硅（SiN）钝化来控制二维电子气（2DEG）密度。与SiN钝化不同,采用原子层淀积（ALD）技术生长的氧化铝（Al2O3）不会增强异质结中的2DEG密度。刻蚀栅区的SiN介质可以耗尽沟道电子,之后采用ALD Al2O3作为栅介质,可以实现MIS结构。栅长为1 μm的E-mode MIS-HEMT具有657mA/mm的最大饱和电流（IDS）、187mS/mm的最大跨导（gm）和1V的阈值电压（Vth）。与相应的E-mode HEMT对比,由于Al2O3栅介质的引入,使器件的性能得到了很大的提升。本文对于同时实现高的Vth和IDS提供了很好的方法。     

插层Al2O3对氧化铪基忆阻器的性能优化及多值特性研究

近年来,氧化铪基忆阻器因其优异的阻变性能及与CMOS工艺兼容等特点而被广泛研究。然而,氧化铪基忆阻器仍存在以下问题:1) 器件良率、可靠性、均一性不足;2) Set和Reset 过程中电流突变,导致多值特性较差。为实现氧化铪基忆阻器的性能优化及多值特性,文章在HfO₂表面生长一层1~5 nm Al₂O₃,构造Al₂O₃/HfO₂双介质层忆阻器,并对HfO₂和Al₂O₃的厚度进行优化,最终得到性能显著提升的Al₂O₃/HfO₂双介质层多值忆阻器。该器件呈现出保持性良好的10个不同电阻态(1×10⁴ s@85℃)。由于氧离子在Al₂O₃层的迁移率更低,限制了氧空位细丝生长速率及宽度,且Al₂O₃具有热增强作用,使氧空位分布更均匀,促使氧空位细丝生成/断裂过程由突变转为渐变。该工作为进一步实现氧化铪基忆阻器的性能优化及多值特性提供了参考。     

Charge trapping and interface characteristics in normally-off Al2O3/GaN-MOSFETs

Normally-off GaN-MOSFETs with Al₂O₃ gate dielectric have been fabricated and characterized. The Al₂O₃ layer is deposited by ALD and annealed under various temperatures. The saturation drain current of 330 mA/mm and the maximum transconductance of 32 mS/mm in the saturation region are not significantly modified after annealing. The subthreshold slope and the low-field mobility value are improved from 642 to 347 mV/dec and from 50 to 55 cm² V⁻¹ s⁻¹, respectively. The I_D-V_G curve shows hysteresis due to oxide trapped charge in the Al₂O₃ before annealing. The amount of hysteresis reduces with the increase of annealing temperature up to 750 °C. The Al₂O₃ layer starts to crystallize at a temperature of 850 °C and its insulating property deteriorates.     

Analysis of interface trap density of metal-oxide-semiconductor devices with Pr2O3 gate dielectric using conductance method

In this study, the interface trap density of metal-oxide-semiconductor (MOS) devices with Pr₂O₃ gate dielectric deposited on Si is determined by using a conductance method. In order to determine the exact value of the interface trap density, the series resistance is estimated directly from the impedance spectra of the MOS devices. Subsequently, the dispersion characteristics are numerically analyzed on the basis of a statistical model. Lastly, the process-dependent interface trap density of Pr₂O₃ is evaluated. It is concluded that high-pressure annealing and a superior quality interfacial SiO₂ layer are of crucial importance for achieving a sufficiently low interface trap density.     

用于GaAs射频集成电路的不同厚度氧化铝MIM 电容的研究

本文研究了不同厚度的氧化铝对MIM电容直流和射频特性的影响。在1MHz下,对于20nm氧化铝MIM电容,其拥有3850 pF/mm₂的高电容密度和可接受的681 ppm/V₂的VCC-α电压系数。1MHz时突出的74 ppm/V₂VCC-α电压系数,8.2GHz谐振频率以及2GHz时41的Q值可以从100nm氧化铝MIM电容获得。采用GaAs工艺以及原子层淀积制造的高性能ALD氧化铝MIM电容很有可能成为GaAs射频集成电路很有前景的候选器件。     

不同深宽比GaAs衬底的Al22O3/HfO2复合薄膜材料原子层沉积及能谱分析

利用热原子层沉积（Atomic Layer Deposition, ALD）技术在不同深宽比GaAs衬底上进行了Al2₂O₃/HfO₂复合薄膜的沉积。通过对其表面和能谱进行分析发现,沉积温度对复合薄膜的摩尔比具有较大的影响。随着深宽比的增大,其沉积表面和沟槽内会出现残留物;随着ALD沉积温度的上升,其沉积表面和沟槽内的残留物减少,摩尔比趋向均匀。当深宽比为2.2并利用150 ℃的低沉积温度时,表面及底面基本无残留物。但当深宽比为4.25时,150 ℃沉积明显有大量残留物。只有当温度升高到300 ℃时,表面和沟槽里复合薄膜的残留物才被明显消除。ALD技术可以实现各种器件结构的全方位钝化,这是其他化学气相沉积法无法比拟的。     

Physical and electrical characterization of polysilicon vs. TiN gate electrodes for HfO2 transistors

The effects of pre-deposition substrate treatments and gate electrode materials on the properties and performance of high-k gate dielectric transistors were investigated. The performance of O₃ vs. HF-last/NH₃ pre-deposition treatments followed by either polysilicon (poly-Si) or TiN gate electrodes was systematically studied in devices consisting of HfO₂ gate dielectric produced by atomic layer deposition (ALD). High-angle annular dark field scanning transmission electron microscopy (HAADF-STEM) using X-ray spectra and Electron Energy Loss Spectra (EELS) were used to produce elemental profiles of nitrogen, oxygen, silicon, titanium, and hafnium to provide interfacial chemical information and to convey their changes in concentration across these high-k transistor gate-stacks of 1.0–1.8 nm equivalent oxide thickness (EOT). For the TiN electrode case, EELS spectra illustrate interfacial elemental overlap on a scale comparable to the HfO₂ microroughness. For the poly-Si electrode, an amorphous reaction region exists at the HfO₂/poly-Si interface. Using fast transient single pulse (SP) electrical measurements, electron trapping was found to be greater with poly-Si electrode devices, as compared to TiN. This may be rationalized as a result of a higher density of trap centers induced by the high-k/poly-Si material interactions and may be related to increased physical thickness of the dielectric film, as illustrated by HAADF-STEM images, and may also derive from the approximately 0.5 nm larger EOT associated with polysilicon electrodes on otherwise identical gate stacks.     

Ultrathin HfO2 gate dielectrics on partially strain compensated SiGeC/Si heterostructure

Ultrathin HfO₂ gate dielectrics have been deposited on strain-compensated Si_0.69Ge_0.3C_0.01 layers by rf magnetron sputtering. X-ray diffraction spectra show the films to be polycrystalline having both monoclinic and tetragonal phases. The formation of an interfacial layer has been observed by high-resolution transmission electron microscopy. Secondary ion mass spectroscopy and Auger electron spectroscopy analyses show the formation of an amorphous Hf-silicate interfacial layer between the deposited oxide and SiGeC films. The average concentration of Ge at the interfacial layer is found to be 2–3 at%. The leakage current density of HfO₂ gate dielectrics is found to be several orders of magnitude lower than that reported for thermal SiO₂ with the same equivalent thickness.     

AlGaN/GaN metal-oxide semiconductor heterostructure field-effect transistor with photo-chemical-vapor deposition SiO<Subscript>2</Subscript> gate oxide

High-quality SiO₂ was successfully deposited onto GaN by photo-chemicalvapor deposition (photo-CVD) using a D₂ lamp as the excitation source. The AlGaN/GaN metal-oxide semiconductor, heterostructure field-effect transistors (MOSHFETs) were also fabricated with photo-CVD oxide as the insulating layer. Compared with AlGaN/GaN metal-semiconductor HFETs (MESHFETs) with similar structure, we found that we could reduce the gate-leakage current by more than four orders of magnitude by inserting the photo-CVD oxide layer in between the AlGaN/GaN and the gate metal. With a 2-μm gate, it was found that the saturated I_ds, maximum g_m, and gate-voltage swing (GVS) of the fabricated nitride-based MOSHFET were 512 mA/mm, 90.7 mS/mm, and 6 V, respectively.     

Drain current enhancement and negligible current collapse in GaN MOSFETs with atomic-layer-deposited HfO2 as a gate dielectric

Accumulation-type GaN metal-oxide-semiconductor field-effect-transistors (MOSFET’s) with atomic-layer-deposited HfO₂ gate dielectrics have been fabricated; a 4 μm gate-length device with a gate dielectric of 14.8 nm in thickness (an equivalent SiO₂ thickness of 3.8 nm) gave a drain current of 230 mA/mm and a broad maximum transconductance of 31 mS/mm. Owing to a low interfacial density of states (D_it) at the HfO₂/GaN interface, more than two third of the drain currents come from accumulation, in contrast to those of Schottky-gate GaN devices. The device also showed negligible current collapse in a wide range of bias voltages, again due to the low D_it, which effectively passivate the surface states located in the gate-drain access region. Moreover, the device demonstrated a larger forward gate bias of +6 V with a much lower gate leakage current.     

Effect of RuO2 electrode on laser-MBE prepared HfO2 gate dielectrics

In this paper, we report our recent study of the effect of RuO₂ as an alternative top electrode for pMOS devices to overcome the serious problems of polysilicon (poly-Si) gate depletion, high gate resistance and dopant penetration in the trend of down to 50 nm devices and beyond. The conductive oxide RuO₂, prepared by RF sputtering, was investigated as the gate electrode on the Laser MBE (LMBE) fabricated HfO₂ for pMOS devices. Structural, dielectric and electric properties were investigated. RuO₂/HfO₂/n-Si capacitors showed negligible flatband voltage shift (<10 mV), very strong breakdown strength (>10 MV cm⁻¹). Compared to the SiO₂ dielectric with the same EOT value, RuO₂/HfO₂/n-Si capacitors exhibited at least 4 orders of leakage current density reduction. The work function value of the RuO₂ top electrode was calculated to be about 5.0 eV by two methods, and the effective fixed oxide charge density was determined to be 3.3 × 10¹² cm⁻². All the results above indicate that RuO₂ is a promising alternative gate electrode for LMBE grown HfO₂ gate dielectrics.     

A low gate leakage current and small equivalent oxide thickness MOSFET with Ti/HfO2 high-k gate dielectric

Annealing effects on electrical characteristics and reliability of MOS device with HfO₂ or Ti/HfO₂ high-k dielectric are studied in this work. For the sample with Ti/HfO₂ higher-k dielectric after a post-metallization annealing (PMA) at 600 °C, its equivalent oxide thickness value is 7.6 Å and the leakage density is about 4.5 × 10⁻² A/cm². As the PMA is above 700 °C, the electrical characteristics of MOS device would be severely degraded.     

Investigation of atomic vapour deposited TiN/HfO2/SiO2 gate stacks for MOSFET devices

HfO₂ films were grown by atomic vapour deposition (AVD) on SiO₂/Si (1 0 0) substrates. The positive shift of the flat band voltage of the HfO₂ based metal-oxide-silicon (MOS) devices indicates the presence of negative fixed charges with a density of 5 × 10¹² cm⁻². The interface trap charge density of HfO₂/SiO₂ stacks can be reduced to 3 × 10¹¹ eV⁻¹ cm⁻² near mid gap, by forming gas annealing. The extracted work function of 4.7 eV preferred the use of TiN as metal gate for PMOS transistors. TiN/HfO₂/SiO₂ gate stacks were integrated into gate-last-formed MOSFET structures. The extracted maximum effective mobility of HfO₂ based PMOS transistors is 56 cm²/Vs.     

New TIT capacitor with ZrO2/Al2O3/ZrO2 dielectrics for 60 nm and below DRAMs

New ZrO₂/Al₂O₃/ZrO₂ (ZAZ) dielectric film was successfully developed for DRAM capacitor dielectrics of 60 nm and below technologies. ZAZ dielectric film grown by ALD has a mixture structure of crystalline phase ZrO₂ and amorphous phase Al₂O₃ in order to optimize dielectric properties. ZAZ TIT capacitor showed small Tox.eq of 8.5 Å and a low leakage current density of 0.35 fA/cell, which meet leakage current criteria of 0.5 fA/cell for mass production. ZAZ TIT capacitor showed a smaller cap leak fail bit than HAH capacitor and stable leakage current up to 550 °C anneal. TDDB (time dependent dielectric breakdown) behavior reliably satisfied the 10-year lifetime criteria within operation voltage range.     

超薄SiO2/HfO2双层栅介质的时变击穿特性和击穿机制的研究

The characteristics of TDDB （time-dependent dielectric breakdown） and SILC （stress-induced leakage current） for an ultra-thin SiO2/HfO2 gate dielectric stack are studied. The EOT （equivalent-oxide-thickness） of the gate stack （Si/SiO2/HfOz/TiN/TiA1/TiN/W） is 0.91 am. The field acceleration factor extracted in TDDB experi- ments is 1.59 s.cm/MV, and the maximum voltage is 1.06 V when the devices operate at 125 ℃ for ten years. A detailed study on the defect generation mechanism induced by SILC is presented to deeply understand the break- down behavior. The trap energy levels can be calculated by the SILC peaks： one S1LC peak is most likely to be caused by the neutral oxygen vacancy in the HfO2 bulk layer at 0.51 eV below the Si conduction band minimum; another SILC peak is induced by the interface traps, which are aligned with the silicon conduction band edge. Fur- thermore, the great difference between the two SILC peaks demonstrates that the degeneration of the high-k layer dominates the breakdown behavior of the extremely thin gate dielectric.     

一种具有高能量分辨率Al2O3钝化结区的PIN探测器

提出了一种Al₂O₃钝化结区的PIN探测器,与传统PIN探测器不同的是,在器件正面的pn结和背面的高低结处沉积了10 nm厚的Al₂O₃薄膜。经TCAD仿真结果表明,该探测器具有更低的漏电流和保护环处的电子电流密度,能对高能粒子射线入射产生良好的响应。设计了两种探测器的制备步骤并制备了器件,通过薄膜少子寿命的表征、器件的暗态I-V测试和²⁴¹Am元素能谱测试对其进行了评估。测试结果表明,与传统的PIN探测器相比,Al₂O₃钝化结区的PIN探测器的少子寿命提升至1 061μs,漏电流降低至5 nA,能量分辨率提升至521 eV,表现出更好的探测性能。     

电子束辐照下的石墨烯上的原子层沉积Al2O3介质层

为了研究石墨烯与高k介质的结合,使用原子层沉积氧化铝在石墨衬底上。沉积前使用电子束辐照,观测到了氧化铝明显改善的形貌。归因于电子束辐照过程中的石墨层的无定形变化过程。     

Excellent performance of gas sensor based on In2O3-Fe2O3 nanotubes

In₂O₃-Fe₂O₃ nanotubes are synthesized by an electrospinning method. The as-synthesized materials are characterized by scanning electron microscope and X-ray powder diffraction. The gas sensing results show that In₂O₃-Fe₂O₃ nanotubes exhibit excellent sensing properties to acetone and formaldehyde at different operating temperatures. The responses of gas sensors based on In₂O₃-Fe₂O₃ nanotubes to 100 ppm acetone and 100 ppm formaldehyde are 25 (240℃) and 15 (260℃), and the response/recovery times are 3/7 s and 4/7 s, respectively. The responses of In₂O₃-Fe₂O₃ nanotubes to 1 ppm acetone (240℃) and formaldehyde (260℃) are 3.5 and 1.8, respectively. Moreover, the gas sensor based on In₂O₃-Fe₂O₃ nanotubes also possesses an excellent selectivity to acetone and formaldehyde.     

氮气或氧气气氛退火的氧化铪材料电荷泄漏情况研究

本文中, 使用开尔文探针显微镜,研究了不同退火气氛(氧气或氮气)情况下氧化铪材料的电子和空穴的电荷保持特性。与氮气退火器件相比,氧气退火可以使保持性能变好。横向扩散和纵向泄露在电荷泄露机制中都起了重要的作用。 并且,保持性能的改善与陷阱能级深度有关。氮气和氧气退火情况下,氧化铪存储结构的的电子分别为0.44 eV, 0.49 eV,空穴能级分别为0.34 eV, 0.36 eV。 最后得到,不同退火气氛存储器件的电学性能也与KFM结果一致。对于氧化铪作为存储层的存储器件而言,对存储特性的定性和定量分析,陷阱能级,还有泄漏机制研究是十分有意义的。