基于90nmCMOS工艺的低功耗宽带压控振荡器设计

A low power VCO with a wide tuning range and low phase noise has been designed and realized in a standard 90 nm CMOS technology. A newly proposed current-reuse cross-connected pair is utilized as a negative conductance generator to compensate the energy loss of the resonator. The supply current is reduced by half compared to that of the conventional LC-VCO. An improved inversion-mode MOSFET(IMOS) varactor is introduced to extend the capacitance tuning range from 32.8% to 66%. A detailed analysis of the proposed varactor is provided. The VCO achieves a tuning range of 27–32.5 GHz, exhibiting a frequency tuning range(FTR) of 18.4%and a phase noise of –101.38 d Bc/Hz at 1 MHz offset from a 30 GHz carrier, and shows an excellent FOM of –185d Bc/Hz. With the voltage supply of 1.5 V, the core circuit of VCO draws only 2.1 m A DC current.     

A wideband 0.13 μm CMOS LC-VCO for IMT-advanced and UWB applications

This paper presents an LC voltage controlled oscillator(VCO) in a dual-band frequency synthesizer for IMT-advanced and UWB applications.The switched current source,cross-coupled pair and noise filtering technique are adopted in this VCO design to improve the performance of the phase noise,power consumption,voltage amplitude,and tuning range.In order to achieve a wide tuning range,a reconfigurable LC tank with 4 bits switch control is adopted in the core circuit design.The size of the entire chip with pad is 1.11 0.98 mm2.The test results show that the current dissipation of the VCO at UWB and IMT-Advanced band is 3 mA and 4.5 mA in a 1.2 V supply.The tuning range of the designed VCO is 3.86-5.28 GHz and 3.14-3.88 GHz.The phase-noise at 1 MHz frequency offset from a 3.5 GHz and 4.2 GHz carrier is-123 dBc/Hz and-119 dBc/Hz,respectively.     

A 3.16–7 GHz transformer-based dual-band CMOS VCO

A dual-band, wide tuning range voltage-controlled oscillator that uses transformer-based fourth-order(LC) resonator with a compact common-centric layout is presented. Compared with the traditional wide band(VCO), it can double frequency tuning range without degrading phase noise performance. The relationship between the coupling coefficient of the transformer, selection of frequency bands, and the quality factor at each band is investigated. The transformer used in the resonator is a circular asymmetric concentric topology. Compared with conventional octagon spirals, the proposed circular asymmetric concentric transformer results in a higher qualityfactor, and hence a lower oscillator phase noise. The VCO is designed and fabricated in a 0.18- m CMOS technology and has 75% wide tuning range of 3.16–7.01 GHz. Depending on the oscillation frequency, the VCO current consumption is adjusted from 4.9 to 6.3 m A. The measured phase noises at 1 MHz offset from carrier frequencies of 3.1, 4.5, 5.1, and 6.6 GHz are –122.5, –113.3, –110.1, and –116.8 d Bc/Hz, respectively. The chip area, including the pads, is 1.20.62 mm2 and the supply voltage is 1.8 V.     

A 4.2-5 GHz,low phase noise LC-VCO with constant bandwidth and small tuning gain

As the tuning frequency of an integrated LC-voltage controlled oscillator （LC-VCO） increases, it is difficult to co-design the active negative resistance core and the varactor to achieve wideband frequency range, low phase noise, constant bandwidth and small tuning gain together. The presented VCO solves the problem by designing a set of changeable varactor units. The whole VCO was implemented in a 0.18μm CMOS process. The measured result shows -120 dBc/Hz phase noise at 1 MHz offset. The measured tuning range is from 4.2 to 5 GHz and the tuning gain is 8-10 MHz/V. The VCO draws 4 mA from a 1.5 V supply voltage.     

一种基于环形振荡器的双环路锁相环

A dual-loop phase-locked loop（PLL）for wideband operation is proposed.The dual-loop architecture combines a coarse-tuning loop with a fine-tuning one,enabling a wide tuning range and low voltage-controlled oscillator（VCO）gain without poisoning phase noise and reference spur suppression performance.An analysis of the phase noise and reference spur of the dual-loop PLL is emphasized.A novel multiple-pass ring VCO is designed for the dual-loop application.It utilizes both voltage-control and current-control simultaneously in the delay cell. The PLL is fabricated in Jazz 0.18-μm RF CMOS technology.The measured tuning range is from 4.2 to 5.9 GHz.It achieves a low phase noise of–99 dBc/Hz@1 MHz offset from a 5.5 GHz carrier.     

Fully integrated low phase noise multi-band LC-tank voltage controlled oscillator with switched-capacitor resonator

This paper presents the design and implementation of a fully integrated low noise multi-band LC-tank voltage-controlled-oscillator(VCO).Multi-band operation is achieved by using switched-capacitor resonator.Additional three-bit binary weighted capacitor array is also used to extend frequency tuning range in each band.To lower phase noise,two noise filters are added and a linear varactor is adopted.Implemented in a 0.18 μm complementary-metal-oxide-semiconductor(CMOS) process,the VCO achieves a frequency tuning range covering 2.26～2.48 GHz,2.48～2.78 GHz,2.94～3.38 GHz,and 3.45～4.23 GHz while occupies a chip area of 0.52 mm2.With a 1.8 V power supply,it draws a current of 10.9 mA,10.6 mA,8.8 mA,and 6.2 mA from the lowest band to the highest band respectively.The measured phase noise is-109～-120 dBc/Hz and-121～-131 dBc/Hz at a 1 MHz and 2.5 MHz offset from the carrier,respectively.     

A 4.8GHz CMOS Fully Integrated LC Balanced Oscillator with Symmetrical Noise Filter Technique and Large Tuning Range

This paper presents a fully integrated 4.8GHz VCO with an invention——symmetrical noise filter technique.This VCO,with relatively low phase noise and large tuning range of 716MHz,is fabricated with the 0.25μm SMIC CMOS process.The oscillator consumes 6mA from 2.5V supply.Another conventional VCO is also designed and simulated without symmetrical noise filter on the same process,which also consumes 6mA current and is with the same tuning.Simulation result describes that the first VCO’ phase noise is 6dBc/Hz better than the latter’s at the same offset frequency from 4.8GHz.Measured phase noise at 1MHz away from the carrier in this 4.8GHz VCO with symmetrical noise filter is －123.66dBc/Hz.This design is suitable for the usage in a phase-locked loop and other consumer electronics.It is amenable for future technologies and allows easy porting to different CMOS manufacturing process.     

8.64-11.62 GHz CMOS VCO and divider in a zero-IF 802.11a/b/g WLAN and Bluetooth application

A fully integrated VCO and divider implemented in SMIC 0.13-μm RFCMOS 1P8M technology with a 1.2 V supply voltage is presented.The frequency of the VCO is tuning from 8.64 to 11.62 GHz while the quadrature LO signals for 802.11a WLAN in 5.8 GHz band or for 802.11b/g WLAN and Bluetooth in 2.4 GHz band can be obtained by a frequency division by 2 or 4,respectively.A 6 bit switched capacitor array is applied for precise tuning of all necessary frequency bands.The testing results show that the VCO has a phas...     

应用于K波段使用了一种新的可变电感的20~25.5G的压控振荡器

A novel transformer-type variable inductor is proposed to achieve a wide tuning range at frequencies as high as K band. The variable inductor is designed, and an intuitive model is built to analyze its performance by HFSS. A lot of mathematical analysis is done in detail. A VCO using the proposed variable inductor is designed with TSMC 0.13 μm CMOS technology for verification. The frequency tuning range of the VCO depends on the proposed variable inductor. The phase noise of the VCO depends on the quality of the LC tank （including the proposed variable inductor and varactors）. So a specific AMOS varactor is implemented to improve its quality factor. The VCO is simulated at three typical TSMC fabrication comers （TT, FF, SS） to predict its measure results. The post simulation results shows that the VCO achieves a 20-25.5 GHz continuous tuning range. Its phase noise results at 1 MHz offset are -108.4 dBc/Hz and -100.5 dBc/Hz respectively at the tuning frequencies of 19.6 GHz and 25.5 GHz. The VCO draws only 3 to 6 mA from a 1.2 V power supply.     

Design and realization of an ultra-low-power low-phase-noise CMOS LC-VCO

A fully integrated cross-coupled LC tank voltage-controlled oscillator(LC-VCO) using transformer feedback is proposed to achieve a low phase noise and ultra-low-power design even at a supply below the threshold voltage. The ultra-low-power VCO is implemented in the mixed-signal and RF 1P6M 0.18-μm CMOS technology of SMIC. The measured phase noise is-125.3 dBc/Hz at an offset frequency of 1 MHz from a carrier of 2.433 GHz,while the VCO core circuit draws only 640μW from a 0.4-V supply.The designed VCO can...     

基于SiGe BiCMOS技术的低功耗23G VCO

A 23 GHz voltage controlled oscillator(VCO) with very low power consumption is presented.This paper presents the design and measurement of an integrated millimeter wave VCO.This VCO employs an on-chip inductor and MOS varactor to form a high Q resonator.The VCO RFIC was implemented in a 0.18μm 120 GHz f_t SiGe hetero-junction bipolar transistor(HBT) BiCMOS technology.The VCO oscillation frequency is around 23 GHz,targeting at the ultra wideband(UWB) and short range radar applications.The core of the VCO circuit consumes 1 mA current from a 2.5 V power supply and the VCO phase noise was measured at around -94 dBc/Hz at a 1 MHz frequency offset.The FOM of the VCO is -177 dBc/Hz.     

GHz band frequency hopping PLL-based frequency synthesizers

In this paper we describe a full-integrated circuit containing all building blocks of a completed PLL-based synthesizer except for low pass filter（LPF）. The frequency synthesizer is designed for a frequency hopping （FH） transceiver operating up to 1.5 GHz as a local oscillator. The architecture of Voltage Controlled Oscillator （VCO） is optimized to get better performance, and a phase noise of -111.85-dBc/Hz @ 1 MHz and a tuning range of 250 MHz are gained at a centre frequency of 1.35 GHz. A novel Dual-Modulus Prescaler（DMP） is designed to achieve a very low jitter and a lower power. The settling time of PLL is 80 μs while the reference frequency is 400 KHz. This monolithic frequency synthesizer is to integrate all main building blocks of PLL except for the low pass filter, with a maximum VCO output frequency of 1.5 GHz, and is fabricated with a 0.18 μm mixed signal CMOS process. Low power dissipation, low phase noise, large tuning range and fast settling time are gained in this design.     

采用PMOS底部电流源的低功耗电流自调整压控振荡器

This paper presents the design and implementation of a current self-adjusted VCO with low power consumption. In the proposed VCO, a bottom PMOS current source instead of a top one is adopted to decrease the tail noise. A current self-adjusted technique without additional external control signals is taken to ensure the VCO starts up in the whole band while keeping the power consumption relatively low. Meanwhile, the phase noise of the VCO at the low frequency （high Cvar） can be reduced by the technique. The circuit is implemented in 0.18 μm CMOS technology. The proposed VCO exhibits low power consumption of 〈1.6 mW at a 1.5 V supply voltage and a tuning range from 11.79 to 12.53 GHz. The measured phase noise at 1 MHz offset from the frequency 11.79 GHz is-104.7 dBc/Hz, and the corresponding FOM is -184.2 dBc/Hz.     

A novel 2.95–3.65 GHz CMOS LC-VCO using tuning curve compensation

This paper presents a new CMOS LC-VCO with a 2.95–3.65 GHz tuning range.The large tuning range is achieved by tuning curve compensation using a novel varactor configuration,which is mainly composed of four accumulation-mode MOS varactors（A-MOS）and two bias voltages.The proposed varactor has the advantages of optimizing quality factor and tuning range simultaneously,linearizing the effective capacitance and thus greatly reducing the amplitude-to-phase modulation（AM-PM）conversion.The circuit is validated by simulations and fabricated in a standard 0.18μm 1P6M CMOS process.Measured phase noise is lower than–91 dBc at 100 kHz offset from a 3.15 GHz carrier while measured tuning range is 21.5%as the control voltage varies from 0 to 1.8 V.The VCO including buffers consumes 2.8 mA current from a 1.8 V supply.     

Design of 10 GHz eight-phase voltage controlled oscillator in 90 nm CMOS

A novel 10 GHz eight-phase voltage-controlled oscillator(VCO) architecture applied in clock and data recovery(CDR) circuit for 40 Gbit/s optical communications system is proposed.Compared with the traditional eight-phase oscillator,a new ring CL ladder filter structure with four inductors is proposed.The VCO is designed and fabricated in IBM 90nm complementary metal-oxide-semiconductor transistor(CMOS) technology.Measurement results show the tuning range is 9.2 GHz～11.0 GHz and the phase noise of-108.85 dBc/Hz at 1 MHz offset from the carrier frequency of 10 GHz.The chip area of VCO is 500 μm× 685 μm and the power dissipation is 17.4 mW with the 1.2 V supply voltage.     

A Compact Ka-Band PHEMT MMIC Voltage Controlled Oscillator

A compact Ka-band monolithic microwave integrated circuit(MMIC) voltage controlled oscillator (VCO) with wide tuning range and high output power,which is based on GaAs PHEMT process,is presented.A method is introduced to reduce the chip size and to increase the bandwidth of operation.The procedure to design a MMIC VCO is also described here.The measured oscillating frequency of the MMIC VCO is 36±1.2GHz and the output power is 10±1dBm.The fabricated MMIC chip size is 1.3mm×1.0mm.     

InGaP/GaAs HBT单管6GHz 大功率低噪声压控振荡器

A 6 GHz voltage controlled oscillator （VCO） optimized for power and noise performance was designed and characterized. This VCO was designed with the negative-resistance （Neg-R） method, utilizing an InGaP/GaAs hetero-junction bipolar transistor in the negative-resistance block. A proper output matching network and a high Q stripe line resonator were used to enhance output power and depress phase noise. Measured central frequency of the VCO was 6.008 GHz. The tuning range was more than 200 MHz. At the central frequency, an output power of 9.8 dBm and phase noise of-122.33 dBc/Hz at 1 MHz offset were achieved, the calculated RF to DC efficiency was about 14%, and the figure of merit was -179.2 dBc/Hz.     

一种新型全集成高速双模分频器

A fully integrated 2n/2n+1 dual-modulus divider in GHz frequency range is presented.The improved structure can make all separated logic gates embed into correlative D flip–flops completely.In this way,the complex logic functions can be performed with a minimum number of devices and with maximum speed,so that lower power consumption and faster speed are obtained.In addition,the low-voltage bandgap reference needed by the frequency divider is specifically designed to provide a 1.0 V output.According to the design demand,the circuit is fabricated in 0.18 m standard CMOS process,and the measured results show that its operating frequency range is 1.1–2.5 GHz.The dual-modulus divider dissipates 1.1 m A from a 1.8 V power supply.The temperature coefficient of the reference voltage circuit is 8.3 ppm/°C when the temperature varies from40 to C125°C.By comparison,the dual-modulus divide designed in this paper can possess better performance and flexibility.     

A 9.8-mW 1.2-GHz CMOS frequency synthesizer with a low phase-noise LC-VCO and an I/Q frequency divider

A 1.2 GHz frequency synthesizer integrated in a RF receiver for Beidou navigation is implemented in standard 0.18μm CMOS technology.A distributed biased varactor LC voltage-controlled oscillator is employed to achieve low tuning sensitivity and optimized phase noise performance.A high-speed and low-switching-noise divider-by-2 circuit based on a source-coupled logic structure is adopted to generate a quadrature(I/Q) local oscillating signal.A high-speed 8/9 dual-modulus prescaler(DMP),a programmable-delay phase frequency detector without dead-zone problem,and a programmable-current charge pump are also integrated into the frequency synthesizer. The frequency synthesizer demonstrates an output frequency from 1.05 to 1.30 GHz,and the phase noise is-98.53 dBc/Hz at 100-kHz offset and -121.92 dBc/Hz at 1-MHz offset from the carrier frequency of 1.21 GHz. The power dissipation of the core circuits without the output buffer is 9.8 mW from a 1.8 V power supply.The total area of the receiver is 2.4×1.6 mm~2.     

一种增益与频率成正比的双频段正交压控振荡器

This paper presents a novel dual-band quadrature voltage controlled oscillator(VCO) with the gain proportional to the oscillation frequency.Frequency synthesizers with this VCO can reduce the bandwidth fluctuation over all the frequency ranges without compensation or calibration.Besides the original switched capacitor array, an extra switched varactor array is adopted for the implementation of the proposed VCO.The tuning technique of changing the values of the capacitor and varactor at the same ratio is also derived.For verification purposes, a 2.5 G/3.5 G dual-band quadrature VCO is fabricated in a 0.13μm CMOS process for WiMAX applications. Measurement results show that the VCO gain is closely proportional to the oscillation frequency with±16%variation over the entire frequency range.The phase noise is -138.15 dBc/Hz at 10 MHz from the 2.5 GHz carrier and -137.44 dBc/Hz at 10 MHz from the 3.5 GHz carrier.