Noise in transistor mixers

Starting from the physical sources of noise in junction transistors, an equivalent noise circuit for a high frequency mixer circuit is presented. By means of formulas which have been derived for normal amplifiers and mixers the noise current components in the collector circuit are computed. These noise current components at the intermediate frequency are due to diverse amplifying and mixing processes. The dependence of the derived noise factor upon working point, generator output resistance, frequency and oscillator voltage is verified. The noise figure exhibits a minimum not only as a function of the generator output resistance but also as a function of the collector direct current. The noise figure may be optimized by choosing appropriate values for the circuit components and the operating point. Finally, the application of the noise formula to a dc-stabilized mixer stage is presented.     

Noise in SIS microwave mixers

It is proposed that the noise in an SIS (superconductor-insulator-superconductor) microwave mixer is shot noise, and that it can be treated in a similar manner to the noise in Schottky barrier diodes. A noise temperature is defined, and how it can be optimized is indicated. An extension of the noise temperature concept of the source is used that makes noise temperatures additive at all frequencies.     

Noise in current-commutating CMOS mixers

A noise analysis of current-commutating CMOS mixers, such as the widely used CMOS Gilbert cell, is presented. The contribution of all internal and external noise sources to the output noise is calculated. As a result, the noise figure can be rapidly estimated by computing only a few parameters or by reading them from provided normalized graphs. Simple explicit formulas for the noise introduced by a switching pair are derived, and the upper frequency limit of validity of the analysis is examined. Although capacitive effects are neglected, the results are applicable up to the gigahertz frequency range for modern submicrometer CMOS technologies. The deviation of the device characteristics from the ideal square law is taken into account, and the analysis is verified with measurements     

Noise parameters of SIS mixers

It has been shown that low-noise receivers can be constructed at millimeter wavelengths by using mixers containing superconducting tunnel junctions as the nonlinear elements. This is possible because of both the low intrinsic noise of these devices and their potential for high conversion gain. Here, the quantum theory of mixing is used to derive the full-noise parameters and small-signal parameters of sinusoidally pumped SIS (superconductor-insulator-superconductor) junctions. These are then put into a form that allows the theory of two-port linear networks to be brought to bear, allowing calculation of such useful parameters as minimum noise temperature, optimum source impedance, available (or exchangeable) gain at minimum noise, and stability factor. These quantities are properties of the pumped junction that do not depend on the source or load impedance, but do depend on the terminations at the image and harmonic sideband frequencies. The harmonic sidebands are taken to be shorted, and the image termination dependence is studied. Numerical results are presented for both ideal (BSC theory) and practical (measured current-voltage characteristic) junctions. The noise parameters of the cascade connection of an SIS mixer and a (noisy) IF amplifier are considered, leading to a specification of the optimum coupling network between the two. It is noted that the SIS mixer is usually not unconditionally stable, but that oscillation can be avoided by careful design of the IF coupling network     

Noise modeling in MESFET and HEMT mixers using a uniform noisy linemodel

The aim of this paper is to present a noise model which predicts the noise performance of MESFET and HEMT mixers. The conversion and noise correlation matrices of a FET mixer are calculated using a uniform nonlinear noisy active line concept to describe the FET. This calculation is based on a perturbation analysis of the large-signal noiseless steady state, making it a “microscopic nonlinear noise model”. This method is applied to the case of a hot HEMT gate mixer and we show that the theoretical results are in agreement with experimental data     

Noise figure and conversion loss of self-excited Gunn-diode mixers

Gunn-effect oscillators, used as self-excited mixers in X band/v.h.f. band convertors, are investigated. Noise figure and conversion loss are measured. It is shown that both fairly high oscillator Q factor and proper matching of the input signal to the Gunn diode leads to mixers comparable in performance with usual microwave mixers. Because of the negative differential resistance of Gunn diodes, conversion gain is easily realisable.     

一种新颖的用于RF-CMOS工艺片上层叠变压器的紧凑型模型

A novel compact model for on-chip stacked transformers is presented.The proposed model topology gives a clear distinction to the eddy current,resistive and capacitive losses of the primary and secondary coils in the substrate.A method to analytically determine the non-ideal parasitics between the primary coil and substrate is provided.The model is further verified by the excellent match between the measured and simulated S-parameters on the extracted parameters for a 1:1 stacked transformer manufactured in a commercial RF-CMOS technology.     

Analytical model and parameter extraction to account for the pad parasitics in RF-CMOS

A model which considers the pad parasitic effects when performing on-wafer S-parameter measurements on microwave devices fabricated on silicon substrates is presented. The model parameters are directly determined using a simple and analytical measurement-based method, allowing the electrical representation of the complete test structure using an equivalent circuit. The validity of the model is verified by achieving excellent agreement between simulated and experimental data up to 55GHz. In addition, a recently reported simplified deembedding procedure is improved and compared to a conventional one to study its validity as frequency increases.     

RF-CMOS建模:一种改进的累积型MOS变容管模型

提出一种改进的累积型MOS变容管射频模型,改进后模型方程可精确描述累积型MOS变容管全工作区域特性;模型方程连续,且任意阶次可导,至少三阶导数求解结果可实现与测试结果的精确拟合,解决了原模型可导但导数错误、变阻方程不连续等问题.模型最终应用到采用CSM(Chartered Semiconductor Manufacture Ltd)0.25μm RF-CMOS工艺制造的一30栅指(每指尺寸为长L=1μm,宽W=4.76μm)累积型MOS变容管建模中,测量和仿真所得C-V,R-V特性,品质因素以及高达39GHz S参数对比结果验证了模型的良好精度.     

RF-CMOS建模:面向低功耗应用的RF-MOSFET模型开发

在EKVv2.6本征模型基础上发展出一种新的、可用于低压低功耗CMOS RFIC CAD 的RF-MOSFET模型,模型对栅氧化层寄生电阻以及有损基底损耗进行了考虑.在对晶体管零偏和线性工作态下等效电路进行分析的基础上,开发出新的解析提取RF-MOSFET器件射频寄生参数的算法.模型最终应用到采用CSM(Chartered Semiconductor Manufacture Ltd)0.25μm RF-CMOS工艺制造的一共源连接、8栅指(每指尺寸长L=0.24μm,宽W=9.58μm)n-MOSFET 建模中,DC高达40GHz测量和仿真所得S参数对比结果验证了模型的良好精度.     

A new model for thermal channel noise of deep-submicron MOSFETs andits application in RF-CMOS design

In this paper, we present a simple analytical model for the thermal channel noise of deep-submicron MOS transistors including hot carrier effects. The model is verified by measurements and implemented in the standard BSIM3v3 SPICE model. We show that the consideration of this additional noise caused by hot carrier effects is essential for the correct simulation of the noise performance of a low noise amplifier in the gigahertz range     

n-scroll chaos generators: a simple circuit model

n-scroll attractors which are generated from a generalised and simple circuit model are presented. The nonlinear characteristics can be systematically designed by adding comparators. A 5-scroll attractor circuit realisation is shown, which has been experimentally verified using current feedback opamps     

RF-CMOS建模:面向低功耗应用的RF-MOSFET模型开发

在EKVv2.6本征模型基础上发展出一种新的、可用于低压低功耗CMOS RFIC CAD 的RF-MOSFET模型,模型对栅氧化层寄生电阻以及有损基底损耗进行了考虑.在对晶体管零偏和线性工作态下等效电路进行分析的基础上,开发出新的解析提取RF-MOSFET器件射频寄生参数的算法.模型最终应用到采用CSM(Chartered Semiconductor Manufacture Ltd)0.25μm RF-CMOS工艺制造的一共源连接、8栅指(每指尺寸长L=0.24μm,宽W=9.58μm)n-MOSFET 建模中,DC高达40GHz测量和仿真所得S参数对比结果验证了模型的良好精度.     

RF-CMOS建模:MOST在片测试结构寄生分析

提出了一种新的RF-CMOS晶体管在片测试结构寄生模型,模型综合考虑了射频/微波条件下RF-MOST器件在片测试结构中的各种寄生效应.模型考虑了PAD-互连金属、互连金属-DUT(device under test)之间的非连续性,对互连金属和基底之间的寄生效应单独进行了考虑.通过引入一个新的元件,对PAD结构基底感性损耗进行表征.模型最终应用到采用CSM(Chartered Semiconductor Manufacture Ltd)0.25 μm RF-CMOS工艺制造的测试结构寄生效应等效电路建模中,高达40GHz测试和仿真数据验证了模型的良好精度.     

RF-CMOS建模:一种改进的累积型MOS变容管模型

提出一种改进的累积型MOS变容管射频模型,改进后模型方程可精确描述累积型MOS变容管全工作区域特性;模型方程连续,且任意阶次可导,至少三阶导数求解结果可实现与测试结果的精确拟合,解决了原模型可导但导数错误、变阻方程不连续等问题.模型最终应用到采用CSM(Chartered Semiconductor Manufacture Ltd)0.25μm RF-CMOS工艺制造的一30栅指(每指尺寸为长L=1μm,宽W=4.76μm)累积型MOS变容管建模中,测量和仿真所得C-V,R-V特性,品质因素以及高达39GHz S参数对比结果验证了模型的良好精度.     

Power estimation in adiabatic circuits: a simple and accurate model

A simple procedure to evaluate the energy consumption of adiabatic gate circuits is proposed and validated. The proposed strategy is based on a linearization of the circuit and simplifying the analytical result obtained on the equivalent network. The approach leads to simple relationships which can be used for a pencil-and-paper evaluation or implemented on software. The accuracy of the results is validated by means of Spice simulations on an adiabatic full adder designed with a 0.8 μm technology     

RF-CMOS建模:MOST在片测试结构寄生分析

提出了一种新的RF-CMOS晶体管在片测试结构寄生模型,模型综合考虑了射频/微波条件下RF-MOST器件在片测试结构中的各种寄生效应.模型考虑了PAD-互连金属、互连金属-DUT(device under test)之间的非连续性,对互连金属和基底之间的寄生效应单独进行了考虑.通过引入一个新的元件,对PAD结构基底感性损耗进行表征.模型最终应用到采用CSM(Chartered Semiconductor Manufacture Ltd)0.25 μm RF-CMOS工艺制造的测试结构寄生效应等效电路建模中,高达40GHz测试和仿真数据验证了模型的良好精度.     

Scaled model measurements of embedding impedances for SIS waveguide mixers

Several scaled models have been used to determine the contributions of various waveguide mount parameters to the embedding impedance of a mm-wave SIS mixer. Measured effects of waveguide height, substrate orientation and width, junction location, lead inductance and RF-filter impedance are presented and discussed.