Design of an asymmetrical dual-band WLAN filter in liquid crystal polymer (LCP) system-on-package technology

A single-input-single-output (SISO) dual-band filter operating at ISM 2.4-2.5GHz and UNII 5.15-5.85GHz frequency bands, using the novel "dual behavior resonators" technique has been developed. Exploiting the strong second resonant frequency of resonators to realize the filtering response, allows for achieving the asymmetric shape and the good rejection between the two bands. The insertion loss and return loss at the central frequency are -2.4 dB and -15 dB for the 2.4-GHz band, respectively, and -1.8 dB and -10 dB for the 5-GHz band, respectively. The filter has been fabricated using the novel liquid crystal polymer (LCP) based multilayer packaging technology, enabling a low cost SOP implementation.     

3-D-integrated RF and millimeter-wave functions and modules using liquid crystal polymer (LCP) system-on-package technology

Electronics packaging evolution involves system, technology, and material considerations. In this paper, we present a novel three-dimensional (3-D) integration approach for system-on-package (SOP)-based solutions for wireless communication applications. This concept is proposed for the 3-D integration of RF and millimeter (mm) wave embedded functions in front-end modules by means of stacking substrates using liquid crystal polymer (LCP) multilayer and /spl mu/BGA technologies. Characterization and modeling of high-Q RF inductors using LCP is described. A single-input-single-output (SISO) dual-band filter operating at ISM 2.4-2.5 GHz and UNII 5.15-5.85 GHz frequency bands, two dual-polarization 2/spl times/1 antenna arrays operating at 14 and 35 GHz, and a WLAN IEEE 802.11a-compliant compact module (volume of 75/spl times/35/spl times/0.2 mm/sup 3/) have been fabricated on LCP substrate, showing the great potential of the SOP approach for 3-D-integrated RF and mm wave functions and modules.     

Process development and adhesion behavior of electroless copper on liquid crystal polymer (LCP) for electronic packaging application

Liquid crystal polymer (LCP) has potentially a very wide application as substrate material in electronic packaging applications because of its unique advantages. The work in this paper was performed to realize the metallization of LCP for the purpose of board fabrication, and to study the adhesion between deposited copper and LCP. A homogenous electroless plated copper layer on LCP with 4 to 5 /spl mu/m thickness was achieved, while it increased up to 40 /spl mu/m with the subsequent electroplating. The timescale of etching, deposit ion rate, and pH value were gradually changing during the plating process and the influences on copper layer quality were investigated. The adhesion force of the copper-LCP layer system was measured by a shear-off-method. Scanning electron microscopy (SEM) was used to check the surface morphology after etching and the interface after shearing on both the backside of the copper layer and the LCP side. The relationship between the shear-off adhesion of copper and the time of chemical etching before plating was examined, and the optimal etching time is discussed. Heat treatment after plating was used, and it was shown that this significantly improved the adhesion strength.     

Modeling and characterization of the polymer stud grid array (PSGA) package: electrical, thermal and thermo-mechanical qualification

We characterize the polymer stud grid array (PSGA) package electrically, thermally and thermo-mechanically for successful commercial application. For the electrical characterization, we extract lumped parameter resistance-inductance-capacitance (RLC) models for the interconnects from simulations. We also measure the RF performance of the package on printed circuit board (PCB) test structures. The average self-inductance from the wirebond pad to the bottom of the stud is 0.53 nH and the total capacitance to the ground is 0.26 pF for an interconnection of the periphery of the over the edge (OTE) type PSGA. The lumped RLC model is verified by full three-dimensional (3-D) EM simulations. Simulation models also indicate that the "Micro-via" (/spl mu/-via) type of interconnection on the PSGA package improves performance by decreasing the inductance on an average by 60%. Thermal characterization involves the development of a steady-state thermal compact model with six nodes for the 72-pin PSGA. We also perform transient thermal measurements on test packages to fine-tune the detailed model. For the thermo-mechanical case we test the first level and second level reliability by experiments and optimize them using simulations. The board level reliability for the 72-pin PSGA mounted on a PCB is very high (N50%>10000 cycles). Simulations also show a higher reliability for the PSGA than the plastic ball grid array (PBGA).     

Study of assembly processes for liquid crystal on silicon (LCoS) microdisplays

This paper involves the development of two critical assembly processes for liquid crystal on silicon (LCoS) microdisplays. The processes investigated include the lamination of cover glass on silicon and a LC filling process. For the lamination process, a tool and process were designed and developed with the objective to attach the cover glass on a silicon die and achieve a cell gap of 3-/spl mu/m between them. The gap was achieved and verified with various measurement techniques. The lamination process involved the deposition of an adhesive ring and subsequently squeezing the two parallel plates until the desired cell gap was achieved. An analytical model was developed to estimate the time required to achieve a 3-/spl mu/m cell gap by applying different pressures on the cover glass. The analytical model proved to be a guideline in developing the lamination process. The second process in the assembly is filling the cavity between the cover glass and silicon with LC material. For LC filling, a tool was designed and process was developed. The process works on the principle of flow of fluid in a capillary. The flow rate was enhanced by applying a vacuum to the cavity. An analytical model was developed to estimate the time needed to fill the 3-/spl mu/m wide cavity. Fill time is a function of gap width between glass and silicon, pressure applied within the cavity, cavity length and the viscosity of the LC material.     

Structural characterization of Ti and Pt thin films on GaAs(100) substrate

In an attempt to understand the Schottky barrier behavior of Ti/Pt/GaAs and Pt/Ti/ GaAs bimetal Schottky diodes, we have investigated the interfacial morphology of Ti and Pt thin films on GaAs(l00) substrate. The characterization was based on coverage profiling of Auger electron spectroscopy in conjunction with transmission electron microscopy. Emphasis was placed on film uniformity and atomic interdiffusion. The results showed Ga and As outdiffusion in Pt/GaAs interface and some oxygen incorporated in Ti film, but no evidence of clustering for both metal/GaAs systems.     

The effects of process conditions and substrate on copper MOCVD using liquid injection of (hfac)Cu(vtmos)

Copper MOCVD (metalorganic chemical vapor deposition) using liquid injection for effective delivery of the (hfac)Cu(vtmos) [1,1,1,5,5,5-hexafluoro-2,4-pentadionato(vinyltrimethoxysilane) copper(I)] precursor has been performed to clarify growth behavior of copper films onto TiN, <100> Si, and Si₃N₄ substrates. Especially, we have studied the influences of process conditions and the substrate on growth rates, impurities, microstructures, and electrical characteristics of copper films. As the reactor pressure was increased, the growth rate was governed by a pick-up rate of (hfac)Cu(vtmos) in the vaporizer. The apparent activation energy for copper growth over the surface-reaction controlled regime from 155°C to 225°C was in the range 12.7–32.5 kcal/mol depending upon the substrate type. It revealed that H₂ addition at 225°C substrate temperature brought about a maximum increase of about 25% in the growth rate compared to pure Ar as the carrier gas. At moderate deposition temperatures, the degree of a <111> preferred orientation for the deposit was higher on the sequence of <Cu/Si<Cu/TiN<Cu/Si₃N₄. The relative impurity content within the deposit was in the range 1.1 to 1.8 at.%. The electrical resistivity for the Cu films on TiN illustrated three regions of the variation according to the substrate temperature, so the deposit at 165°C had the optimum resistivity value. However, the coarsened microstructures of Cu on TiN prepared above 275°C gave rise to higher electrical resistivities compared to those on Si and Si₃N₄ substrates.     

Electrical control of the distributed feedback organic semiconductor laser based on holographic polymer dispersed liquid crystal grating

In this paper, we demonstrate the electrical control of the distributed feedback (DFB) organic semiconductor laser based on a holographic polymer dispersed liquid crystal (HPDLC) grating for the first time. The grating is fabricated on the top of the organic semiconductor film to act as an external feedback structure. Experimental results show that the lasing intensity can be decreased by increasing the external electric field, and the lasing wavelength exhibits a slight blue-shift of 1.4 nm during the modulation process, indicating a good stability. The modulated performances are attributed to the decreases in the refractive index modulation and average refractive index of the HPDLC grating respectively as a result of the field-induced liquid crystal reorientation. This study provides some new ideas for the improvement of DFB organic semiconductor laser to enable envisioned applications in laser displays and integrated photonic circuits.     

Corrosion testing of anisotropic conductive adhesive interconnections on FR4, liquid crystal polymer and polyimide substrates

Anisotropic conductive adhesive films (ACF) have been widely studied for numerous applications. However, their resistance to corrosion in highly corrosive environments has been studied only very little. This study investigated the reliability and behaviour of ACFs in corrosive salt spray environment. ACF was used to attach flip chip (FC) components on FR4, liquid crystal polymer (LCP) and polyimide (PI) substrates and the FC packages were subjected to a salt spray test lasting 3000 h. The FC packages had daisy chain structures which were measured continuously in real time during testing. After testing cross sections of the tested packages were examined using an optical microscope and a scanning electron microscope (SEM). Most components failed during the test and the results showed significant differences between the various substrate materials. The LCP substrate performed considerably better than the other substrates and the PI substrate proved to have the poorest reliability. Corrosion of the pads on the substrates as well as open joints was seen in all substrate materials. The corrosion behaviour as well as the differences between the substrates showed that the substrate structure and material are critical factors in corrosive environments and should be carefully considered. The reliability of the ACF FC package with the LCP substrate was found to be good, as the test was very severe and no failures occurred during the first 625 h of testing and only 20% failed during the first 1000 h.     

Development of a low cost microwave mixer using a broad-band substrate integrated waveguide (SIW) coupler

A low cost single-balanced mixer is designed using a newly designed 90/spl deg/ substrate integrated waveguide (SIW) 3-dB coupler, which takes the advantages of low cost, low profile, and high performance. An X-band single-balanced SIW mixer is designed and fabricated with a standard printed circuit board process. Measured conversion loss of 6.8dB and the wide-band response from 8.5 to 12GHz are presented.     

Preparation of poly (N-vinylcarbazole)-co-poly(2-(dimethylamino)ethyl methacrylate) based hydrogen bonded side-chain liquid crystal copolymer

In this study, new side chain liquid crystalline copolymers were prepared from N-vinyl carbazole (NVC) and 2-(Dimethylamino)ethyl methacrylate) (DMAEM) as a hydrogen bond acceptor copolymer and 8-(4-cyanobiphenyl-4′-oxy)octan-1-ol (LC8) by molecular self-assembly processes via hydrogen bond formation between nitrogen of (DMAEM) and hydroxyl group of the LC8. The formation of H bond was confirmed by using FTIR spectroscopy. The liquid crystalline behavior of the copolymers and homopolymer of the (DMAEM) was investigated using a differential scanning calorimeter (DSC) and polarized optical microscopy. The dielectric relaxation properties of H-bonded Side Chain LC Copolymers (HB-LCP) doped 8-(4-cyanobiphenyl-4′-oxy)octan-1-ol (LC8) and pure LC8 liquid crystals have been investigated by the dielectric spectroscopy (DS) method. The dielectric behavior of the LCs shows a dielectric relaxation process. The relaxation frequency of the LCs was changed by the addition of HB-PLC. It is evaluated that the dielectric strength and relaxation properties of LC8 and LC8/HB-PLC LCs can be controlled by 1% HB-PLC dopant.     

基于液晶光阀和光束分析仪的Goos-H(a)nchen位移的简单测量

Goos-H(a)nchen(GH)位移只有波长数量级,在实验测量上比较困难.提出了一种基于液晶光阀(LCLV)和光束分析仪(LBP)直接测量GH位移的新方法.研究了LCLV对光偏振态调制的特性,结果发现,当外接电压发生变化时,光的偏振态也随之变化.利用LCLV对光偏振态的调制和LBP记录光斑的重心位置的变化,直接测量出TE和TM两种偏振态入射时棱镜单界面反射光束的GH位移差.这个探测方法简单,不需要复杂的外部处理电路,且实验结果与理论结果很吻合,此方法也可以进一步直接测量二维位移.     

BOC(10,5)与BPSK(10)信号的同步性能研究

BOC调制方式在卫星通信中的应用已十分普遍,文章以在GPS上应用的BOC(10,5)与BPSK(10)信号为例,首先判定了把CRB(克拉美罗界)作为同步精度标准的原因,用修改的MCRB代替CRB,来去除扩频序列对CRB的影响。从理论上得到了BOC的同步方差下限小于BPSK的方差下限。通过仿真,得出了其方差在不同信噪比下的表现。搭建了通信仿真系统,得出了在不同信噪比下BOC和BPSK的捕获概率和同步精度,证明了BOC拥有更好的同步性能。     

Evaluation of super-critical thickness strained-Si on insulator (sc-SSOI) substrate

Crystal quality and strain distribution in SOI layer of conventional strained-Si on insulator (SSOI) and super-critical thickness strained-Si on insulator (sc-SSOI) were evaluated by in-plane X-ray diffraction (XRD), Raman spectroscopy, and other techniques. The surface defect distribution measured by wafer inspection system shows pit-type and line defects in both SSOI layers. More specifically, the sc-SSOI material has more line defects than conventional SSOI layers. Cross-hatched pattern defects were observed using X-ray topography (XRT) measurements. Raman mapping of 300 mm wafers shows the strain at the center of the wafer is larger than at the edge. In magnified close-up mapping, cross-hatched contrasts corresponding to misfit dislocations are observed, while the surface morphology is completely smoothed out. In-plane XRD measurements show the strain depth variations are quite uniform along the depth direction. The full width at half maximum (FWHM) of in-plane XRD peaks obtained from strained-Si layers is much larger than for un-strained SOI and bulk Si, reflecting poor crystal quality. SSOI was fabricated by the layer transfer of strained-Si on a virtual SiGe substrate. Therefore, we believe the crystal quality and strain distribution originate in the donor strained Si when virtual SiGe substrate is the starting material.     

Role of electron blocking and trapping layers in transport characterization of a photovoltaic polymer poly(3-hexylthiophene)

Hole injection and transport in films (300-350 nm) of poly(3-hexylthiophene) (P3HT) were investigated by dark-injection space-charge-limited current (DI-SCLC) technique. For samples with a nominally hole-only configuration of anode/P3HT/Au, the DI current transients depart significantly from the theory, and the signals cannot be used for reliable carrier mobility extraction. The origin of the departure can be attributed to electron leakage from the Au cathode. We outline a means of suppressing electron leakage by inserting an interlayer between the P3HT and the cathode. This interlayer has dual functions of blocking and trapping electrons. Using this interlayer, we obtain well-defined DI-SCLC signals for reliable carrier mobility determination. With a suitable interlayer to suppress undesirable carrier injection and transport, DI-SCLC technique should find broad applications in the transport characterization of narrow gap photovoltaic polymers.     

Computational parametric analyzes on the solder joint reliability of bottom leaded plastic (BLP) package

The bottom-leaded plastic (BLP) package is a lead-on-chip type of chip scale package (CSP) developed mainly for memory devices. Because the BLP package is one of the smallest plastic packages available, solder joint reliability becomes a critical issue. In this study, a 28-pin BLP package is modeled to investigate the effects of molding compound and leadframe material properties, the thickness of printed circuit board (PCB), the shape of solder joint and the solder pad size on the board level solder joint reliability. A viscoplastic constitutive relation is adopted for the modeling of solder in order to account for its time and temperature dependence on thermal cycling. A three-dimensional nonlinear finite element analysis based on the above constitutive relation is conducted to model the response of a BLP assembly subjected to thermal cycling. The fatigue life of the solder joint is estimated by the modified Coffin-Manson equation. The two coefficients in the modified Coffin-Manson equation are also determined. Parametric studies are performed to investigate the dependence of solder joint fatigue life on various design factors.     

Thin-layer liquid phase epitaxy of InGaPAs heterostructures in short intervals (< 100 ms): Non-diffusion-limited crystal growth

Data are presented showing that two different mechanisms control the LPE growth of InGaPAs in the step-cooled technique. An automated growth apparatus, which allows an accurate and reproducible selection of growth times as short as ~9ms, is used to study the thickness and the growth rate of InGaPAs layers as a function of growth time for times ranging from ~9ms to ~20s. For long intervals the measured InGaPAs epilayer thickness is shown to vary as the square root of the growth time, as expected for the case of diffusion-limited growth. When the growth period is reduced to < 200ms , the quaternary layer thickness is greater than the diffusion-controlled value and, in addition, is practically independent of the growth time. Auger depth profile data on InGaPAs layers grown from ~ 9ms to ~ 120ms are presented showing that layers are uniform in composition. Photoluminescence data on InGaPAs layers grown under non-diffusion limited conditions are shown to be different in composition than the relatively thick layers grown under diffusion-limited conditions, at longer times, from melts with the same liquidus compositions. Data are presented indicating the existence of both of these distinct compositions in a single ~ 800 Å InGaPAs layer grown in ~ls. It is shown that thick InGaPAs layers of uniform composition can be grown, by the step-cooled LPE process, by stacking a number of thin layers grown in short intervals. Data are presented indicating that thin-layer stacks can be used to improve the performance characteristics of heterostructure lasers.     

Fabrication and characterization of thin-film Cu (In,Ga) Se2 solar cells on a PET plastic substrate using screen printing

Chalcopyrite copper indium gallium diselenide (CIGS) ink was prepared by dissolving copper, indium, gallium acetylacetonate and Se powder in oleylamine using the hot injection methods. CIGS films were deposited on a PET plastic substrate by a screen-printing technique using CIGS ink with a Ga content ranging from 0.3 to 0.6. X-ray diffraction patterns reveal that the films exhibit a chalcopyrite-type structure. The crystalline grain sizes of the films decrease with increasing Ga content. AFM data shows that the root mean square (RMS) surface roughness of the CIGS film decreases with increasing Ga content. The effects of the Ga content in the CIGS absorber layer on the optical properties of the corresponding thin films and solar cells were studied. The band-gap energies of the CIGS thin films increased with an increasing Ga/(In+Ga) ratio. The short-circuit current (I_SC) of the solar cell decreased linearly with the Ga/(In+Ga) ratio, while the open-circuit voltage (V_OC) increased with this ratio. The solar cell exhibited its highest efficiency of 4.122% at a Ga/(In+Ga) ratio of 0.3.