Iterative Regularization and Nonlinear Inverse Scale Space in Curvelet-type Decomposition Spaces

In this paper we generalize the iterative regularization method and the inverse scale space method, recently developed for wavelet-based image restoration, to curvelet-type decomposition spaces setting. We obtain the result that minimzer of the new model can be derived as curvelet firm shrinkage with curvelet-type weight, which is dynamically changing in the iteration（CDS-IRM）. And we obtain a new class of nonlinear inverse scale spaces flow which is dependent on Curvelet-type decomposition scale and smooth order（CDS-ISS）. Numerical experiments indi- cate that the proposed methods are very eflClcient for de- noising.     

Total Sensitivity Index Calculation of Tool Requirement Model via Error Propagation Equation

A new and convenient method is presented to calculate the total sensitivity indices defined by variance-based sensitivity analysis. By decomposing the output variance using error propagation equations, this method can transform the ＂double-loop＂ sampling procedure into ＂single-loop＂ one and obviously reduce the computation cost of analysis. In contrast with Sobors and Fourier amplitude sensitivity test （FAST） method, which is limited in non-correlated variables, the new approach is suitable for correlated input variables. An application in semiconductor assembling and test manufacturing （ATM） factory indicates that this approach has a good performance in additive model and simple non-additive model.     

Routing metric of interference-aware link quality： an improved ETX in wireless mesh networks

This article addresses the problem of route selection in wireless mesh networks （WMNs）. The traditional routing metrics adopt packet delivery ratio （PDR） as a representative metric of wireless link quality assessment. However, PDR measured by the broadcast-based probe method is affected by the size, number and transmission rate of probe packets, which influences the metric accuracy. In this paper, improved expected transmission count （iETX）, a new routing metric of interference-aware link quality, is proposed for WMNs. Dispensing with traditional broadcast-based probing method, the iETX uses regional physical interference model to obtain PDR. Regional physical interference model is built upon the relationship between signal to interference plus noise ratio （SINR） and PDR, which contributes to the improvement of metric accuracy. The iETX comprehensively considers the effects of interference and link quality and minimizes the expected number of packet transmissions required for successful delivery, which helps find a path with minimum interference and high throughput. Simulation shows that the proposed metric can significantly improve the network performance.     

Model and Simulation of Multipath Error in DLL for GPS Receiver

Although different multipath error models of Delay lock loop （DLL） used in GPS receiver are established, they have never been put together for comparison. Furthermore, no universal simulation method is developed to get a fair comparison among these models. A new model with implicate expression is hence proposed for the coherent DLL and the noncoherent Dot-product （DOT） power mode DLL. Meanwhile, a new simulation method based on the anonymous function in Matlab, which is especially suitable for models with implicit expressions is also proposed to compare the new model with the existing ones. The theoretical analysis and simulation results show that the existing models are the special case of the proposed one. The new simulation method can be used for the comparison of different multipath error models and the multipath error analysis of other DLLs for which only the implicit model is available.     

A robust optical flow computation

This paper presents a new method for robust and accurate optical flow estimation. The significance of this work is twofold. Firstly, the idea of bi-directional scheme is adopted to reduce the model error of optical flow equation, which allows the second order Taylor＇s expansion of optical flow equation for accurate solution without much extra computational burden; Secondly, this paper establishs a new optical flow equation based on LSCM （Local Structure Constancy Model） instead of BCM （Brightness Constancy Model）, namely the optical flow equation does not act on scalar but on tensor-valued （matrix-valued） field, due to the two reason： （1） structure tensor-value contains local spatial structure information, which provides us more useable cues for computation than scalar; （2） local image structure is less sensitive to illumination variation than intensity, which weakens the disturbance of non-uniform illumination in real sequences. Qualitative and quantitative results for synthetic and real-world scenes show that the new method can produce an accurate and robust results.     

Host load prediction in cloud based on classification methods

The host load prediction problem in cloud computing has also been received much attention. To solve this problem, we have to use the historical load data to predict the future load level. Accurate prediction methods are useful for host load balance and virtual machine migration. Although cloud is likely to grids at some extent, the length of tasks are much shorter and host loads change more frequently with higher noise. The above characteristics introduce challenges for host load prediction. In this paper, based on the proposed exponentially segmented pattern and the corresponding transformation, prediction problem is transformed into the traditional classification problem, This classification problem can be solved based on the traditional methods, and features are given for training the classification model. For achieving accurate prediction, a new feature periodical coefficient is introduced and some existed classification methods are implemented. Experiments on the real world dataset invalidate the efficiency of the new proposed feature, which is in the most effective combinations of features, it increases successful rate （SR） 1.33%-2.82% and decreases the mean square error （MSE） 1.37%-2.91%. And the results also show that support vector machine （SVM） method can achieve nearly the same performance as the Bayes methods and their performance is about 50% higher in successful rate and 17% better in the mean square error compared to the existed methods.     

A New Weighted Least Squares Support Vector Machines and Its Sequential Minimal Optimization Algorithm

Least squares support vector machines （LSSVM） is widely used in pattern recognition and artificial intelligence domain in recent years for its efficiency in classification and regression. The solution of LSSVM is an optimization problem of a Sum squared error （SSE） cost function with only equality constraints and can be solved in a simple linear system. However, its generalization performance is sensitive to noise points and outliers that are often existent in training dataset. In order to endow robustness to LSSVM, a new method for computing weight vector of error is proposed and the substituting of weighted error vector for original error vector in LSSVM gives birth to a new weighted LSSVM. The method gets weight factor by computing distance between sample and its corresponding class center. Sequential minimal optimization （SMO） algorithm is also extended to the new method for its efficient application. Comparison experiments show superiority of the new method in terms of generalization performance, robust property and sparse approximation. Especially, the new method is much faster than the other method for large number of samples.     

Design of Dynamic Controller for Neutral Differential Systems with Multiple Delays in Control Input

The design feedback controller for a problem of dynamic output class of multi-delayed neutral systems has been considered. A criterion for the existence and asymptotic stability of such controller is derived via defining a new integral operator. The criterion is expressed in terms of the linear matrix inequalities （LMIs）, which can be checked numerically using the effective LMI toolbox in MATLAB. One numerical example is given to illustrate the proposed design method. Numerical simulation shows that the new design method is valid.     

Novel Sampling and Reconstruction Method for Non-Bandlimited Impulse Signals

To sample non-bandlimited impulse signals, an extremely high-sampling rate analog-todigital converters （ADC） is required. Such an ADC is very difficult to be implemented with present semiconductor technology. In this paper, a novel sampling and reconstruction method for impulse signals is proposed. The required sampling rate of the proposed method is close to the signal innovation rate, which is much lower than the Nyquist rate in conventional Shannon sampling theory. Analysis and simulation results show that the proposed method can achieve very good reconstruction performance in the presence of noise.     

一种无线传感器网络公平数据收集方案(英文)

To solve the slow congestion detection and rate convergence problems in the existing rate control based fair data collection schemes, a new fair data collection scheme is proposed, which is named the improved scheme with fairness or ISWF for short. In ISWF, a quick congestion detection method, which combines the queue length with traffic changes of a node, is used to solve the slow congestion detection problem, and a new solution, which adjusts the rate of sending data of a node by monitoring the channel utilization rate, is used to solve the slow convergence problem. At the same time, the probability selection method is used in ISWF to achieve the fairness of channel bandwidth utilization. Experiment and simulation results show that ISWF can effectively reduce the reaction time in detecting congestion and shorten the rate convergence process. Compared with the existing tree-based fair data collection schemes, ISWF can achieve better fairness in data collection and reduce the transmission delay effectively, and at the same time, it can increase the average network throughput by 9.1% or more.     

Optimal wire sizing and buffer insertion for low power and ageneralized delay model

We present efficient, optimal algorithms for timing optimization by discrete wire sizing and buffer insertion. Our algorithms are able to minimize a cost function subject to given timing constraints; we focus on minimization of dynamic power dissipation, but the algorithm is also easily adaptable to, for example, area minimization. In addition, the algorithm efficiently computes the complete, optimal power-delay trade-off curve for added design flexibility. An extension of our basic algorithm accommodates a generalized delay model which takes into account the effect of signal slew on buffer delay which can contribute substantially to overall delay. To the best of our knowledge, our approach represents the first work on buffer insertion to incorporate signal slew into the delay model while guaranteeing optimality. The effectiveness of these methods is demonstrated experimentally     

Impact of on-chip interconnect frequency-dependent R(f)L(f) on digital and RF design

On-chip global interconnect exhibits clear frequency dependence in both resistance (R) and inductance ( L). In this paper, its impact on modern digital and radio frequency (RF) circuit design is examined. First, a physical and compact ladder circuit model is developed to capture this behavior, which only employs frequency independent R and L elements, and thus, supports transient analysis. Using this new model we demonstrate that the use of dc values for R and L is sufficient for timing analysis (i.e., 50% delay and slew rate) in digital designs. However, RL frequency dependence is critical for the analysis of signal integrity, shield line insertion, power supply stability, and RF inductor performance.     

Timing-Aware Cell Layout De-Compaction for Yield Optimization by Critical Area Minimization

This paper proposes a yield optimization method for standard cells under timing constraints. Yield-aware logic synthesis and physical optimization require yield enhanced standard cells and the proposed method automatically creates yield enhanced cell layouts by decompacting the original cell layout using linear programming. We develop a novel accurate linear delay model which approximates the difference from the original delay and use this model to formulate the timing constraints into linear programming. Experimental results show that the proposed method can pick up the yield variants of a cell layout from the tradeoff curve of cell delay versus critical area and is used to create the yield enhanced cell library which is essential to realize yield-aware VLSI design flows.     

Intelligent Robustness Insertion for Optimal Transient Error Tolerance Improvement in VLSI Circuits

Due to aggressive technology scaling, VLSI circuits are becoming increasingly susceptible to radiation-induced single-event-upsets (SEUs). Redundancy insertion has been adopted to provide the circuit with additional transient error resiliency. However, its applicability and efficiency are limited by the tight design constraints and budgets. In this paper, we present an intelligent “constraint-aware robustness insertion” methodology. By selectively protecting sequential elements in static CMOS digital circuits, it is able to maximally improve the SEU tolerance while keeping the incurred design overhead within acceptable range. Our technique consists of three major components. The first one is a configurable hardening sequential cell design that serves as the basic building block of the framework; the second one is a robustness calibration technique that evaluates the relative error tolerance of all sequential elements and provides guidelines to the redundancy insertion; the third one is an optimization algorithm that searches for the optimal protection scheme under given design constraints and budgets. Simulation results show that the intelligent robustness insertion reduced the error rate by 46% with zero timing penalty and 10% area increase. Furthermore, by exploring the tradeoffs between reliability and design overhead, we also demonstrate the proposed technique can help achieve high reliability improvement while keeping the design overhead within acceptable range.      

采用精确时延模型基于路径的缓冲器插入时延优化

提出了一种基于路径的缓冲器插入时延优化算法,算法采用高阶模型估计连线时延,用基于查表的非线性时延模型估计门延迟.在基于路径的时延分析基础上,提出了缓冲器插入的时延优化启发式算法.工业测试实例实验表明,该算法能够有效地优化电路时延,满足时延约束.     

Timing-driven logic restructuring for nano-hybrid circuits

As the feature size of the integrated circuits (ICs) scales down, the future of nano-hybrid circuit looks bright in extending Moore's Law. However, mapping a circuit to a nano-fabric structure is vexing due to connectivity constraints. A mainstream methodology is that a circuit is transformed into a nano-fabric preferred structure by buffer insertion to high fan-out gates. However, it may result in timing degradation. Logic replication is a traditional way to split high fan-out gates in logic synthesis but may not be suitable for high fan-out gates with high fan-ins. In this article, a timing-driven logic restructuring framework at the gate level is proposed. The proposed framework identifies the high fan-out gates from a given gate netlist according to the fan-out threshold, following by the restructuring of high fan-out gates through the application of logic replication and buffer insertion. To improve circuit timing from a global perspective, latent critical edges are identified to avoid entrapping critical paths during the restructuring. Experimental results on ISCAS benchmarks indicate that 8.51% timing improvement and 6.13% CPU time reduction can be obtained traded with 4.16% area increase on an average.     

采用精确时延模型基于路径的缓冲器插入时延优化

提出了一种基于路径的缓冲器插入时延优化算法 ,算法采用高阶模型估计连线时延 ,用基于查表的非线性时延模型估计门延迟 .在基于路径的时延分析基础上 ,提出了缓冲器插入的时延优化启发式算法 .工业测试实例实验表明 ,该算法能够有效地优化电路时延 ,满足时延约束     

一种降低电路泄漏功耗的多阈值电压方法

目前,多阈值电压方法是缓解电路泄漏功耗的有效手段之一。但是,该方法会加重负偏置温度不稳定性(NBTI)效应,导致老化效应加剧,引起时序违规。通过找到电路的潜在关键路径集合,运用协同优化算法,将关键路径集合上的门替换为低阈值电压类型,实现了一种考虑功耗约束的多阈值电压方法。基于45 nm工艺模型及ISCAS85基准电路的仿真结果表明,在一定功耗约束下,该方法的时延改善率最高可达12.97%,明显优于常规多阈值电压方法。电路的规模越大,抗泄漏功耗的效果越好。     

Scheduling constraint generation for communicating processes

This paper describes a new algorithm for generation of scheduling constraints in networks of communicating processes. Our model of communication intertwines the schedules of the machines in the network: timing constraints of a machine may affect the schedules of machines communicating with it. This model of communication facilitates the modular specification of timing constraints. A feasible solution to the set of constraints generated gives a schedule for each machine in the network such that all internal constraints of each machine are satisfied and communication between machines is statically coordinated whenever possible. Static scheduling of communication saves on the cost of handshake associated with dynamic synchronization. Our algorithm can handle complex, state-dependent and cyclic timing constraints. Experimental results show that our algorithm is both effective and efficient     

Analyzing and exploiting the structure of the constraints in theILP approach to the scheduling problem

In integer linear programming (ILP), formulating a “good” model is of crucial importance to solving that model. In this paper, we begin with a mathematical analysis of the structure of the assignment, timing, and resource constraints in high-level synthesis, and then evaluate the structure of the scheduling polytope described by these constraints. We then show how the structure of the constraints can be exploited to develop a well-structured ILP formulation, which can serve as a solid theoretical foundation for future improvement. As a start in that direction, we also present two methods to further tighten the formulation. The contribution of this paper is twofold: 1) it provides the first in-depth formal analysis of the structure of the constraints, and it shows how to exploit that structure in a well-designed ILP formulation, and 2) it shows how to further improve a well-structured formulation by adding new valid inequalities