Robust hybrid pitch detector

A hybrid pitch detector characterised by parallel analysis of the speech signal in temporal, spectral and cepstral domains is proposed. The voiced/unvoiced decision and pitch period evaluation is realised by a logical analysis of the results from three domains. The experimental analysis shows the robustness of the detector for noisy and telephone speech.<>     

A programmable NMOS DRAM controller for microcomputer systems with dual-port memory and error checking and correction

An NMOS DRAM controller for use in microcomputer systems based on the iAPX-86 and iAPX-286 microprocessor families or on the Multibus system bus is described. The controller provides complete support for dual-port memories and memories with error checking and correction. The controller has programmable attributes for configuring it to the particular requirements of the system. The controller uses parallel arbitration to minimize arbitration delay. A memory cycle will start on the same clock edge that samples a command if the cycle has been previously enabled. Novel logic and circuit design techniques have been used to achieve 16 MHz operation, 20 ns input setup time, and 35 ns output delay time.     

Probabilistic crisscross error correction

The crisscross error model in data arrays is considered, where the corrupted symbols are confined to a prescribed number of rows or columns (or both). Under the additional assumption that the corrupted entries are uniformly distributed over the channel alphabet, and by allowing a small decoding error probability, a coding scheme is presented where the redundancy can get close to one half the redundancy required in minimum-distance decoding of crisscross errors     

Signal-blocking-based adaptive beamformer with simple direction error correction

A novel beamformer is proposed, based on the Duvall beamforming structure. The Duvall beamformer, which blocks the desired signal by using its direction information, suffers from performance degradation due to errors in the information. The proposed beamformer is very insensitive to such errors by employing a simple direction estimation, which is well suited to the Duvall structure.     

Adaptive algorithms with nonlinear data and error functions

The tools of nonlinear system theory are used to examine several common nonlinear variants of the LMS algorithm and derive a persistence of excitation criterion for local exponential stability. The condition is tight when the inputs are periodic, and a generic counterexample is demonstrated which gives (local) instability for a large class of such nonlinear versions of LMS, specifically, those which utilize a nonlinear data function. The presence of a nonlinear error function is found to be relatively benign in that it does not affect the stability of the error system. Rather, it defines the cost function the algorithm tends to minimize. Specific examples include the dead zone modification, the cubed data nonlinearity, the cubed error nonlinearity, the signed regressor algorithm, and a single-layer version of the backpropagation algorithm     

A 12-bit successive-approximation-type ADC with digital error correction

A correction algorithm has been implemented that gives an almost twofold improvement in conversion speed without loss of accuracy or changes to the analog circuitry of a slower design. The design of a smart successive-approximation register chip, which has been fabricated in a double poly CMOS process and takes up 18 mil/SUP 2/ in die area, is described. The area is 13% larger than that of an A/D converter utilizing the same analog chip but a conventional digital chip without error correction. A speed improvement from 12 to 7 /spl mu/s was obtained with digital error correction.     

Incremental digital position encoder with error detection and correction

A digital position encoder is described which combines features of absolute and incremental encoders. A track encoded with a pseudorandom sequence provides absolute position information for an incremental encoder, allowing the detection and correction of errors, while requiring only two code tracks and four read heads.<>     

High-speed ΔΣ ADC with error correction

A digital error correction scheme is described for ΔΣ ADCs with multibit quantisers. It operates in the background and remains effective even for very low oversampling ratios     

A frequency error resistant blind CDMA detector

This paper presents an enhanced version of the previously proposed blind anchored interference-mitigating detector (BAID) for code-division multiple-access transmission. Such a detector, named extended complex BAID (EC-BAID), features invariance to a phase error on the useful channel's carrier and reveals resistance to a large frequency shift (e.g., Doppler shift) on interfering carriers. The EC-BAID is also shown to bear a sensitivity to residual carrier frequency errors on the desired channel which is lower by three orders of magnitude with respect to the case of a data-aided minimum mean-square-error receiver. The performance of the EC-BAID is computed theoretically, and is validated by computer simulations under a variety of system configurations     

Logic design error diagnosis and correction

Logic verification tools are often used to verify a gate-level implementation of a digital system in terms of its functional specification. If the implementation is found not to be functionally equivalent to the specification, it is important to correct the implementation automatically. This paper describes a formal method for the diagnosis and correction of logic design errors in an incorrect gate-level implementation. We use Boolean equation techniques to search for potential error locations. An efficient search and pruning algorithm is developed by introducing the notion of immediate dominator set. Two correction procedures are proposed. Gate correction corrects errors such as wrong gate type, missing inverters, etc.; line correction corrects errors such as missing wires and wrong connections. Our method is robust and covers all, simple design errors described by Abadir et al. (1988). Experimental results for a set of ISCAS and MCNC benchmark circuits demonstrate the effectiveness of the proposed techniques     

前向纠错技术在EPON中的应用研究

在EPON中引入前向纠错(FEC)技术,能有效地增加PON的光分路数和增大信号的传输距离。对于在EPON中加入FEC功能所涉及到的FEC线路综合编码、帧结构的设计以及兼容性等问题进行了分析,并进一步给出了相应的解决方案。     

Built-in testable error detection and correction

A method for design of built-in testable (BIT) error detection and correction (EDAC) circuits is presented that uses up to 65% less test hardware than customary BIT implementations. A 1-μm CMOS, 16-bit EDAC designed and fabricated with this technique exhibits >99% fault coverage in 10 μs at 25 MHz. Built-in test impacts the speed performance by only one gate delay regardless of the size of the EDAC. Various faults are injected into the chip to verify the effectiveness of built-in test     

基于FPGA的前向纠错算法

研究数字音频无线传输中的前向纠错(FEC)算法的设计及实现,对前向纠错中的主要功能模块,如RS编解码、交织器与解交织器等给出基本算法及基于现场可编程门阵列(FPGA)和硬件描述语言的解决方案.选用硬件描述语言VerilogHDL,在开发工具QuartusⅡ4.2中完成软核的综合、布局布线和汇编,在Modelsim中进行时序仿真验证,最终下载到开发板中进行电路验证及测试.     

Sparse-graph codes for quantum error correction

Sparse-graph codes appropriate for use in quantum error-correction are presented. Quantum error-correcting codes based on sparse graphs are of interest for three reasons. First, the best codes currently known for classical channels are based on sparse graphs. Second, sparse-graph codes keep the number of quantum interactions associated with the quantum error-correction process small: a constant number per quantum bit, independent of the block length. Third, sparse-graph codes often offer great flexibility with respect to block length and rate. We believe some of the codes we present are unsurpassed by previously published quantum error-correcting codes.     

On forward error correction with adaptive decoding (Corresp.)

A method is proposed that utilizes punctured Reed-Solomon (RS) block codes for adaptive coding. Part of the redundancy of the RS codewords is used in a convolutional coding framework. This enables some codewords to use more redundancy for correcting errors, while other adjacent codewords use less redundancy.     

On the throughput of multicasting with incremental forward error correction

In this paper, we consider a multicasting model that uses incremental forward error correction (FEC). In this model, there is one sender and r/sup n/ receivers. The sender uses an ideal (n,n(1-p),np) FEC code to code a group of n(1-p) data packets with additional np redundant packets so that any set of n(1-p) packets received by a receiver can be used to recover the original n(1-p) data packets. Packets to the receivers are lost independently with probability q. For this model, we prove several strong laws of large numbers for the asymptotic throughput as n /spl rarr/ /spl infin/. The asymptotic throughput is characterized by the unique solution of an equation in terms of p, q, and r. These strong laws not only provide theoretical justification for several important observations made in the literature, but also provide insights that might have impact on future design of multicasting protocols.     

Adaptive detector arrays for optical communications receivers

An optimal adaptive array receiver for use in groundbased optical communications is investigated. Kolmogorov phase screen simulations are used to generate realistic focal-plane distributions of the received optical fields in the presence of turbulence. The array detection concept reduces interference from background radiation by effectively assigning higher confidence levels at each instant of time to those detector elements that contain significant signal energy and suppressing those that do not. A simpler suboptimum structure that replaces the continuous weighting of the optimal receiver by a hard decision over each detector element is also described. It is shown that, for photon counting receivers observing Poisson distributed signals, performance improvements of up to 5 dB can be obtained over conventional single-detector photon counting receivers when observing turbulent optical fields in high background environments.     

Efficient codes for single error detection and partial single error correction

Coding schemes are proposed for error control in systems where individual blocks of information are organised as two sub-blocks each requiring a different degree of error control. The codes described guarantee single error correction in one sub-block and provide single error detection and partial single error correction in the other. The main advantages are savings in redundancy and ability to use standard encoding/decoding procedures.