一种可用在基于平台SoC设计中的处理器核OR1200

介绍了片上系统(SoC)的概念以及基于平台的SoC设计方法,分析了一种可适用于基于平台SoC设计方法的32位RISC处理器OR1200的内核.与8051,ARM构架处理器系列、Leon2处理器核比较,OR1200具有通用性强、设计成本低的特点以及优秀的内核可再优化的能力.最后分析和给出了基于OR1200的2个SoC应用设计方案,并提出了一个用于H.264标准的图像压缩内核优化方案.     

基于MCU架构的运动估计协处理器的研究与实现

根据视频编码对运动估计算法灵活性的要求,本文给出了一种新颖的基于微控制器(MCU)架构的运动估计协处理器设计,并将单指令多数据和流水线技术应用于这一结构中.处理器各模块功能独立,由运动估计算法代码控制运行,结构中加入了运动估计专用插值树和累加器树,配合运动估计专用指令,完成一个8×8小块的匹配运算只需要11个周期.处理器中加入的数据链路控制和专用双引DMA控制器解决了数据传输的瓶颈问题.该设计结构新颖独特,清晰灵活,便于硬件实现,可配合不同的主处理器完成视频编码.硬件仿真和验证表明,协处理器可以在50MHz下稳定地工作.     

一种嵌入式SIMD协处理器地址产生器的设计

文章介绍了一种新的嵌入式SIMD协处理器地址产生器.该地址产生器主要完成地址计算和协处理器指令的场抽取功能.为了提高协处理器的性能,地址产生器中设计了新的传送路径.该传送路径能够不通过地址产生器中的ALU而把数据送入寄存器中,这个传送路径能够减少ldN指令的一个延迟周期.在SMIC0.18微米标准库单元下,该地址产生器的延迟能够满足周期为10ns的协处理器.     

GRCC:一种通用可重构协处理器

描述了一种改进型可重构处理器--GRCC(General Reconfigurable Coprocessor).该处理器能够使用一般通用RISC处理器的协处理器接口,通过与通用处理器的协处理器指令通信,达到辅助主处理器进行大规模密集计算的目的.着重介绍了DCT算法在GRCC中的映射与实现,仿真结果显示,GRCC能达到6倍以上于通用处理器的性能,并在实现复杂度、运行效率与通用性中达到了一个权衡.     

一种基于数字信号处理器的媒体处理器结构及设计

设计了一种针对图像、音频、视频等多媒体数据的处理新型结构的媒体处理器。该媒体处理器由一个通用数字信号处理器及多媒体协处理器构成,其指令集包含了通用的数字信号处理指令及扩展的多媒体处理指令。多媒体协处理器中包含了多个专用于多媒体处理的功能模块,可以加速多媒体处理的进行。该媒体处理器具有强大的多媒体处理能力,可实现对JPEG压缩图像、MP3音频流或MPEG2的MP@ML级别的压缩视频流的实时解码。     

基于混合踪迹的智能处理器模型和评估分析

近年来,紧耦合智能处理器在资源受限的边缘侧智能处理器应用中受到了广泛关注.但是针对主协处理器在流水线耦合关系做早期设计空间探索时,存在硬件资源关系共享性,数据通路结构复杂多样化以及片上主协计算特征异构性的特点,使得针对智能处理器的仿真评估建模面临着挑战.本文针对紧耦合智能处理器的结构特点,将硬件结构抽象成为软件仿真模型框架,通过对主协处理器基本硬件资源分析,分解指令控制的不同数据通路,设计智能处理器仿真模型.将主处理器与智能协处理器分别采用踪迹仿真和模型解析的方法,引入混合踪迹记录时间戳以统计部件访问信息,结合基于解析的性能评估算法,实现对智能处理器的性能评估.实验结果表明,基于混合踪迹的智能处理器模型和评估分析可以有效的解出智能计算的实际执行结果,并评估得到硬件的性能,包括延时,能耗和功耗等重要参数.     

基于FPGA的AES密码协处理器的设计和实现

文章基于FPGA设计了一种能完成AES算法加密的密码协处理器，设计中利用VirtexⅡ系列FPGA的结构特点，对AES算法的实现做了优化。实验证明，这种实现方式用较少的电路资源达到了较高的数据吞吐率。该密码协处理器还提供了和ARM处理器的接口逻辑，实现了用于加／解密和数据输入输出的协处理器指令．作为ARM微处理器指令集的扩展，大大提高了嵌入式系统处理数据加／解的效率，实现数据的安全传输。     

并行视频运动估计协处理器设计

本文重点研究通用视频处理器(VSP)中运动估计协处理器的设计。该设计提出了一种将常用的并行SIMD结构与流水线MISD结构相结合的新颖并行视频处理体系结构形式。协处理器中各个模块单独设计，经由指令调用来实现不同的算法。兼顾到不同格式视频序列的通用性以及灵活性等要求，协处理器可以同时激活最多8个同类模块并行协同工作以实现对不同格式图像块的处理。该设计结构非常简单，易于实现。目前，已经通过VSP芯片整体的指令级与功能级仿真与验证。结果表明，当系统时钟为80MHz时，运动估计协处理器与VSP的其它功能部件及指令部件可以有机协调地工作。     

一种适用于多种公钥密码算法的模运算处理器

文章设计了一种能够实现多种公钥密码算法（如RSA、ECC、DSA等）的协处理器。通过分析几种常用的公钥密码算法，归纳了一组最常用的基本模运算指令。基于基本指令，设计优化了处理器硬件结构。用微代码循环调用执行这些基本指令，实现其他各种模运算指令。基于这些模运算指令，处理器可实现多种公钥密码算法的运算。该处理器支持从106位到2048位多种长度的模运算。采用流水线结构设计，处理速度较快。处理器占用芯片面积小，核心电路等效门数约为26000门，适用于智能卡等对芯片面积有严格限制的应用。     

一种DSP和通用CPU一体化的处理器架构及其4核实现

提出了一种DSP和通用CPU一体化的处理器架构,并完成了一款基于该架构的同构4核处理器设计和流片验证.该处理器基于VLIW结构,支持自主定义的DSP指令系统,兼容现有通用的MIPS 4KC处理器指令集,支持最大8个指令通道的并行发射.处理器在不改变CPU的指令编码以及执行顺序的前提下,实现了芯片结构上的DSP和CPU执行处理的一体化,适合在统一的平台上同时完成宽带通信和多媒体的信号和协议处理的嵌入式应用开发.处理器内核通过自主定义的DSP指令字中前后并行标识位和一条专用的前导paralink指令实现了DSP与CPU指令的并行发射.在4核处理器的同构架构上,采用了全局读局部写的多核间片上数据存储策略,在控制硬件开销的基础上实现片上数据的共享.仿真和流片验证结果表明,所提出的DSP和CPU一体化处理器架构可行,在宽带通信和多媒体等嵌入式应用上具有优势.     

Resolution Enhancement Technology:Integrated Process Solutions using OPC

DUV lithography, using the 248 nm wavelength, is a viable manufacturing option for devices with features at 130 nm and less. Given the low kl value of the lithography, integrated process development is a necessary method for achieving acceptable process latitude. The application of assist features for rule based OPC requires the simultaneous optimization of the mask, illumination optics and the resist.Described in this paper are the details involved in optimizing each of these aspects for line and space imaging.A reference pitch is first chosen to determine how the optics will be set. The ideal sigma setting is determined by a simple geometrically derived expression. The inner and outer machine settings are determined, in turn,with the simulation of a figure of merit. The maximum value of the response surface of this FOM occurs at the optimal sigma settings. Experimental confirmation of this is shown in the paper.Assist features are used to modify the aerial image of the more isolated images on the mask. The effect that the diffraction of the scattering bars (SBs) has on the image intensity distribution is explained. Rules for determining the size and placement of SBs are also given.Resist is optimized for use with off-axis illumination and assist features. A general explanation of the material' s effect is discussed along with the affect on the through-pitch bias. The paper culminates with the showing of the lithographic results from the fully optimized system.     

Cost-effective test solutions for smart card and other integrated flash applications

From its emergence in the late 1980s as a lower cost alternative to early EEPROM technologies, flash memory has evolved to higher densities and speedsand rapidly growing acceptance in mobile applications.In the process, flash memory devices have placed increased test requirements on manufacturers. Today, as flash device test grows in importance in China, manufacturers face growing pressure for reduced cost-oftest, increased throughput and greater return on investment for test equipment. At the same time, the move to integrated flash packages for contactless smart card applications adds a significant further challenge to manufacturers seeking rapid, low-cost test.     

Theoretical analysis of the relationship between the Brillouin gain coefficient and the strain in the optical-fiber sensors

The relation between the power of the Brillouin signal and the strain is one of the bases of the distributed fiber sensors of temperature and strain. The coefficient of the Bfillouin gain can be changed by the temperature and the strain that will affect the power of the Brillouin scattering. The relation between the change of the Brillouin gain coefficient and the strain is thought to be linear by many researchers. However, it is not always linear based on the theoretical analysis and numerical simulation. Therefore, errors will be caused if the relation between the change of the Brillouin gain coefficient and the strain is regarded as to be linear approximately for measuring the temperature and the strain. For this reason, the influence of the parameters on the Brillouin gain coefficient is proposed through theoretical analysis and numerical simulation.     

An improved parallel thinning algorithm with two subiterations

The parallel thinning algorithm with two subiterations is improved in this paper. By analyzing the notions of connected components and passes, a conclusion is drawn that the number of passes and the number of eight-connected components are equal. Then the expression of the number of eight-connected components is obtained which replaces the old one in the algorithm. And a reserving condition is proposed by experiments, which alleviates the excess deletion where a diagonal line and a beeline intersect. The experimental results demonstrate that the thinned curve is almost located in the middle of the original curve connectivelv with single pixel width and the processing speed is high.     

Novel fiber-optical interferometer with miniaturized probe for in-hole measurements

Today, micro-system technology and the development of new MEMS （Micro-Electro-Mechanical Systems） are emerging rapidly. In order for this development to become a success in the long run, measurement systems have to ensure product quality. Most often, MEMS have to be tested by means of functionality or destructive tests. One reason for this is that there are no suitable systems or sensing probes available which can be used for the measurement of quasi inaccessible features like small holes or cavities. We present a measurement system that could be used for these kinds of measurements. The system combines a fiber optical, miniaturized sensing probe with low-coherence interferometry, so that absolute distance measurements with nanometer accuracy are possible.     

Study of waveguide coupling efficiency in hybrid silicon lasers

This paper presents a new method to increase the waveguide coupling efficiency in hybrid silicon lasers. We find that the propagation constant of the InGaAsP emitting layer can be equal to that of the Si resonant layer through improving the design size of the InP waveguide. The coupling power achieves 42% of the total power in the hybrid lasers when the thickness of the bonding layer is 100 nm. Our result is very close to 50% of the total power reported by Intel when the thickness of the thin bonding layer is less than 5 nm. Therefore, our invariable coupling power technique is simpler than Intel＇s.     

Teleportation of an arbitrary unknown N-qubit entangled state under the controlling of M controllers

A new quantum protocol to teleport an arbitrary unknown N-qubit entangled state from a sender to a fixed receiver under M controllers(M < N) is proposed. The quantum resources required are M non-maximally entangled Greenberger-Home-Zeilinger (GHZ) state and N-M non-maximally entangled Einstein-Podolsky-Rosen (EPR) pairs. The sender performs N generalized Bell-state measurements on the 2N particles. Controllers take M single-particle measurement along x-axis, and the receiver needs to introduce one auxiliary two-level particle to extract quantum information probabilistically with the fidelity unit if controllers cooperate with it.     

Diode-end-pumped Nd:YVO4/LBO lasers with 4.2W continuous-wave output at 457 nm

A continuous-wave (CW) 457 nm blue laser operating at the power of 4.2 W is demonstrated by using a fiber coupled laser diode module pumped Nd: YVO4 and using LBO as the intra-cavity SHG crystal With the optimization of laser cavity and crystal parameters, the laser operates at a very high efficiency. When the pumping power is about 31 W, the output at 457nm reaches 4.2 W, and the optical to optical conversion efficiency is about 13.5% accordingly. The stability of the out putpower is better than 1.2% for 8 h continuously working.     

Call for Papers

正Wireless Body-area Networks The last decade has witnessed the convergence of three giant worlds:electronics,computer science and telecommunications.The next decade should follow this convergence in most of our activities with the generalization of sensor networks.In particular with the progress in medicine,people live longer and the aging of population will push the development of wireless personal networks     

Call for Papers—Feature Topic,Vol.12,No.7,2015

正Information Centric Networking Information-Centric Networking(ICN) is an emerging direction in Future Internet architecture research,gaining significant tractions among academia and industry.Aiming to replace the conventional host-to-host communication model by a data-centric model,ICN treats data content as the first