A lateral metal—insulator—p-Si tunnel transistor

We report the fabrication of a lateral MIS tunnel transistor whose emitter and collector are Al/SiO2/p-Si tunnel junctions. All processing is carried out at room temperature except for the growth of the passivating field oxide. The small signal common emitter current gain is 20. Two coupled gain mechanisms exist for such a lateral MIS tunnel transistor. The first mechanism relies on a high minority-carrier injection ratio of the emitter junction. Second, the minority carriers injected into the reverse-biased collector junction may produce additional gain through multiplication of majority-carrier current. Lateral MIS tunnel transistors on n-Si make use of the second mechanism. Our device takes advantage of the high minority-carrier injection ratio achievable with Al/SiO2/p-Si tunnel junctions.     

An analytical model for the low- emitter-impurity-concentration transistor

The epitaxial transistor model developed by Grung and Warner is adapted for predicting the characteristics of the low-emitter-impurity-concentration (LEC) transistor. The model predicts the following results for the low region (the lightly-doped emitter region): through a given cross section, the minority-carrier drift current is typically larger than the minority-carrier diffusion current. In other words, the model predicts that the conventional low-level minority-carrier diffusion equation is invalid for the low region, especially for typical bias levels. As a result, the effect of the electric field on minority carriers cannot be neglected in the low region of the LEC transistor and (by extension) in the corresponding low regions of such devices as the epitaxial diode and the integrated-injection-logic transistor.     

On the modeling of polysilicon emitter bipolar transistors

In this paper, an attempt is made to derive a general analytical formulation for the current gain and emitter transit time of a polysilicon emitter bipolar transistor (BJT), which includes all previous models as particular cases. Firstly, it is shown that the minority-carrier injection and storage in the polysilicon region can be simply described by effective values of the minority-carrier diffusion length and mobility. These quantities are precisely defined, and depend on the microscopic transport properties of polysilicon grains and grain boundaries. Secondly, a general expression for the effective recombination velocity relative to the poly/mono interface is derived, which includes, and in some cases extends, all previous approaches. This results in a simple and general formulation which avoids some unnecessary simplification present in nearly all previous treatments, and allows easy comparison of the different models for the poly/mono interface and a clear assessment of the relevance of each physical mechanism. Finally, minority-carrier injection and storage in the single-crystal region is addressed. The effect of oxide breakup on both current gain and emitter transit time is also considered, and different models are compared     

Interfacial oxide, grain size, and hydrogen passivation effects onpolysilicon emitter transistors

The influence of several process variables on the characteristics of polysilicon emitter transistors is studied. The diffusion length of the polysilicon layer was increased using hydrogen passivation, resulting in an increase in the transistor current gain. The increase observed was less than that predicted by the T.H. Ning and R.D. Isaac (1980) transport model, especially at high emitter doping levels. Similarly, the polysilicon grain size had a smaller effect on the current gain than predicted by this model. On the other hand, an increase in the interfacial layer thickness caused a large increase in the emitter efficiency and also resulted in retarded arsenic diffusion and increased emitter resistance and base current ideality factor. The results suggest that reflection of minority carriers at the interface plays a dominant role in determining the emitter Gummel number in devices with heavily doped emitters     

On the transport theory of Schottky barriers to polycrystalline silicon thin films

A theoretical investigation of electronic transport in metal contacts to polycrystalline silicon thin films is presented. Calculations based upon the reported values of grain-boundary potentials indicate that the thermionic emission theory may be applied to the majority-carrier transport only for low bias voltages. At larger bias voltages, one needs to take account of the voltage lost to the space-charge regions adjacent to the grain boundaries, and a transition from electrode-limited to bulk-limited majority-carrier transport results. We further demonstrate that the injection of minority carriers can dominate the dark current for a range of grain size and interface state densities at the grain boundaries. Under these conditions, the current obeys anexp (qV/2kT)dependence reminiscent of space-charge recombination, although the origin of the current in this case is minority-carrier diffusion current, with recombination only at grain boundaries in the neutral region. This is a special case of the "high-injection" regime observed in single crystals, but in the present situation it is found even for low bias voltages as a consequence of the band bending at the grain boundaries, which makes the material nearly intrinsic at these points. Finally, we show that the effective minority-carrier diffusion length for the injected carriers under dark conditions itself increases with bias voltageVapproximately asexp (qV/2kT), in striking contrast to previous treatments.     

A comprehensive analytical and numerical model of polysilicon emitter contacts in bipolar transistors

A comprehensive model-both analytical and numerical-is proposed as a tool to analyze heavily doped emitters of transistors with polycrystalline silicon (polysilicon) contacts. The grains and grain boundaries of polysilicon, the interfacial oxide-like layer between polycrystalline and monocrystalline silicon are lumped respectively into "boxes" in which the drift minority current component is neglected. The mobility reduction of carriers in polysilicon on the whole is explicitly attributed to the additional scattering due to the lattice disorder in the grain boundaries and the carrier tunneling through the interface. The effect of the poly-contacts on transistors can be modeled as a reduced surface recombination velocity for minority carriers in combination with a series emitter resistance for majority carriers. Furthermore, by characterizing the monocrystalline emitter with an effective recombination velocity, the effect of the polysilicon layer on the current gain can be analyzed analytically. Computer simulation is used to verify the assumptions of the model formulation. Using published data [1], the analytical and numerical approaches are compared and it is shown that for these devices a unique combination of physical parameters are needed for the model to fit the data.     

Physics, technology, and modeling of polysilicon emitter contacts for VLSI bipolar transistors

The physics of minority-carrier injection into polysilicon-contacted emitters has been studied through a series of experiments correlating the base current of the transistor to the structure of the polysilicon/single-crystal silicon interface. Most of the relevant material and processing parameters have been examined. In addition, a novel approach has been taken in the modeling of transport in these emitters to quantify the minority-carrier blocking properties of the polysilicon contacts. Experimental results show that extremely low values of base current can be obtained for devices etched in HF prior to the polysilicon deposition, i.e., devices with only a remnant "native" oxide layer at the polysilicon/single-crystal silicon interface. For these devices, the base current is mainly determined by the recombination and blocking of minority carriers at the polysilicon/monosilicon interface. A number of competing mechanisms exist in several domains of doping, temperature, and time which influence the properties of this interface. One of these mechanisms is the blocking of minority carriers by the native oxide layer itself. The uniformity and, consequently, the blocking characteristics of this layer were found to be strongly affected by the polysilicon doping level and thermal treatment.     

Minority-carrier injection into polysilicon emitters

The hole transport equation is solved for a polysilicon emitter of a bipolar transistor. The recombination at the grain boundaries as well as at the poly-monosilicon interface is considered. An effective surface recombination velocity is defined and calculated as a function of surface state density and number of grain boundaries. A comparison between the injected hole current into the diffused region of both an Al contact and a polysilicon-silicon emitter is given as a function of surface state density for different numbers of grain boundaries. Also the injected current is calculated for different values of junction depth and surface concentration.     

Analytical modeling of oxide breakup effect on base current in n+-polysilicon emitter bipolar devices

The authors have modeled the base current change with different percentages of broken interface-oxide area (interface void). A pseudo-two-dimensional structure of dual channels of minority-carrier transport at the interface between the polysilicon and the silicon emitter, is constructed in analogy with an electrically equivalent conductance network. Using the conductance network, an analytical expression of base current is easily derived. For typical polysilicon emitter devices of ~10-15 Å interface oxide, the experimental results show that the strong dependence of base current on the fraction of interface void can be modeled. The simulation predicts that the base current will be insensitive to the fraction of interface oxide breakup for very thin interface-oxide polysilicon emitter devices. Recent reports on finding a process window between current gain and emitter resistance optimization in a certain range of interface breakup ratios are confirmed by the model     

Coherent transistor

The high-frequency operation of an abrupt-heterojunction transistor with ballistic transport in the base is considered. The coherent regime arises at temperatures low enough compared to the injection energy that the injected minority carriers form a nearly collimated and monoenergetic beam. The coherent transistor can have both current gain and power gain at frequencies far above the conventional cutoff. The extended frequency of an intrinsic transistor is limited by the dispersion in the minority-carrier times of flight across the base, rather than the average time of flight itself. The unilateral gain U calculated for an exemplary heterostructure, including the parasitics, demonstrates an active behavior of the coherent transistor in extended frequency ranges     

Transit time and charge storage measurements in heavily doped emitters

We report results of a first direct measurement of the minority-carrier transit time in a transparent heavily doped emitter layer. The value was obtained by a high-frequency conductance method recently developed and used for low-doped Si. The transit time coupled with the steady-state current enables the determination of the quasi-static charge stored in the emitter and the quasi-static emitter capacitance. Using a transport model, we estimated, from the measured transit time, the value for the minority-carrier diffusion coefficient and mobility. The measurements were done using a heavily doped emitter of the Si p+-n-p bipolar transistor. The new result indicates that the position-averaged minority-carrier diffusion coefficients may be much smaller than the corresponding majority-carrier values for emitters having a concentration ranging from about 3 × 10¹⁹cm^-3to 10²⁰cm^-3.     

低温多晶硅发射极晶体管电流增益和截止频率的解析模型

本文综合考虑了多晶硅发射极的载流子输运障碍,界面氧化物遂穿、晶粒间界杂质分凝和界面能带弯曲等因素,以及禁带变窄效应、低温下载流子冻析效应和浅能能补偿杂质隐阱效应,建立了低温多晶硅发射极晶体管电流增益和截止频率的解析模型,对电流增益和截止频率的温度关系进行了理论分析并与３００Ｋ和７７Ｋ下的实测结果进行了比较。     

An analytical model for determining carrier transport mechanism of polysilicon emitter bipolar transistors

An analytical model is proposed by including carrier transport mechanisms which previous unified analytical models do not consider: minority carrier combination at both sides of polysilicon-silicon interfacial oxides and thermionic emission over segregation potential barriers for determining the precise carrier transport mechanisms which govern current gain and specific emitter interfacial resistivity. This approach allows us to gain an insight into carrier transport mechanisms and provides a distinct image for polysilicon emitter bipolar devices. With the consideration of the interfacial capture cross section as a function of temperature, the dependence of current gain for devices given an HF etch prior to polysilicon deposition on temperature is first explained successfully. For improving device performance, some directive suggestions are presented.<>     

低温硅双极晶体管电流增益研究

着重分析了多晶硅发射极对提高电流增益的作用和低温下集电区中性杂质碰撞电离引起的电流倍增效应，导出多晶硅发射极晶体管电流增益的表达式，很好地解释了实验结果。     

多晶硅发射区中的少数载流子注入理论

本文提出了一种新的多晶硅发射区少数载流子注入理论.考虑了晶粒间界厚度和其中的少数载流子复合,假设晶粒间界和晶粒具有不同的少数载流子迁移率和寿命.引入少数载流子迁移率和寿命随多晶硅厚度变化的函数,通过求解与单晶硅少数载流子注入形式上完全相同的连续性方程,不仅得到了前人关于晶粒间界对少数载流子具有阻碍和复合双重作用的结论,而且成功地区分了不同晶粒间界对降低注入饱和少数载流子电流贡献的大小.其中,第一个晶粒间界能够最有效地减少注入饱和少数载流子电流.与此同时,本文还得到了能够降低注入饱和少子电流百分之十以上的有效晶粒间界个数与晶粒/晶粒间界界面态密度和晶粒大小之间的关系.     

Polycrystalline silicon-germanium emitters for gain control, with application to SiGe HBTs

This paper investigates germanium incorporation into polysilicon emitters for gain control in SiGe heterojunction bipolar transistors. A theory for the base current of a polySiGe emitter is developed, which combines the effects of the polySiGe grains, the grain boundaries and the interfacial layer at the polySiGe/Si interface into an expression for the effective surface recombination velocity of a polySiGe emitter. Silicon bipolar transistors are fabricated with 0, 10 and 19% Ge in the polySiGe emitter and the variation of base current with Ge content is characterized. The measured base current for a polySiGe emitter increases by a factor of 3.2 for 10% Ge and 4.0 for 19% Ge compared with a control transistor containing no germanium. These values are in good agreement with the theoretical predictions. The competing mechanisms of base current increase by Ge incorporation into the polysilicon and base current decrease due to an interfacial oxide layer are investigated.     

Self-aligned transistors with polysilicon emitters for bipolar VLSI

A new bipolar process technology for fabricating self-aligned transistors with polysilicon contacted emitters is described. The extrinsic base regions of the transistor are self-aligned to the emitter contact by exploiting the effects of concentration-dependent oxidation to selectively oxidize the polysilicon. The shallow emitter is fabricated with a thin oxide layer at the polysilicon-silicon interface, thereby enhancing the emitter efficiency and thus the current gain of the device. It is demonstrated that this gain enhancement can be traded for a considerable increase in active base doping, with a resulting decrease in base resistance and potential improvement in switching performance. Under certain circumstances, non-ideal electrical characteristics can be obtained from the self-aligned transistor which are caused by lateral spread of the extrinsic base region beneath the sidewall oxide of the polysilicon emitter contact. This leads to the formation of p⁺-n⁺junction at the periphery of the emitter and hence to tunneling of carriers across this region. It is shown that the same tunneling mechanism also limits the extent to which the active base doping can be increased. In order to avoid the formation of the peripheral p⁺-n⁺junction, a polysilicon base contact is employed which allows a self-aligned extrinsic base region to be fabricated with negligible lateral movement.     

Self-Aligned Transistors with Polysilicon Emitters for Bipolar VLSI

A new bipolar process technology for fabricating self-aligned transistors with polysilicon contacted emitters is described. The extrinsic base regions of the transistor are self-aligned to the emitter contact by exploiting the effects of concentration-dependent oxidation to selectively oxidize the polysilicon. The shallow emitter is fabricated with a thin oxide layer at the polysilicon-silicon interface, thereby enhancing the emitter efficiency and thus the current gain of the device. It is demonstrated that this gain enhancement can be traded for a considerable increase in active base doping, with a resulting decrease in base resistance and potential improvement in switching performance. Under certain circumstances, non-ideal electrical characteristics can be obtained from the self-aligned transistor which are caused by lateral spread of the extrinsic base region beneath the sidewall oxide of the polysilicon emitter contact. Tlris leads to the formation of p/sup +/ -n/sup +/ junction at the periphery of the emitter and hence to tunneling of carriers across this region. It is shown that the same tunneling mechanism also limits the extent to which the active base doping can be increased. In order to avoid the formation of the peripheral p/sup +/-n/sup +/ junction, a polysilicon base contact is employed which allows a self-aligned extrinsic base region to be fabricated with negligible lateral movement.     

Forward transient behavior of P-N junction diodes at high injection levels

By use of the finite-difference method of numerical analysis, a detailed numerical solution is obtained for the complete one-dimensional continuity equation, to study the transient and steady-state behavior of p-n junction diodes at moderate-to-high injection levels. The solution of the continuity equation is obtained for minority carriers in the base of a diode under the influence of drift, diffusion, and recombination. From the calculated distribution of minority carriers in the base, minority-carrier and majority-carrier currents and their components are obtained. The electric field and its components in the base are determined, and the total voltage across the diode and its components are calculated. All results are obtained for transient and steady-state conditions. The effect of variations of certain physical parameters on the diode behavior is investigated. All calculations were performed on the IBM 709 digital computer.     

Influence of the dopant density profile on minority-carrier current in shallow,heavily doped emitters of silicon bipolar devices

Experimental determination of the dependence of recombination current in p⁺ and n⁺ regions on the dopant profile for shallow emitters of ion-implanted silicon solar cells is described. The results are analyzed by extending a previous analytical model for the transport of minority carriers in heavily doped regions. The extension accounts for an effective electric field, defined by heavy-doping effects at the surface, and suggests that the energy-gap narrowing for p⁺ silicon is slightly smaller than that for n⁺ silicon and/or that minority-carrier diffusivities are substantially lower than the majority-carrier ones at comparable dopant densities. The very high dopant densities achieved with the ion implantation/laser annealing technique provide an in situ surface passivation that supresses surface recombination and minimizes the emitter recombination current.