Rapid thermal annealing of dual Si and P implants in InP

In this study we evaluate the effects of dual implantation with different doses of Si and P on dopant activation efficiency and carrier mobility in InP:Fe. The implants were activated by a rapid thermal annealing step carried out in an optimized phosphoruscontaining ambient. For high dose implants (10¹⁴–10¹⁵ cm⁻²), which are typically employed for source/drain regions in FETs, dual implantation of equal doses of Si and P results in a higher sheet carrier concentration and lower sheet resistance. For 10¹⁴ cm⁻² Si implants at 150 keV, the optimal P co-implant dose is equal to the Si dose for most anneal temperatures. We obtain an activation efficiency of ∼70% for dual implanted samples annealed at 850° C for 10 sec. The high activation efficiencies and low sheet resistances obtained in this study emphasize the importance of stoichiometry control through the use of P co-implants and a phosphorus-containing ambient during the thermal processing of InP.     

Ultra-shallow junction formation by spike annealing in a lamp-based or hot-walled rapid thermal annealing system: effect of ramp-up rate

Ultra-shallow p-type junction formation has been investigated using 1050°C spike anneals in lamp-based and hot-walled rapid thermal processing (RTP) systems. A spike anneal may be characterized by a fast ramp-up to temperature with only a fraction of a second soak-time at temperature. The effects of the ramp-up rate during a spike anneal on junction depth and sheet resistance were measured for rates of 40, 70 and 155°C/s in a lamp-based RTP, and for 50 and 85°C/s in a hot-walled RTP. B⁺ implants of 0.5, 2 and 5 keV at doses of 2×10¹⁴ and 2×10¹⁵ cm⁻² were annealed. A significant reduction in junction depth was observed at the highest ramp-up rate for the shallower 0.5-keV B implants, while only a marginal improvement was observed for 2- and 5-keV implants. It is concluded that high ramp-up rates can achieve the desired ultra-shallow junctions with low sheet resistance but only when used in combination with spike anneals and the lowest energy implants.     

The behaviour of boron molecular ion implants into silicon

Implants of boron molecular ions into silicon have been studied using a variety of experimental techniques, but with emphasis on sheet resistance annealing characteristics and transmission electron microscopy. Boron halide compound molecules have been implanted and equivalent dose sequential implants of atomic species used as control conditions. The implants studied were B⁺, BCl₂⁺, BCl⁺, Cl⁺ + B⁺, BF₂⁺, BF⁺ and B⁺ + F⁺ at 25 keV/B atom and B⁺, BBr₂⁺ and Br₂⁺ + B⁺ at 12 keV/B atom.The implantation of molecular ions enables conditions of varying damage to be studied with constant dose, dose rate and energy of the dopant species. In addition to damage effects the halogen atoms produce species effects in the implanted zone. The escape of the halogen atoms has been measured as a function of the annealing temperature.The significant differences which exist between the behaviour of silicon implanted with these various conditions are considered with reference to the damage structures observed by transmission electron microscopy. The boron-fluorine molecular implants are shown to offer some advantages as a means of implanting boron.     

Characterization of phosphorus implantation in 4H-SiC

We report the characterization of phosphorus implantation in 4H-SiC. The implanted layers are characterized by analytical techniques (secondary ion mass spectrometry, transmission electron microscopy) as well as electrical and a sheet resistance value as low as 160 Ω/□ has been measured. We have also studied the effect of annealing time and temperature on activation of phosphorus implants. It has been shown to possible to obtain low sheet resistance (∼260 Ω/□) by annealing at a temperature as low as 1200°C. High-dose (∼ 4 × 10¹⁵ cm⁻²) implants are found to have a higher sheet resistance than that on lower dose implants which is attributed to the near-surface depletion of the dopant during high temperature anneal. Different implantation dosages were utilized for the experiments and subsequently junction rectifiers were fabricated. Forward characteristics of these diodes are observed to obey a generalized Sah-Noyce-Shockly multiple level recombination model with four shallow levels and one deep level.     

Effects of “fast” rapid thermal anneals on sub-keV boron and BF2 ion implants

The effects of “fast” ramp-rates (up to 425°C/s) and spike anneals are investigated for 0.25 keV, 0.5 keV, and 1.0 keV ¹¹B+ and for 1.1 and 2.2 keV BF₂ at a dose of 1e 15/cm². Below an implant energy threshold where no extended defects form, fast ramp-rates become important in minimizing the thermal diffusion component and reducing the junction depth. Above this implant energy threshold, TED minimizes the advantages of these fast ramp-rates. Annealing in a low and controlled O₂ ppm in N₂ ambient further reduces diffusion by minimizing/eliminating oxygen related enhanced diffusion effects, while simultaneously optimizing anneal reproducibility and across-the-wafer uniformity.     

Optimization of RTA parameters to produce ultra-shallow, highly activated B+, BF 2 + , and As+ ion implanted junctions

The effects of time, temperature, ramp-up, and ramp-down rates with rapid thermal annealing employing a STEAG AST SHS3000 were investigated on 1.0 and 2.0 keV ¹¹B⁺, 2.2, 5.0, and 8.9 keV ⁴⁹BF ₂ ⁺ , and 2 KeV ⁷⁵As⁺, 1E15/cm² samples implanted in a Varian VIISion-80 PLUS ion implanter at 0^o tilt angles. These annealed samples were analyzed by four-point probe, secondary ion mass spectrometry (SIMS), and in select cases by spreading resistance profiling (SRP) and transmission electron microscopy (TEM). To ensure reproducibility and to minimize oxidation enhanced diffusion as an uncontrolled variable, the O₂ background concentration in N₂ was maintained at a controlled low level. Under these conditions, ramp-rates alone were found not to be significant. Spike anneals (1050°C, ～ 0 s) with fast ramp-rates (240°C/s) and fast cool down rates (86°C/s) provided the shallowest junctions, while still yielding good sheet resistance values. Post annealed samples were examined for extended defect levels (by TEM) and trapped interstitial concentrations. Fluorine concentration measurements were employed to qualitatively explain differences in the B diffusion from ¹¹B⁺ and ⁴⁹BF ₂ ⁺ ion implants at various energies. The 2.2 keV ⁴⁹BF ₂ ⁺ “fast” spike annealed sample at 1050°C exhibited limited, if any, enhanced diffusion, yielding a SIMS junction depth of 490Å, an electrical junction of 386Å (by SRP) and a sheet resistance of 406 ohm/sq.     

Comparison of Solid-State Microwave Annealing with Conventional Furnace Annealing of Ion-Implanted SiC

Rapid solid-state microwave annealing was performed for the first time on N⁺-, Al⁺-, and B⁺-implanted SiC, and the results were compared with the conventional furnace annealing. For microwave annealing, temperatures up to 2,000 °C were attained with heating rates exceeding 600 °C/s. An 1,850 °C/35 s microwave anneal yielded a root-mean-square (RMS) surface roughness of 2 nm, which is lower than the 6 nm obtained for 1,500 °C/15 min conventional furnace annealing. For the Al implants, a minimum room-temperature sheet resistance (R _s ) of 7 kΩ/□ was measured upon microwave annealing. For the microwave annealing, Rutherford backscattering (RBS) measurements indicated a better structural quality, and secondary-ion-mass-spectrometry (SIMS) boron implant depth profiles showed reduced boron redistribution compared to the corresponding results of the furnace annealing.     

Silicon and selenium implantation and activation in In0.53Ga0.47As under low thermal budget conditions

Si and Se implantations have been systematically investigated in In_0.53Ga_0.47As. Different implant doses and various activation anneals with temperatures up to 700 °C have been examined. Raising Si implant dose from 1 × 10¹⁴ to 1 × 10¹⁵ cm⁻² was found to increase the active doping concentration by about a factor of two. As confirmed by Transmission Electron Microscopy (TEM) and electrical measurements, the rest of the implanted Si ions remain as defects in the crystal and degrade the mobility. It was also confirmed from Secondary Ion Mass Spectrometry (SIMS) that the Si diffusivity in InGaAs is negligible up to 700 °C implant activation anneal making Si a suitable option for the formation of shallow junctions in InGaAs. The activation efficiency, sheet resistance, carrier density and mobility data of 25 keV Se and Si implanted InGaAs layers are also presented under various activation anneal temperatures.     

Exfoliation and blistering of Cd<Subscript>0.96</Subscript>Zn<Subscript>0.04</Subscript>Te substrates by ion implantation

As part of a series of wafer bonding experiments, the exfoliation/blistering of ion-implanted Cd_0.96Zn_0.04Te substrates was investigated as a function of postimplantation annealing conditions. (211) Cd_0.96Zn_0.04Te samples were implanted either with hydrogen (5×10¹⁶ cm⁻²; 40–200 keV) or co-implanted with boron (1×10¹⁵ cm⁻²; 147 keV) and hydrogen (1–5×10¹⁶ cm⁻²; 40 keV) at intended implant temperatures of 253 K or 77 K. Silicon reference samples were simultaneously co-implanted. The change in the implant profile after annealing at low temperatures (<300°C) was monitored using high-resolution x-ray diffraction, atomic force microscopy (AFM), and optical microscopy. The samples implanted at the higher temperature did not show any evidence of blistering after annealing, although there was evidence of sample heating above 253 K during the implant. The samples implanted at 77 K blistered at temperatures ranging from 150°C to 300°C, depending on the hydrogen implant dose and the presence of the boron co-implant. The production of blisters under different implant and annealing conditions is consistent with nucleation of subsurface defects at lower temperature, followed by blistering/exfoliation at higher temperature. The surface roughness remained comparable to that of the as-implanted sample after the lower temperature anneal sequence, so this defect nucleation step is consistent with a wafer bond annealing step prior to exfoliation. Higher temperature anneals lead to exfoliation of all samples implanted at 77 K, although the blistering temperature (150–300°C) was a strong function of the implant conditions. The exfoliated layer thickness was 330 nm, in good agreement with the projected range. The “optimum” conditions based on our experimental data showed that implanting CdZnTe with H⁺ at 77 K and a dose of 5×10¹⁶/cm² is compatible with developing high interfacial energy at the bonded interface during a low-temperature (150°C) anneal followed by layer exfoliation at higher (300°C) temperature.     

Characterization of buried SiO2 layers formed by ion implantation of oxygen

Oxygen has been ion implanted (200 keV) into silicon at doses ranging from 2E17/cm² to 2E18/cm². The peak oxygen concentration occurs at a depth of 0.5 μm. These doses produce peak oxygen concentrations which are below and above the concentrations necessary to form stoichiometric SiO₂. If the oxygen concentration exceeds stoichiometry, a buried SiO₂ layer is formed with a thin superficial silicon layer on the surface. This superficial silicon layer has been used as a seed for growing single crystal silicon epi. The resulting Silicon on Insulator (SOI) structure has been characterized by Rutherford backscattering, cross-sectional TEM, AES, optical microscopy, spreading resistance probe, Hall effect and infrared transmission measurements. The effects of dose, substrate temperature during the implant, and subsequent anneal conditions have been examined.     

Halogen lamp rapid thermal annealing of Si- and Be-implanted In0.53Ga0.47As

Halogen lamp rapid thermal annealing was used to activate 100 keV Si and 50 keV Be implants in In_0.53Ga_0.47As for doses ranging between 5 × 10¹²−4 × 10¹⁴ cm⁻². Anneals were performed at different temperatures and time durations. Close to one hundred percent activation was obtained for the 4.1 × 10¹³ cm⁻² Si-implant, using an 850° C/5 s anneal. Si in-diffusion was not observed for the rapid thermal annealing temperatures and times used in this study. For the 5 × 10¹³ cm⁻² Be-implant, a maximum activation of 56% was measured. Be-implant depth profiles matched closely with gaussian profiles predicted by LSS theory for the 800° C/5 s anneals. Peak carrier concentrations of 1.7 × 10¹⁹ and 4 × 10¹⁸ cm⁻³ were achieved for the 4 × 10¹⁴ cm⁻² Si and Be implants, respectively. For comparison, furnace anneals were also performed for all doses.     

Hot-implantation of nitrogen donors into p- type α-SiC and characterization of n+-p junction

N⁺ implantation into p-type a-SiC (6H-SiC, 4H-SiC) epilayers at elevated temperatures was investigated and compared with implantation at room temperature (RT). When the implant dose exceeded 4 × 10₁₅ cm₋₂, a complete amorphous layer was formed in RT implantation and severe damage remained even after post implantation annealing at 1500°C. By employing hot implantation at 500~800°C, the formation of a complete amorphous layer was suppressed and the residual damage after annealing was significantly reduced. For implant doses higher than 10¹⁵ cm⁻², the sheet resistance of implanted layers was much reduced by hot implantation. The lowest sheet resistance of 542Ω/ was obtained by implantation at 500 ~ 800°C with a 4 × 10¹⁵ cm⁻² dose. Characterization of n⁺-p junctions fabricated by N⁺ implantation into p-type epilayers was carried out in detail. The net doping concentration in the region close to the junction showed a linearly graded profile. The forward current was clearly divided into two components of diffusion and recombination. A high breakdown voltage of 615 ∼ 810V, that is almost an ideal value, was obtained, even if the implant dose exceeded 10¹⁵ cm⁻². By employing hot implantation at 800°C, the reverse leakage current was significantly reduced.     

Rapid thermal annealing of ion implanted cdte

Rapid thermal annealing of ion implantedn-type CdTe has been investigated. Samples were implanted with 60 keV Ar⁺ and As⁺ ions to a dose of 1 × 10¹⁴ cm⁻² and subjected to anneal sequences of 5-100s at temperatures of 350-650° C. Photoluminescence measurements have indicated that the implantation completely quenches the photoluminescence; however, anneals for only 5s at 350° C are sufficient to recover most of the features of the photoluminescence spectrum to that equivalent of unimplanted material. Luminescence spectral features associated with thermal annealing damage and substitutional As in inferred. Type conversion of the As⁺ implanted layer is observed and it has been shown that good diodes can be made, with the best behaviour resulting from a 5s anneal at 450° C. Research supported by the Natural Sciences and Engineering Research Council of Canada     

Dose-rate effects in silicon-implanted gallium arsenide from low to high doses

For implantation of silicon dopant into gallium arsenide, sheet resistance and damage increase as the ion dose rate increases in the high-dose regime (>5.0 × 10¹³ cm⁻²). But, in the low-dose regime (<5.0 × 10¹² cm⁻²), although damage still increases with dose rate, the sheet resistance decreases. This qualitative difference implies that there must be a crossover point between the low- and high-dose regimes in the effect of damage and defect formation on dopant activation. This paper describes experiments in which damage and silicon dose were independently varied through the crossover point. Thermal wave, ion channeling, Hall effect measurements, and transmission electron microscopy were used to characterize structural and electrical changes that occur near the crossover. In GaAs implanted with silicon (²⁹Si⁺) at doses between 3 × 10¹² and 6 × 10¹³cm⁻², it is shown that electrical activation for low dose rates first begins to exceed that for high dose rates at a dose of 2 × 10¹³ cm⁻². Rapid growth of Type I dislocations also begins near this same dose, suggesting that there may be a link between defect formation and the crossover to negative dose-rate effects in the high-dose regime.     

Characterization of TiN/TiSi2 bilayer for application to ULSI

The properties of TiN/TiSi₂ bilayer formed by rapid thermal annealing (RTA) in an NH₃ ambient after the titanium film is deposited on the silicon substrate is investigated. It is found that the formation of TiN/TiSi₂ bilayer depends on the RTA temperature and a competitive reaction for the TiN/TiSi₂ bilayer occurs at 600°C. Both the TiN and TiSi₂ layers represent titanium-rich films at 600°C anneal. The TiN layer has a stable structure at 700°C anneal while the TiSi₂ layer has C₄₉ and C₅₄ phase. Both the TiN and TiSi₂ layers have stable structures and stoichiometries at 800°C anneal. When the TiN/TiSi₂ bilayer is formed, the redistribution of boron atoms within the TiSi₂ layer gets active as the anneal temperature is increased. According to secondary ion mass spectroscopy analysis, boron atoms pile up within the TiN layer and at the TiSi₂−Si interface. The electrical properties for n⁺ and p⁺ contacts are investigated. The n⁺ contact resistance increases slightly with increasing annealing temperature but the p⁺ contact resistance decreases. The leakage current indicates degradation of the contact at high annealing temperature for both n⁺ and p⁺ junctions.     

An EPR study of defects induced in 6H-SiC by ion implantation

Crystalline (0001) plane wafers of n-type 6H-SiC have been implanted at room temperature with 200 keV Ge⁺ ions in the dose range 10¹² to 10¹⁵ cm⁻². Electron paramagnetic resonance (EPR) measurements have been made on these samples both before and after annealing them at temperatures in the range room temperature to 1500°C. The as-implanted samples have a single isotropic and asymmetric line EPR spectrum whose width, ΔB_pp, increases with ion dose before falling when a buried continuous amorphous layer is produced. This increase is interpreted in terms of the change in the relative intensity of a line with g = 2.0028 ± 0.0002, ΔB_pp = 0.4 mT associated primarily with carbon dangling bonds in a-SiC and a line with g in the range 2.0033 to 2.0039 of uncertain origin. The variation with anneal temperature of the populations of these defects is reported.     

Rapid thermal annealing of si implanted gaas

Rapid thermal annealing (RTA) technology offers potential advantages for GaAs MESFET device technology such as reducing dopant diffusion and minimizing the redistribution of background impurities. LEC semi-insulating GaAs substrates were implanted with Si at energies from 100 to 400 keV to doses from 1 × 10¹² to 1 × 10¹⁴/cm². The wafers were encapsulated with Si₃N₄ and then annealed at temperatures from 850-1000° C in a commercial RTA system. Wafers were also annealed using a conventional furnace cycle at 850° C to provide a comparison with the RTA wafers. These implanted layers were evaluated using capacitance-voltage and Hall effect measurements. In addition, FET’s were fabricated using selective implants that were annealed with either RTA or furnace cycles. The effects of anneal temperature and anneal time were determined. For a dose of 4 × 10¹²/cm² at 150 keV with anneal times of 5 seconds at 850, 900, 950 and 1000° C the activation steadily increased in the peak of the implant with overlapping profiles in the tail of the profiles, showing that no significant diffusion occurs. In addition, the same activation could be obtained by adjusting the anneal times. A plot of the equivalent anneal times versus 1/T gives an activation energy of 2.3 eV. At a higher dose of 3 × 10¹³ an activation energy of 1.7 eV was obtained. For a dose of 4 × 10¹² at 150 keV both the RTA and furnace annealing give similar activations with mobilities between 4700 and 5000 cm²/V-s. Mobilities decrease to 4000 at a dose of 1 × 10¹³ and to 2500 cm²/V-s at 1 × 10¹⁴/cm². At doses above 1 × 10¹³ the RTA cycles gave better activation than furnace annealed wafers. The MESFET parameters for both RTA and furnace annealed wafers were nearly identical. The average gain and noise figure at 8 GHz were 7.5 and 2.0, respectively, for packaged die from either RTA or furnace annealed materials.     

Photothermal Activation of Shallow Dopants Implanted in Silicon

Dopant impurities were implanted at high dose and low energy (10¹⁵ cm⁻², 0.5–2.2 keV) into double-side polished 200 mm diameter silicon wafers and electrically activated to form p–n junctions by 10 s anneals at temperatures of 1,025, 1,050, and 1,075°C by optical heating with tungsten incandescent lamps. Activation was studied for P, As, B, and BF₂ species implanted on one wafer side and for P and BF₂ implanted on both sides of the wafer. Measurements included electrical sheet resistance (Rs) and oxide film thickness. A heavily boron-doped wafer, which is optically opaque, was used as a hot shield to prevent direct exposure to lamp radiation on the adjacent side of the test wafer. Two wafers with opposing orientations with respect to the shield wafer were annealed for comparison of exposure to, or shielding from, direct lamp illumination. Differences in sheet resistance for the two wafer orientations ranged from 4% to 60%. n-Type dopants implanted in p-type wafers yielded higher Rs when the implanted surface was exposed to the lamps, as though the effective temperature had been reduced. p-Type dopants implanted in n-type wafers yielded lower Rs when the implanted surface was exposed to the lamps, as though the effective temperature had been increased. Effective temperature differences larger than 5°C, which were observed for the P, B, and BF₂ implants, exceeded experimental uncertainty in temperature control.     

Ion-beam mixed ultra-thin cobalt suicide (CoSi2) films by cobalt sputtering and rapid thermal annealing

The influence of ion-beam mixing on ultra-thin cobalt silicide (CoSi₂) formation was investigated by characterizing the ion-beam mixed and unmixed CoSi₂ films. A Ge⁺ ion-implantation through the Co film prior to silicidation causes an interface mixing of the cobalt film with the silicon substrate and results in improved silicide-to-silicon interface roughness. Rapid thermal annealing was used to form Ge⁺ ion mixed and unmixed thin CoSi₂ layer from 10 nm sputter deposited Co film. The silicide films were characterized by secondary neutral mass spectroscopy, x-ray diffraction, tunneling electron microscopy (TEM), Rutherford backscattering, and sheet resistance measurements. The experi-mental results indicate that the final rapid thermal annealing temperature should not exceed 800°C for thin (<50 nm) CoSi₂ preparation. A comparison of the plan-view and cross-section TEM micrographs of the ion-beam mixed and unmixed CoSi₂ films reveals that Ge⁺ ion mixing (45 keV, 1 × 10¹⁵ cm⁻²) produces homogeneous silicide with smooth silicide-to-silicon interface.     

Electrical and compositional properties of TaSi2 films

Tantalum silicide (TaSi₂) thin films were sputter deposited on p- and n-type silicon substrates using ultrapure TaSi₂ targets. The TaSi₂/Si samples were annealed in nitrogen or forming gas or oxygen containing steam at temperatures in the range of 400–900°C. The sheet resistances of TaSi₂/Si were measured by four-point probe before and after anneal. The structure of these films was investigated using x-ray diffraction (XRD) methods. It has been found that the sheet resistance decreases with the increase in annealing temperature and also with the increase in film thickness. X-ray diffraction patterns show changes in the morphological structure of the films. Oxidation characteristics of the film have been investigated in the temperature range of 400–900°C in oxygen containing steam ambient. The oxidation time ranged from 0.5 to 1.5 h. No oxide formation of the tantalum silicide films was observed in this investigation. This has been attributed to the high purity of TaSi₂ sputter targets used in the preparation of the films.