Three-phase current-fed soft-switching PWM converter with auxiliarycommutation inductors and resonant snubber

A new three-phase current-fed soft-switching PWM converter is presented. This converter utilises two types of switching commutation scheme to improve the PWM current utilisation rate. It is shown by means of computer simulation that this converter has low THD and offers unity power factor correction     

Analysis,design and implementation of an interleaved three-level PWM DC/DC ZVS converter

This paper presents a new parallel three-level soft switching pulse-width modulation (PWM) converter. The proposed converter has two circuit cells operated by the interleaved PWM modulation. Thus, the ripple currents at input and output sides are reduced. Each circuit cell has two three-level zero voltage switching circuits sharing the same power switches. Therefore, the current and power rating of the secondary side components are reduced. Current double rectifier topology is selected on the secondary side to decrease output ripple current. The main advantages of the proposed converter are soft switching of power switches, low ripple current on the output side and low-voltage rating of power switches for medium-power applications. Finally, the performance of the proposed converter is verified by experiments with 1 kW prototype circuit.     

A centroid-based PWM switching technique for full-bridge inverterapplications

A novel centroid-based pulse-width-modulation (PWM) switching strategy is proposed which is suitable for full-bridge inverter applications. This method is evaluated, and its performance is compared with existing PWM switching strategies. The performance evaluation and comparison are based on the total harmonic distortion (THD) and number of pulses per cycle of the inverter output waveform. The objective of the new switching strategy is to minimize both the THD and low-order harmonics. Simulation results show that this technique yields a significant improvement in performance. In addition, a hybrid switching sequence is developed for the proposed scheme, which can lead to further reduction in switching losses     

A 3-kW unity-power-factor rectifier based on a two-cell boostconverter using a new parallel-connection technique

This paper applies a recently introduced parallel connection technique to a unity power-factor preregulator based on a boost power converter incontinuous inductor-current mode. By means of a small extra inductance, two MOSFET pulsewidth modulation (PWM) cells are safely associated in parallel, which allows an increased output power being processed by two half-rated semiconductor devices. The new technique overcomes the existent alternatives, leading to a reliable switched power converter along with simplified layout requirements. This paper also presents a theoretical analysis accompanied by digital simulation cases. Results from a 3 kW prototype, based on the Unitrdae's UC3854 strategy, show that the present technique is very useful in revealing a natural balance among device currents. The laboratory circuit works at a 70 kHz switching frequency and also employs a soft-commutation network. This feature points to a high-efficiency converter and negligible device stresses, which have been verified in the laboratory     

Real-Time Calculation of Switching Angles Minimizing THD for Multilevel Inverters With Step Modulation

Multilevel inverters have been widely applied in industries. A family of optimal pulsewidth modulation (PWM) methods for multilevel inverters, such as step modulation, can generate output voltage with less harmonic distortion than popular modulation strategies, such as the carrier-based sinusoidal PWM or the space vector PWM. However, some drawbacks limit the application of optimal PWM. One of such crucial drawback is that the optimal switching angles could not be calculated in real-time and one has to rely on lookup tables with precalculated angles. We propose a novel real-time algorithm for calculating switching angles that minimizes total harmonic distortion (THD) for step modulation. We give a mathematical proof that the output voltage has the minimum THD. We implemented the algorithm on a digital signal processor and provide experimental results that verify the performance of the proposed algorithm.      

Improved small-signal analysis for the phase-shifted PWM power converter

A closed form cycle by cycle analysis forms the basis for a new zero-voltage switching (ZVS) phase-shifted PWM (PSPWM) full bridge power converter small-signal model. The paper derives the small-signal response equations. The PSPWM converter has an implicit "slew interval," making the converter dynamics difficult to analyze using traditional averaging techniques. The converter control to output transfer function under continuous conduction mode operation and using voltage-mode control does not exhibit a second order pole associated with the output L-C filter, making it different from a conventional PWM converter. This new PSPWM converter model shows that the output L-C filter is separated into two real poles, with one pole held at constant frequency independent of operating conditions. A characteristic pole depends only upon the converter switching frequency and inductor values. This characteristic pole is fundamental to understanding the PSPWM converter natural and forced responses. The new small-signal model is shown to be in excellent agreement with experimental results.     

A new control strategy to improve the performance of a PWM AC to DCconverter under unbalanced operating conditions

Abnormal harmonics of significant magnitude are generated at the output and input terminals of a PWM (pulse-width-modulated) AC-to-DC power converter under unbalanced operating conditions. A new control strategy is presented to selectively cancel the generated lower-order abnormal harmonics at the output and input terminals and thereby to preserve the high-performance features of a PWM AC-to-DC power converter. The proposed technique essentially involves computing the sequence components of the unbalanced input supply and suitably counter-unbalances the PWM gating signals of the power converter switches to cancel the generated abnormal harmonics. The technique is essentially a feedforward approach and is suitable for higher-power GTO (gate turn-off thyristor) type PWM AC-to-DC power converters. A procedure for implementing this technique in real time is discussed. Selected results are verified experimentally on a prototype PWM AC-to-DC power converter     

Space Vector Based Hybrid PWM Techniques for Reduced Current Ripple

This paper investigates certain novel switching sequences involving division of active vector time for space vector based pulsewidth modulation (PWM) generation for a voltage source inverter. This paper proposes two new sequences, and identifies all possible sequences, which result in the same average switching frequency as conventional space vector PWM (CSVPWM) at a given sampling frequency. This paper brings out a method for designing hybrid PWM techniques involving multiple sequences to reduce line current ripple. The three proposed hybrid PWM techniques (three-zone PWM, five-zone PWM and seven zone PWM) employ three, five and seven different sequences, respectively, in every sector. Each sequence is employed in a spatial region within the sector where it results in the lowest rms current ripple over the given sampling period. The proposed techniques lead to a significant reduction in THD over CSVPWM at high line voltages. The five-zone technique results in the lowest THD among real-time techniques with uniform sampling, while the seven-zone technique is the best among real-time techniques with twin sampling rates. The superior harmonic performance of the proposed techniques over CSVPWM and existing bus-clamping PWM techniques is established theoretically as well as experimentally.     

A novel suppressed-link rectifier-inverter topology with near unity power factor

This work describes a novel method in improving the input current total harmonic distortion (THD) as well as the power factor of a three-phase suppressed-link rectifier-inverter circuit. This proposed method makes use of only three bi-directional low power static switches with a relatively simple gating circuit. This paper illustrates how the proposed method is superior in reducing the input current THD of a rectifier-inverter set to about 5%, which is in line with the requirements of IEEE standard 519-1992. This is accomplished without the use of any filter or complex wave shaping techniques. A delta-modulated (DM) voltage source inverter (VSI) with proportional integrator forms the output stage of the converter. It helps to provide constant volts per hertz operation without the need for additional feedback circuitry and complexity. Moreover, this novel DM technique also helps to provide a smooth transition from the pulse width modulation (PWM) to square wave, hence allowing full utilization of the DC bus voltage.     

一种全数字控制两级级联大功率开关电源

设计了一种基于数字信号处理(DSP)的全数字控制两级级联大功率开关电源。在电路结构方面,采用了降压型和全桥式的变换器结构,其中,降压电路的占空比可随输出电压而调节,全桥电路能实现输入级与输出级的全隔离。在电路控制方面,采用数字比例-积分-微分(PID)控制技术,提升了系统的闭环控制速度和精度。该功率开关电源基于DSP的控制方法,构建了电源的控制系统。仿真及测试结果表明,基于DSP设计的开关电源具有稳定的性能和较高的效率,转换效率可达92%。     

Analysis and Design of a Novel Three-Phase AC–DC Buck-Boost Converter

This paper proposes a novel three-phase ac-dc buck-boost converter. The proposed converter uses four active switches, which are driven by only one control signal. This converter is operated in discontinuous conduction mode (DCM) by using the pulsewidth modulation (PWM) technique, and the control scheme very easily and simply achieves purely sinusoidal input current, high power factor, low total harmonic distortion of the input current and step-up/down output voltage. Also, the proposed converter provides a constant average current to the output capacitor and load in each switching period. Thus, the ripple component of sixth times line frequency will not appear in the output voltage. Therefore, a smaller output capacitor can be used in the proposed converter. Moreover, the steady-state analysis of voltage gain and boundary operating condition are presented. Also, the selections of inductor, output capacitor and input filter are depicted. Finally, a prototype circuit with simple control logic is implemented to illustrate the theoretical analysis.     

Control of Single-Phase-to-Three-Phase AC/DC/AC PWM Converters for Induction Motor Drives

This paper proposes a novel control scheme of single-phase-to-three-phase pulsewidth-modulation (PWM) converters for low-power three-phase induction motor drives, where a single-phase half-bridge PWM rectifier and a two-leg inverter are used. With this converter topology, the number of switching devices is reduced to six from ten in the case of full-bridge rectifier and three-leg inverter systems. In addition, the source voltage sensor is eliminated with a state observer, which controls the deviation between the model current and the system current to be zero. A simple scalar voltage modulation method is used for a two-leg inverter, and a new technique to eliminate the effect of the dc-link voltage ripple on the inverter output current is proposed. Although the converter topology itself is of lower cost than the conventional one, it retains the same functions such as sinusoidal input current, unity power factor, dc-link voltage control, bidirectional power flow, and variable-voltage and variable-frequency output voltage. The experimental results for the V/f control of 3-hp induction motor drives controlled by a digital signal processor TMS320C31 chip have verified the effectiveness of the proposed scheme     

Virtual stage pulse-width modulation technique for multilevelinverter/converter

The main theme of this paper is to present a new pulse-width modulation (PWM) technique for multilevel inverter/converter control, which provides more degrees of freedom for specifying the cost function than that for step modulation technique, for a given hardware. Therefore, the presented technique eliminates more specified low order harmonics without resorting to the increase of hardware. In comparison with the selective harmonic elimination PWM technique, for the same number of eliminated low order harmonics, the presented technique provides the advantages of both lower total harmonic distortion (THD) and less switching. Simulation and experimental results are presented to confirm the above-mentioned claims     

A true ZCZVT commutation cell for PWM converters

This paper introduces a true zero-current and zero-voltage transition (ZCZVT) commutation cell for DC-DC pulsewidth modulation (PWM) converters operating with an input voltage less than half the output voltage. It provides zero-current switching (ZCS) and zero-voltage switching (ZVS) simultaneously, at both turn on and turn off of the main switch and ZVS for the main diode. The proposed soft-switching technique is suitable for both minority and majority carrier semiconductor devices and can be implemented in several DC-DC PWM converters. The ZCZVT commutation cell is placed out of the power path, and, therefore, there are no voltage stresses on power semiconductor devices. The commutation cell consists of a few auxiliary devices, rated at low power, and it is only activated during the main switch commutations. The ZCZVT commutation cell, applied to a boost converter, has been analyzed theoretically and verified experimentally. A 1 kW boost converter operating at 40 kHz with an efficiency of 97.9% demonstrates the feasibility of the proposed commutation cell     

An improved ZCT-PWM DC-DC converter for high-power and frequency applications

In this paper, an improved active resonant snubber cell that overcomes most of the drawbacks of the normal zero-current transition (ZCT) pulsewidth-modulation (PWM) dc-dc converter is proposed. This snubber cell is especially suitable for an insulated gate bipolar transistor (IGBT) PWM converter at high power and frequency levels. The converter with the proposed snubber cell can operate successfully with soft switching under light-load conditions and at considerably high frequencies. The operation principles, a detailed steady-state analysis, and a snubber design procedure of a ZCT-PWM buck converter implemented with the proposed snubber cell are presented. Theoretical analysis is verified with a prototype of a 5-kW and 50-kHz IGBT-PWM buck converter. Additionally, at 90% output power, the overall efficiency of the proposed soft switching converter increases to about 98% from the value of 91% in the hard-switching case.     

A Flexible Selective Harmonic Mitigation Technique to Meet Grid Codes in Three-Level PWM Converters

Due to the development of new grid codes, power converters' output signal harmonic control is currently becoming extremely important in medium- and high-power applications. By taking this new scenario into account, a new method to generate switching three-level pulsewidth-modulation (PWM) patterns to meet specific grid codes is presented. The proposed method, which is named selective harmonic mitigation PWM , generates switching three-level PWM patterns with high quality from the point of view of harmonic content, avoiding the elimination of some specific harmonics and studying all harmonics and the total harmonic distortion as a global problem by using a general-purpose random-search heuristic algorithm. This fact leads to a drastic reduction or even avoidance of the bulky and costly grid connection tuned filters of power systems. Any harmonic shaping can be considered due to the flexibility of the method. Power devices switching constraints are considered to obtain directly applicable results. As a practical example, limits from one actual grid code have been used to get the experimental results by means of a 150-kVA three-level diode-clamped converter test bench. Comparisons between the proposed technique, optimized PWM and Selective Harmonic Elimination methods have been carried out. The results obtained with this new method greatly improve previous ones.     

A rugged soft commutated PWM inverter for AC drives

A novel DC-DC power converter for variable-speed AC power drives using the zero-voltage switching technique is described. This converter combines the advantages of soft commutated inverters and those of conventional pulsewidth modulated (PWM) inverters. In the proposed scheme, the soft commutation reduces the constraints on the switches, and the PWM enables simple and efficient regulation of the power flow. Furthermore, the zero-voltage switching technique makes operation safe, and the switching of bipolar transistors at 20 kHz is easily achieved without compromising the efficiency of the system     

A PWM DC-DC converter with optimum segmented output stage and current detector

High efficiency is very important for DC-DC power supplies in portable applications. A PWM DC-DC converter with optimum segmented output stage is proposed in this paper whose efficiency at light load is improved. The segmented output stage is optimally divided into 5 small segments plus 4 big segments. The segmented number of the output stage can be adaptively regulated according to the load current. Moreover, two current detector circuits are simultaneously adopted to form a mixed load current sensor in the converter to improve the detecting accuracy. A segmented current SenseFET (SCS) is used to sense the load current in continuous current mode, and a time digital converter with digital judgement (TDC-D) is designed to detect the load current in discontinuous current mode. The structure of the proposed PWM converter with optimum segmented output stage and mixed load current detector circuits is described in this paper, which has been implemented in a 0.13 μm CMOS process. Simulation and testing results show that the output stages of the PWM converter can self transit from one segment stage to another segment stage according to the load condition. And the maximum efficiency improvement of the proposed converter can reach 15%.     

Current-fed three-phase and voltage-fed three-phase activeconverters with optimum PWM pattern scheme and their performanceevaluations

This paper describes a new approach to select the optimum sinewave pulsewidth modulation (PWM) patterns suitable for a large-capacity current-fed active PWM power converter and a practical design procedure to determine circuit constants of a low-pass filter connected to suppress higher line current harmonics flowing into the utility-grid AC power source. A feasible test is implemented by building a prototype 500 kW three-phase current-fed PWM power converter which is designed and controlled on the basis of the proposed considerations. It is verified from a practical point of view that these new conceptual considerations are more effective and acceptable to minimize higher harmonic current components flowing into the utility-grid AC power source. This experimental setup provides highly efficient steady-state characteristics of the current-fed three-phase PWM power converter under the operating condition of a unity power factor correction and sinewave line current shaping schemes. Furthermore, this unique optimum PWM pattern derived from the theoretical method proposed here is conveniently applicable to a voltage-fed three-phase PWM converter. It is verified that this optimum PWM pattern provides excellent switching performance with a lower switching frequency mode than the conventional carrier-based PWM scheme     

A Single-Inductor Step-Up DC-DC Switching Converter With Bipolar Outputs for Active Matrix OLED Mobile Display Panels

A single-inductor step-up DC-DC switching converter with bipolar outputs is implemented for active-matrix OLED mobile display panels. The positive output voltage is regulated by a boost operation with a modified comparator control (MCC), and the negative output voltage is regulated by a charge-pump operation with a proportional-integral (PI) control. The proposed adaptive current-sensing technique successfully supports the implementation of the proposed converter topology and enables the converter to work in both discontinuous-conduction mode (DCM) and continuous-conduction mode (CCM). In addition, with the MCC method, the converter can guarantee a positive output voltage that has both a fast transient response of the comparator control and a small output voltage ripple of the PWM control. A 4.1 mm$^{2}$ converter IC fabricated in a 0.5 $mu$m power BiCMOS process operates at a switching frequency of 1 MHz with a maximum efficiency of 82.3% at an output power of 330 mW.