RF MEMS switch integrated on printed circuit board with metallic membrane first sequence and transferring

This letter reports, for the first time, on RF MEMS switches integrated on flexible printed circuit boards (i.e., FR-4) using transfer technology. The devices were first processed on Si-substrate using a modified MEMS sequence and subsequently transferred onto an FR-4 substrate by thermal compressive bonding, mechanical grinding, and wet removal of silicon. The switches were demonstrated with flat metal membrane (top electrode), precisely controlled gap between the membrane and bottom electrode, low insertion loss (/spl les/ 0.15 dB at 20 GHz), and high isolation (/spl sim/ 21 dB at 20 GHz). This technology shows the potential to monolithically integrate RF MEMS components with other RF devices on organic substrate for RF system implementation.     

The package integration of RF-MEMS switch and control IC for wireless applications

The integration of microelectromechanical systems (MEMS) switch and control integrated circuit (IC) in a single package was developed for use in next-generation portable wireless systems. This packaged radio-frequency (RF) MEMS switch exhibits an insertion loss under -0.4 dB, and isolation greater than -45 dB. This MEMS switch technology has significantly better RF characteristics than conventional PIN diodes or field effect transistor (FET) switches and consumes less power. The RF MEMS switch chip has been integrated with a high voltage charge pump plus control logic chips into a single package to accommodate the low voltage requirements in portable wireless applications. This paper discusses the package assembly process and critical parameters for integration of MEMS devices and bi-complementary metal oxide semiconductor (CMOS) control integrated circuit (IC) into a single package.     

RF MEMS开关工艺技术研究

RFMEMS开关是用MEMS技术形成的新型电路元件,与传统的半导体开关器件相比具有插入损耗低、隔离度大等优点,将对现有雷达和通信中RF结构产生重大影响。文章介绍了RFMEMS开关的基本工艺流程设计,工艺制作技术的研究。实验解决了种子层技术、聚酰亚胺牺牲层技术、微电镀技术的工艺难题,制作出了RFMEMS开关样品,基本掌握了RFMEMS器件的制作工艺技术。RFMEMS开关样品测试的技术指标为:膜桥高度2μm～3μm、驱动电压<30V、频率范围0～40GHz、插入损耗≤1dB、隔离度≥20dB,样品参数性能达到了设计要求。     

A 77 GHz SiGe sub-harmonic balanced mixer

A novel SiGe 77 GHz sub-harmonic balanced mixer is presented with a goal to push the technology to its limit [SiGe2-RF transistor (f/sub T/=80 GHz)]. This new topology uses a compact input network not only to achieve high isolation between the LO and RF ports, but also to result in excellent 2LO-RF isolation. The measured results demonstrate a conversion gain of 0.7 dB at 77 GHz with an LO power of 10 dBm at 38 GHz, LO-RF isolation better than 30 dB, 2LO-RF isolation of 25 dB, and a P/sub 1dB/ of -8 dBm. The mixer core consumes 4.4 mA at 5 V. The circuit demonstrates that SiGe sub-harmonic mixers have comparable performance with GaAs designs, at a fraction of the cost.     

基于0.5m GaAs PHEMT工艺的单刀十掷射频开关模块

描述了采用0.5μm GaAs PHEMT工艺进行单刀十掷射频开关模块的设计工作。模块核心部件为SP10T射频天线开关芯片,内置了用于GSM系统的两条发射通路的谐波抑制低通滤波器,和用于开关控制的驱动电路,改善了线性度。模块实现指标:GSM发射通路插入损耗不大于1.25 dB,其余各通路插损不大于1.35 dB;GSM收发通路间隔离度不小于43 dB,与UMTS通路间隔离度不小于40 dB;GSM两个发射通路二次谐波抑制比分别大于66dBc和54 dBc。     

A CMOS Ku-Band 4x Subharmonic Mixer

In this work, the design and measurement of a new 4x subharmonic mixer circuit is presented using CMOS 0.18 m technology. With an RF input signal at 12.1 GHz, and an LO signal at 3.0 GHz, an intermediate frequency of 100 MHz is produced (f_IF = f_RF - 4f_LO). The mixer uses a modified Gilbert-cell topology with octet-phase LO switching transistors to perform the quadruple subharmonic mixing. Included in the design is an active balun for the RF signal and a circuit that generates an octet-phase LO signals from a differential input. The mixer has a conversion gain of approximately 6 dB, 1-dB compression point of -12 dBm, IIP3 of -2 dBm, and IIP2 of 17 dBm. The circuit also exhibits excellent isolation between its ports (e.g. LO-RF: 71 dB, 4LO-RF: 59 dB).     

An Experimental Study on High-Frequency Substrate Noise Isolation in BiCMOS Technology

In this letter, four substrate noise isolation structures in standard 0.18-mum SiGe bipolar CMOS technology were investigated using S-parameter measurements. The experimental and simulated results on different isolation structures, such as triple-well p-n junction isolated walls, deep trench isolation, and double P⁺ guard-ring structures, are presented. Each element in the equivalent circuits has been calculated or fitted based on the parasitic resistance, capacitance, and physical dimensions using the device simulator MEDICI and the measured results of the test patterns. The proposed structure B significantly reduced substrate noise below -70 dB up to 20 GHz. The proposed structure C with an extra triple-well junction achieved the best isolation at the lower frequency range, in which |S₂₁| was less than -71 dB from 50 MHz to 10.05 GHz, and -56 dB from 10.05 to 20.05 GHz. The measured results showed an excellent agreement with the calculations. Structure B is good enough and is recommended for a general-purpose RF circuit design, whereas structure C can be used in a highly sensitive RF circuit block below 10 GHz.     

A fully integrated SOI RF MEMS technology for system-on-a-chip applications

In this paper, a silicon-on-insulator (SOI) radio-frequency (RF) microelectromechanical systems (MEMS) technology compatible with CMOS and high-voltage devices for system-on-a-chip applications is experimentally demonstrated for the first time. This technology allows the integration of RF MEMS switches with driver and processing circuits for single-chip communication applications. The SOI high-voltage device (0.7-/spl mu/m channel length, 2-/spl mu/m drift length, and over 35-V breakdown voltage), CMOS devices (0.7-/spl mu/m channel length and 1.3/-1.2 V threshold voltage), and RF MEMS capacitive switch (insertion loss 0.14 dB at 5 GHz and isolation 9.5 dB at 5 GHz) are designed and fabricated to show the feasibility of building fully integrated RF systems. The performance of the fabricated RF MEMS capacitive switches on low-resistivity and high-resistivity SOI substrates will also be compared.     

应用于DSRC系统的5.8GHz CMOS LNA设计

基于TSMC 0.18μm CMOS RF工艺,完成了一个全集成共源-共栅低噪声放大器设计。版图后仿真结果表明:1.8V电源电压下,电路静态功耗约为17mW;在DSRC系统工作频段上,电路实现了良好的综合性能指标,输入反射系数(S11)和输出反射系数(S22)小于-15dB,增益(S21)大于14.0dB,反向隔离度(S12)达到32dB,噪声系数小于2dB,并且工作稳定。     

A high-performance W-band uniplanar subharmonic mixer

A uniplanar subharmonic mixer has been implemented in coplanar waveguide (CPW) technology. The circuit is designed to operate at RF frequencies of 92-96 GHz, IF frequencies of 2-4 GHz, and LO frequencies of 45-46 GHz. Total circuit size excluding probe pads and transitions is less than 0.8 mm ×1.5 mm. The measured minimum single-sideband (SSB) conversion loss is 7.0 dB at an RF of 94 GHz, and represents state-of-the-art performance for a planar W-band subharmonic mixer. The mixer is broad-band with a SSB conversion loss of less than 10 dB over the 83-97-GHz measurement band. The measured LO-RF isolation is better than -40 dB for LO frequencies of 45-46 GHz. The double-sideband (DSB) noise temperature measured using the Y-factor method is 725 K at an LO frequency of 45.5 GHz and an IF frequency of 1.4 GHz. The measured data agrees well with the predicted performance using harmonic-balance analysis (HBA). Potential applications are millimeter-wave receivers for smart munition seekers and automotive-collision-avoidance radars     

A Novel 94-GHz MHEMT Resistive Mixer Using a Micromachined Ring Coupler

In this letter, we present a high performance 94-GHz millimeter-wave monolithic integrated circuit resistive mixer using a 70-nm metamorphic high electron mobility transistor (MHEMT) and micromachined ring coupler. A novel three-dimensional structure of a resistive mixer was proposed in this work, and the ring coupler with the surface micromachined dielectric-supported air-gap microstrip line structure was used for high local oscillator/radio frequency (LO–RF) isolation. Also, the LO–RF isolation was optimized through the simulation. The fabricated mixer has excellent LO–RF isolation, greater than 29 dB, in 2-GHz bandwidth of 93–95GHz. The good conversion loss of 8.9dB was measured at 94GHz. To our knowledge, compared to previously reported W-band mixers, the proposed MHEMT-based resistive mixer using a micromachined ring coupler has shown superior LO–RF isolation and conversion loss.     

Low RF noise and power loss for ion-implanted Si having an improved implantation process

Very-low-transmission line noise of <0.25 dB at 18 GHz and low power loss /spl les/0.6 dB at 110 GHz have been measured on transmission lines fabricated on proton-implanted Si. In contrast, a standard Si substrate gave much higher noise of 2.5 dB and worse power loss of 5 dB. The good RF integrity of proton-implanted Si results from the high isolation impedance to ground, as analyzed by an equivalent circuit model. The proton implantation is also done after forming the transmission lines at a reduced implantation energy of /spl sim/4 MeV. This enables easier process integration into current VLSI technology.     

Design and Analysis for a 60-GHz Low-Noise Amplifier With RF ESD Protection

An RF electrostatic discharge (ESD) protection for millimeter-wave (MMW) regime applied to a 60-GHz low-noise amplifier (LNA) in mixed-signal and RF purpose 0.13-$mu{hbox{m}}$ CMOS technology is demonstrated in this paper. The measured results show that this chip achieves a small signal gain of 20.4 dB and a noise figure (NF) of 8.7 dB at 60 GHz with 65-mW dc power consumption. Without ESD protection, the LNA exhibits a gain of 20.2 dB and an NF of 7.2 dB at 60 GHz. This ESD protection using an impedance isolation method to minimize the RF performance degradation sustains 6.5-kV voltage level of the human body model on the diode and 1.5 kV on the core circuit, which is much higher than that without ESD protection ( $≪$350 V). To our knowledge, this is the first CMOS LNA with RF ESD protection in the MMW regime and has the highest operation frequency reported to date.      

新型四次谐波混频电路

本文介绍了一种适用于高次谐波混频的电路原理图,基于空闲频率相位抵消理论,该混频电路结构可以避免复杂的空闲频率回收电路设计,同时能获得很高的端口隔离度。基于该结构,设计了新型的Ka波段四次谐波混频器,该混频器在38.4 GHz测得最小变频损耗 8.3 dB,在34-39 GHz 变频损耗小于10.3dB, LO-IF、RF-LO、 RF-IF 端口隔离度分别优于30.7 dB、 22.9dB、46.5dB。     

双平衡混频器设计与研究

在射频电路的前端,混频器是实现频谱搬移的重要器件,是十分重要的模块。采用Win公司砷化镓工艺,设计了一款二极管双平衡混频器,其中巴伦采用平面螺旋式结构,用ADS软件进行各部分电路设计、仿真,从功能仿真图中看到输出信号的频谱中有需要的中频频率成分,验证了混频器频谱搬移的功能,在所设计的频段耦合度和隔离度能够满足要求。其中射频端口和本振端口的频率为0.8~1.2 GHz,中频频率DC~300 MHz,变频损耗8~10 dB,噪声系数9 dB左右,芯片面积0.9 mm×1 mm。     

20-GHz 5-dB-gain analog multipliers with AlGaAs/GaAs HBTs

From-DC-to-above-20-GHz monolithic Gilbert cell analog multipliers have been developed using AlGaAs/GaAs HBT technology. As a double balanced active mixer, it exhibits very high conversion gain of above +5 dB with extremely high LO-IF isolation of 33 dB for RF/LO inputs up to 20 GHz. It exhibits conversion gain of +9 dB for 5 GHz RF/LO inputs. As a double balanced upconverter, it exhibits positive conversion gain with high LO-RF isolation of 23 dB for RF output up to 8.5 GHz. As a detection mixer in coherent optical heterodyne receivers, it can operate for RF/LO inputs up to 15 GHz under a less than -7.5 dBm LO input condition     

CMOS宽带可编程增益低噪声放大器

给出了一种可应用于中国移动多媒体广播(CMMB)调谐器的宽带(470~860 MHz)可编程增益低噪声放大器。该电路在UMC 0.18μm RF CMOS工艺下实现,芯片面积为0.37 mm2(不包括ESD pad)。芯片测试结果表明,在1.8 V的电源电压下功耗为30.2 mW,该电路可实现-6.8~32.4 dB的增益动态变化范围,0.5 dB步长,最高增益下单端信号噪声系数小于3.8 dB。     

Effective crosstalk isolation through p+ Si substrateswith semi-insulating porous Si

Through-the-wafer porous Si (PS) trenches have been used to provide radio frequency (RF) isolation in Si because of their semi-insulating property. Reduction of crosstalk by 70 dB at 2 GHz and 45 dB at 8 GRz is demonstrated between Al pads with 800 μm separation on p⁺Si. Crosstalk suppression increases linearly with increasing PS width to beyond 320 μm. This suppression is degraded by one order of magnitude when the Si underneath the PS trenches remains and serves as a residual path for crosstalk. These results show that PS is an excellent candidate for RF isolation in modern VLSI technology     

基于石英基片的二毫米波段二次谐波混频器设计和研制

介绍了一种基于石英基片的2mm波段二次谐波混频器.阐述了谐波混频器的基本原理,建立了混频二极管对结构的高频模型,并用全波分析软件对整个电路进行了仿真优化.实测得到射频信号在116～120GHz范围内,当本振频率为59GHz、功率为7～14dBm时,最低变频损耗为17dB,最高变频损耗为20dB.混频器的P1dB为1dB...     

Phase conjugator for active retrodirective array applications

A novel phase conjugator for active retrodirective array applications is presented. The circuit provides conversion gain as well as phase conjugating operation by using active devices, and results in a simple and compact design through the use of a common port for RF and IF signals. Measurement results indicate a 3.2 dB conversion gain with an RF-IF isolation of 20 dB. This phase conjugator can be used as a component in a retrodirective array when combined with an antenna