等离子体表面波传感器中金属薄膜厚度的最优控制

对表面等离子体波传感器性能影响最大的因素就是探头上金属膜层的厚度.因而在研制利用表面等离子体共振效应的各种传感器的过程中,精确的控制好镀膜的厚度就有非常重要的意义.本文对利用表面等离子体波本身对厚度的敏感特性来精确的控制所镀膜层厚度进行了探讨.     

A proposal for a standard procedure for moderately accelerated electromigration tests on metal lines

This work is aimed at proposing a standard procedure for moderately accelerated Electromigration (EM) tests applied to interconnection lines of the present and the next future generation of integrated circuits. The procedure has been tested on one metal level test structures using an Al-alloy metallization scheme, but can be easily applied to other materials as well as to metal lines with vias. Different existing standards have been taken into consideration to define this proposal: ASTM F1260-89, JEDEC JESD33-A, JESSI AC41. In the PROPHECY project, the focus was on wafer level reliability evaluation with fast methods, but fast EM methods using extremely accelerated stress conditions usually induce side-effects which can invalidate the results. As a consequence, this procedure suggests the use of moderately accelerated tests, together with a method for reducing the number of tests needed for a complete EM characterization. This procedure gives advice on the test structures to be used and on the preliminary steps to be performed before the EM tests. A measurement system, complying with the requirements of this procedure, is also briefly described. The methods described in this document apply to both package- and wafer-level measurements. In order to validate this procedure, EM tests have been performed on JESSI AC41 specimens.     

Optimizing gettering conditions for VLSI chips using simple yieldmodel

Conditions of an effective gettering procedure for VLSI processing are investigated by means of analytical simulation. The effectiveness of a gettering procedure is judged from the VLSI yield when the density of heavy metal impurities and gettering capability are varied over a wide range. It is found that the VLSI yield is seriously degraded by the negative effects of gettering, namely, wafer warpage and dislocation propagation from a gettering site region to a device area. It is seen that gettering effects are profitable in VLSI processes only when the density of heavy metal impurity to be removed is not too high     

混合集成电路内部多余物的控制研究

分析了混合集成电路的内部多余物引入的途径,重点分析和阐述了金属空腔管壳在储能焊封装过程中金属飞溅物形成的原因.通过封装设备和工艺参数的控制以及管座和管帽设计的优化改进,有效控制了金属飞溅物进入封装腔体内部,提高了混合集成电路颗粒碰撞噪声检测(PIND)合格率以及产品的可靠性.     

A procedure for defining behavior of weight functions near the edgefor best convergence using the Galerkin method

A general procedure is described for calculating linear functionals of the electromagnetic theory. The procedure is based on the equivalence of two methods of calculating such functionals-the GM and the variational method (VM). To implement the procedure the sought linear functional is expressed as a variational functional. The stationarity condition of the latter leads to some auxiliary problems. Due to the equivalence the WF behavior near the edge is the same as that obtained from the solution of the auxiliary problem. The efficiency of the procedure, i.e., the high speed of convergence, is illustrated by two examples: (1) calculation of the equivalent circuit shunt impedance of the capacitive diaphragm in a plane waveguide, and (2) calculation of the capacitance of a metal tube segment filled with dielectric     

An analysis of wave phenomena in a dielectric waveguide with periodic metal strips

An analysis of a dielectric waveguide periodically loaded with metal strips is presented. Numerical results are obtained from the formulation based on Galerkin's procedure in a space-harmonic domain. Experimental studies are conducted to correlate with theoretical results and to study the effect of finite length of the grating.     

Suppression of Metal Artifacts in CT Using a Reconstruction Procedure That Combines MAP and Projection Completion

Metal implants such as hip prostheses and dental fillings produce streak and star artifacts in the reconstructed computed tomography (CT) images. Due to these artifacts, the CT image may not be diagnostically usable. A new reconstruction procedure is proposed that reduces the streak artifacts and that might improve the diagnostic value of the CT images. The procedure starts with a maximum a posteriori (MAP) reconstruction using an iterative reconstruction algorithm and a multimodal prior. This produces an artifact-free constrained image. This constrained image is the basis for an image-based projection completion procedure. The algorithm was validated on simulations, phantom and patient data, and compared with other metal artifact reduction algorithms.      

Recent achievements in the microbial synthesis of semiconductor metal sulfide nanoparticles

Taking the advantage of several species of microorganisms, different kinds of chalcogenide nanocrystals have been bio-fabricated in intra/extracellular modes with interesting specifications. However, the most extensive research among these semiconducting materials has been focused on metal sulfides. Generally, bacteria, fungi or other microorganisms convert dissolved sulfate ions into reduced sulfides using certain enzymes and under different conditions, and subsequently, the sulfide anions react with soluble metal cations to generate the insoluble metal sulfide precipitates. Recently, in addition to the biosynthesis procedure, the bio-produced nanomaterials have been examined for their applications as photo-catalysis materials, electrical devices, and antibacterial and antifungal agents. Therefore, the present review is an attempt to collect the available literatures published worldwide on the biosynthesis of semiconductor metal sulfide nanocrystals and concisely compare and evaluate the applied techniques and approaches with an insight into the practical use of their product.     

New application of laser beam to failure analysis of LSI with multi-metal layers

A new technique for failure analysis of LSI with multi metal layers is described. There is a fabrication technique to form a big and optional window on upper layers using Nd-YAG laser without destroying any electrical function, and to approach the failure point through this window. The failure analysis procedure based on logical flow is presented. Fabrication technique is located in part of this procedure which consists of four steps. Two difficult reasons for approaching the failure point without fabrication technique are described. This difficulty results from line composition and line width. The fabrication procedure using Nd-YAG laser is reported. This procedure is to cover the chip surface with photo resist, and form a big and optional size window on upper layer with laser beam, and finally expose the purposed layer. Three failure analysis examples using this technique are introduced: unformed contact falure mode, Si-noduled failure mode, and isolation destroying failure mode.     

Inductor design using amorphous metal C-cores

As standards are developed that limit harmonic current levels in off-line equipment, the need grows for solutions that do not increase the cost, size, and weight of power-factor-correction components. A method for correcting power factor that helps reduce cost, size, and weight involves using amorphous metal C-cores as the inductive element of power-factor-correction devices (e.g. a continuous-mode boost pre-regulator). Inductive components made with amorphous metals are smaller and lighter than those made with traditional materials. In this article we discuss power factor, the establishment of IEC 555 for limiting harmonic currents, and the benefits of using amorphous metal C-cores over traditional materials. A step-by-step procedure is then presented for designing the inductive element of a continuous-mode boost pre-regulator using amorphous metal C-cores for limiting harmonic currents     

基于阳极氧化铝模板的金属纳米孔阵列膜制备

以0.3 mol/L草酸为电解液,在40 V直流电压、0～5℃下采用二步阳极氧化法制备了纳米多孔阳极氧化铝模板。用射频磁控溅射法在阳极氧化铝模板表面制备了金属铝膜。SEM分析结果表明:金属膜复制了阳极氧化铝模板形貌,具有纳米孔有序阵列结构;金属膜的孔径受控于溅射功率和时间,功率30 W下沉积10 min约为68 nm,32 W下10 min约为58 nm,32 W下15 min约为25 nm。     

Barrier height modification in silicon Schottky (MIS) solar cells

A study of experimental data on Cr-oxide-p-Si solar cells has led to a metal evaporation procedure which gives 0.50 V < Voc< 0.56 V. This voltage is independent of the method used in oxide formation when oxide thickness ranges from 10 to 30 Å. It is concluded that slow deposition of the Cr on an oxide interface leads to a lowered metal work function and thus an increased Voc. A high n-value and fixed charge in the oxide are not necessary to obtain a high Voc.     

Complete calibration of a six-port reflectometer with one slidingload and one short

A novel method is presented for calibrating a six-port reflectometer using only one sliding load of unknown reflection coefficient and one short as a calibration standard. The calibration procedure is derived from the fact that the Fourier coefficients of the periodic port power ratios corresponding to the sliding load positions are closely related to the six-port system parameters. The unknown reflection coefficient of the sliding load as well as the eleven system parameters at each frequency is determined in the procedure. The validity and utility of the proposed method are confirmed by experiments over the frequency range 8.5-12.0 GHz in 0.5 GHz steps with a rectangular waveguide sliding load and a polished metal standard short     

Surface Charge Reversal Method for High‐Resolution Inkjet Printing of Functional Water‐Based Inks

Printed electronics is a rapidly growing area of research being explored for the manufacture of large‐area and cost‐effective electronic devices by the patterned application of functional inks. There are challenges associated with processing the inks compatible with inkjet printing technology and developing efficient methods to successfully obtain the desired features, particularly when it comes to metal and metal–organic complex inks. Here, a reliable method is developed to achieve a sophisticated microstructured pattern using the inkjet printing technique assisted by a surface charge reversal effect. In addition, a procedure is formulated to obtain good quality, stable metal–organic water‐based inks compatible with salts of a variety of transition metals and rare earths, without the need for additional volatile solvents. A feasible and water‐based ink formulation combined with a simple and noninvasive surface charge reversal treatment constitutes a major step toward the manufacture of high‐resolution, inorganic patterned thin films on hydrophobic substrates using inkjet printing. These outcomes lead to the path of effective fusion of inorganic and organic heterointerfaces by simples designing and printing.     

Alkaline cleaning of silicon wafers: additives for the prevention of metal contamination

The paper presents a new strategy for cleaning of silicon wafers. A novel class of chelating agents added to alkaline cleaning mixtures provides promising performance without negative effects such as metal redeposition due to residual metal contamination of the cleaning solution. The superior capability of the new cleaning process is confirmed by the results obtained from wafer surface metal analysis as well as from minority carrier lifetime and diffusion length measurements and gate oxide integrity tests. Particle densities and surface roughness are not influenced by the presence of the chelating agents in the cleaning solution. TOF–SIMS measurements do not indicate any deposition of chelating agent on the wafer surface. With this type of modified SC-1 cleaning procedure the acid SC-2 step used in conventional RCA cleans to remove the metals deposited in the preceding SC-1 step is unnecessary resulting in substantial cost savings with respect to chemicals, waste, equipment and space.     

Some properties of polypyrrole-paper composites

It is shown that porous materials such as paper can be impregnated with a conducting polymer by first soaking the paper in a solution of metal salt which acts as an initiator for subsequent polymerization. By using this procedure the conductivity of filter paper can be raised to as high as 2 (ohm cm)⁻¹ for an FeCl₃/H₂0/pyrrole combination. The role of the metal ion is discussea and it is pointed out that the impregnated papers exhibit both ionic and electronic conductivity. The polypyrrole paper composites exhibit some properties similar to carbon black-polymer composites.     

Complete thermodynamic analysis of static electric fields and excess charge in metals

Eventually thermodynamics can predict the flow of electrons in electronic devices, but a prerequisite for such an analysis is information on the corresponding equilibrium condition. A suitable thermodynamic procedure for determining the equilibrium distribution of charge in a static electric field is developed from the electrochemical potential of the conduction electrons. The resulting equation is suitable for application to a metal or a semiconductor. The case of a metal is simpler and therefore has been chosen for this initial treatment. If the thickness of a sheet of a typical metal is greater than about 8 nm (about 20 atomic layers) the mathematical solution is relatively simple and leads to the well-known Debye layer of accumulated electrons. For thinner sheets, down to atomic dimensions, the solution is more difficult and leads to novel predictions, including a pronounced decrease in the maximum accumulation at the surface. These results are obtained on the assumption that the material is homogeneous. In particular, the surface layers are assumed to be basically the same material as the bulk of the specimen. The contrast with present mechanistic views is discussed.     

CALYPSO — Critical Area, Lifetime, and Yield Predicting Software

This contribution is divided into three parts. First we introduce a new procedure for the extraction of defect size distributions taken into account the real defect outline. In the second part a definition for reliability metal defects is given. Based on this definition a new lifetime prediction model for metal lines is introduced and theoretical and experimental results are compared. Our new yield and lifetime predicting software system CALYPSO is represented in the third part of the paper. The highlights of CALYPSO are the very high speed of the calculations, the implementation of the above mentioned lifetime prediction algorithms, and a module for the build-in reliability check of layout data.     

Flexible RFID Tag Metal Antenna on Paper‐Based Substrate by Inkjet Printing Technology

A reliable and low‐cost solution‐processing procedure to synthesize a highly adhesive flexible metal antenna with low resistivity for radio‐frequency identification device (RFID) tags on paper substrates via inkjet printing combined with surface modification and electroless deposition (ELD) is demonstrated in this paper. Through the surface modification of colloidal solution of hydrolyzed stannous chloride and chitosan solution, the paper‐based substrate is able to reduce the penetration rate of ink and further increase the adsorption amount of silver ions, which could create a catalytic activating layer to catalyze the subsequent ELD of a conductive deposited metal antenna. The resulting metal antenna for RFID tags presents good adhesive strength and low resistivity of 2.58 × 10^?8 Ω·m after 40 min of ELD, and maintains a reliable reading range of RFID tags even after over 1000 times of bending and mechanical stress. Consequently, the developed technology proposed allows for cheap, efficient, and massive production of metal antenna for paper‐based RFID tags with excellent mechanical and electrical properties. Furthermore, this process is especially advantageous for the fabrication of next‐generation flexible electronic devices based on paper substrates.     

The effect of edge metal profiles on the accuracy of electrical modeling of advanced packages

Electronic package edge metal profiles have an effect on package characteristics on an order increasingly close to the tolerances expected for the package electrical performance. Several two-dimensional (2-D) tools are available that can be used to evaluate predesign and layout issues with nonrectangular edge profiles. However, tools that extract models from actual designs using the most up-to-date computer-aided design/computer-aided engineering (CAD/CAE) design and modeling flows do not yet take into account these real-world metal geometries. Variations in impedance and crosstalk associated with real profiles versus rectangular idealizations are identified for some typical cases and a computational procedure is discussed which may efficiently address this problem.