Computer Network Architectures

This tutorial analyzes developments in computer network architectures from a top-down design viewpoint—starting with user interface requirements, then developing a structure to realize that interface.     

Network Architectures and Performance

The capability of networks to handle various forms of communications traffic and to interconnect is based on several network characteristics, most important, capacity and utilization. A review of available network architectures and their abilities to handle increasing user demand while maintaining reliability in a bandwidth-intensive environment helps sort out today's maze of networking options.     

适合无线自组网的QOS体系结构研究

随着移动无线网络技术的发展和多媒体业务的普及,在无线自组网上保障业务的服务质量（QoS）已成为备受关注和急需解决的热点问题之一。文中提出一种适用于无线自组网的QoS体系——FQAw,试图提升无线自组网的QoS保障能力。首先,说明了在无线自组网中采用QoS体系结构的必要性。然后,详细说明和分析FQAW体系结构的设计理念、网络结构、功能部件和相关机制。分析表明基于分簇网络结构的FQAW可提高无线自组网的可扩展性和服务质量保障水平,但是还需借助于计算机模拟和现场试验等方法来评价QoS网络体系结构的优劣。     

Affinity-Based Network Interfaces for Efficient Communication on Multicore Architectures

Improving the network interface performance is needed by the demand of applications with high communication requirements (for example, some multimedia, real-time, and high-performance computing applications), and the availability of network links providing multiple gigabits per second bandwidths that could require many processor cycles for communication tasks. Multicore architectures, the current trend in the microprocessor development to cope with the difficulties to further increase clock frequencies and microarchitecture efficiencies, provide new opportunities to exploit the parallelism available in the nodes for designing efficient communication architectures. Nevertheless, although present OS network stacks include multiple threads that make it possible to execute network tasks concurrently in the kernel, the implementations of packet-based or connection-based parallelism are not trivial as they have to take into account issues related with the cost of synchronization in the access to shared resources and the efficient use of caches. Therefore, a common trend in many recent researches on this topic is to assign network interrupts and the corresponding protocol and network application processing to the same core, as with this affinity scheduling it would be possible to reduce the contention for shared resources and the cache misses. In this paper we propose and analyze several configurations to distribute the network interface among the different cores available in the server. These alternatives have been devised according to the affinity of the corresponding communication tasks with the location (proximity to the memories where the different data structures are stored) and characteristics of the processing core. As this approach uses several cores to accelerate the communication path of a given connection, it can be seen as complementary to those that consider several cores to simultaneously process packets belonging to either the same or different connections. Message passing interface (MPI) workloads and dynamic web servers have been considered as applications to evaluate and compare the communication performance of these alternatives. In our experiments, performed by full-system simulation, improvements of up to 35% in the throughput and up to 23% in the latency have been observed in MPI workloads, and up to 100% in the throughput, up to 500% in the response time, and up to 82% in the requests attended per second have been measured in dynamic web servers.     

An Optimization Methodology for Neural Network Weights and Architectures

This paper introduces a methodology for neural network global optimization. The aim is the simultaneous optimization of multilayer perceptron (MLP) network weights and architectures, in order to generate topologies with few connections and high classification performance for any data sets. The approach combines the advantages of simulated annealing, tabu search and the backpropagation training algorithm in order to generate an automatic process for producing networks with high classification performance and low complexity. Experimental results obtained with four classification problems and one prediction problem has shown to be better than those obtained by the most commonly used optimization techniques     

认知网络体系结构研究新进展

日益复杂的应用环境和多样化的用户需求,致使当前网络系统管理极度复杂,且缺乏智能的自适应能力。认知网络正是应这种实际需求而产生的,它被认为是提高网络整体性能及端到端性能、简化网络管理、解决网络自律性的新途径,是下一代网络发展的必然趋势。首先对认知网络体系结构的研究动态进行总结归纳,介绍了3种典型的认知网络体系结构,在此基础上提出了一个基于多级反馈MDE环的认知网络结构—超网络(Super-NET),并采用PEPA和ODEs相结合的方法进行了初步形式化分析,为构建认知网络理论模型莫定了基础,最后指出了认知网络研究所面临的问题与挑战,并对该领域发展方向进行了展望。     

Fault Tolerance in Regular Network Architectures

Computer systems with large numbers of processors pose serious reliability problems. One solution is to build redundant communication paths and dynamic reconfiguration into network designs.     

Array Data Flow Analysis for Load-Store Optimizations in Fine-Grain Architectures

The performence of scientific programs on modern processors can be significantly degraded by memory references that frequently arise due to load and store operations associated with array references. We have developed techniques for optimally allocating registers to array elements whose values are repeatedly referenced over one or more loop iterations. The resulting placement of loads and stores is optimal in that number of loads and stores encoutered along each path through the loop is minimal for the given program branching structure. To place load, store, and register-to-register shift operations without introducing fully/partially redundant and dead memory operations, a detailed value flow analysis of array references is required. We present an analysis framework to efficiently solve various data flow problems required by array load-store optimizations. The framework determines the collective behavior of recurrent references spread over multiple loop iterations. We also demonstrate how our algorithms can be adapted for various fine-grain architectures.     

Data and Task Alignment in Distributed-Memory Architectures

Different alignments of multidimensional arrays on a meshconnected SIMD architecture result in different communication patterns during parallel program execution. In this paper a compile-time selection of data alignment that minimizes communication cost is discussed. First, it is shown that the selection is computationally as hard as a subclass of the well-known problem of finding the closest vector in a lattice. The NP-hardness of the latter problem is proven. Then, two algorithms for exact minimum solution(s) are discussed. Although the complexity of these algorithms is exponential, for small lattices often generated by parallel scientific computation the execution times of these algorithms may be acceptable. A polynomial-time algorithm for finding an approximate solution is also described. Finally, improvement in communication cost resulting from alignments for randomly generated graphs are presented.     

Streets of Byzantium: Network Architectures for Fast Reliable Broadcasts

A site broadcasting its local value to all other sites ina fault-prone environment is a fundamental paradigm in constructing reliable distributed systems. Time complexity lower bounds and network connectivity requirements for reliable broadcast protocols in point-to-point communication networks are well known. In this paper, we consider the reliable broadcast problem in distributed systems with broadcast networks (for example, Ethernets) as the basic communication architecture. We show how properties of such network architectures can be used to effectively restrict the externally visible behavior of faulty processors. We use these techniques to derive simple protocols that implement reliable broadcast in only two rounds, independent of the failure upper bounds.     

图神经网络加速结构综述

近年来,新兴的图神经网络因其强大的图学习和推理能力,得到学术界和工业界的广泛关注,被认为是推动人工智能领域迈入“认知智能”阶段的核心力量.图神经网络融合传统图计算和神经网络的执行过程,形成了不规则与规则的计算和访存行为共存的混合执行模式.传统处理器结构设计以及面向图计算和神经网络的加速结构不能同时应对2种对立的执行行为,无法满足图神经网络的加速需求.为解决上述问题,面向图神经网络应用的专用加速结构不断涌现,它们为图神经网络定制计算硬件单元和片上存储层次,优化计算和访存行为,取得了良好的加速效果.以图神经网络执行行为带来的加速结构设计挑战为出发点,从整体结构设计以及计算、片上访存、片外访存层次对该领域的关键优化技术进行详实而系统地分析与介绍.最后还从不同角度对图神经网络加速结构设计的未来方向进行了展望,期望能为该领域的研究人员带来一定的启发.     

Alternatives to Coscheduling a Network of Workstations

Efficient scheduling of processes on processors of a Network of Workstations (NOW) is essential for good system performance. However, the design of such schedulers is challenging because of the complex interaction between several system and workload parameters. Coscheduling, though desirable, is impractical for such a loosely coupled environment. Two operations, waiting for a message and arrival of a message, can be used to take remedial actions that can guide the behavior of the system toward coscheduling using local information. We present a taxonomy of three possibilities for each of these two operations, leading to a design space of 3×3 scheduling mechanisms. This paper presents an extensive implementation and evaluation exercise in studying these mechanisms. Adhering to the philosophy that scheduling and communication are intertwined and should be studied in conjunction, a complete communication substrate for UltraSPARC workstations, connected by Myrinet and running Solaris 2.5.1, has been developed. This platform provides the entire Message Passing Interface (MPI) to readily run off-the-shelf MPI applications by employing protected low-latency user-level messaging. Several applications can concurrently use this interface. This platform has been used to design, implement, and uniformly evaluate nine scheduling strategies with a mixture of concurrent real applications with varying communication intensities. This includes five new schemes (Periodic Boost, Periodic Boost with Spin Block, Spin Yield, Periodic Boost with Spin Yield, Dynamic Coscheduling with Spin Yield) that are presented in this paper. In addition to our evaluations of the pros and cons of each mechanism in terms of throughput, response time, CPU utilization, and fairness, it is shown that Periodic Boost is a promising approach for scheduling processes on a NOW.     

分簇VLIW结构下利用数据依赖图优化调度的研究

应用的需求促使如今的处理器必须尽可能高地利用程序中所存在的指令级并行度,然而,高指令级并行的硬件和指令调度技术会给寄存器资源带来极大的压力.要在单一寄存器堆的情况下,既维持高的指令级并行度,又保持高的运行时钟频率是一件非常困难的事情,这是因为,当指令级并行度足够高时,在单一寄存器堆情况下,寄存器堆访问端口数目的限制会使...     

主动网络的构造和网络安全策略

主动网络的概念是根据现存的计算机互联网络所存在的问题提出的,它是计算机网络技术未来发展的重要趋向之一。在主动网络内,路由器、网桥等设备可执行由用户传送的信息包中的程序代码,并根据用户的权限和要求改变工作状态,使用户具备对网络编程和设置的能力。与传统的互联网络相比,主动网络将为用户提供更加丰富、灵活的服务。但由此也产生更多的危及网络安全方面的新问题。文章根据著者在国外工作期间的研究心得和所收集的相关资料撰写而成,简要介绍主动网络的基本构造和网络安全方面的问题及对策。     

Deep Convolutional Neural Network Architectures for Tonal Frequency Identification in a Lofargram

International Journal of Control, Automation and Systems - Advances in convolutional neural networks (CNNs) have driven the development of computer vision. Recent CNN architectures, such as those...     

用于数据挖掘的贝叶斯网络

贝叶斯网络是用来表示变量集合的连续概率分布的图形模式,它提供了一种自然地表示因果信息的方法,用来发现数据间的潜在关系.贝叶斯网络的学习也就是要找出一个能够最真实反映现有数据库中各数据变量相互之间的依赖关系的贝叶斯网络模型,即根据数据样本D和先验知识ζ,找出后验概率p(s^h|D,ζ)最大的贝叶斯网络S.该文在数学上对贝叶斯网络的学习方法进行了严格的推导,用一个实例来说明贝叶斯网络的计算过程,并介绍了贝叶斯网络在数据挖掘领域内的应用.     

RCDP：基于冗余的连续数据保护架构

连续数据保护提供了数据存储领域其它任何技术如备份、快照、镜像等不具有的捕获每个写请求的能力,因而使得恢复点日标(RPO)降低到可能具有的最低限,但是其恢复时间日标(RTO)问题却远远没有解决.另外,连续数据保护系统对空间的需求也是一个亟待研究的议题.RCDP是针对上述问题提出的一系列连续数据保护的架构,它采用冗余与多映像恢复的策略,将恢复时间降低到可以接受的范围内.     

Adptable Architectures for Supersystems

New adaptation properties for supersystem architectures will allow higher throughputs from the same hardware, lengthening system life cycles.     

一种基于强化学习的限定代价下卷积神经网结构自动化设计方法

目前的神经网络结构自动化设计方法主要对所设计神经网络结构的预测准确率进行优化。然而,实际应用中经常要求所设计的神经网络结构满足特定的代价约束,如内存占用、推断时间和训练 时间等。该文提出了一种新的限定代价下的神经网络结构自动化设计方法,选取内存占用、推断时间和训练时间三类代表性代价在 CIFAR10 数据集上进行了实验,并与现有方法进行了对比分析。该方法获得了满足特定代价约束的高准确率的卷积神经网络结构,可优化的代价种类比现有方法更多。