多层陶瓷外壳的失效分析和可靠性设计

文章对多层陶瓷外壳的失效模式,包括陶瓷底座断裂失效、绝缘电阻失效、断路和短路失效、外引线和无引线外壳引出端焊盘与外电路连接失效、电镀层锈蚀失效、密封失效、键合和芯片剪切失效和使用不当造成失效等进行讨论,并对这些失效的失效机理进行了分析,根据以上的失效模式及其失效机理分析,对多层陶瓷外壳的可靠性设计进行了探讨。     

芯片剥层技术在集成电路失效分析中的应用

随着集成电路向多层结构方向的发展,对芯片进行失效分析必须解决多层结构下层的可观察性和可测试性.本文介绍了失效分析中去钝化层、金属化层和层问介质等的各种方法,包括湿法腐蚀、反应离子刻蚀和FIB刻蚀等方法,结合图例进行剥层前后对比分析,并通过实例说明剥层技术在集成电路失效分析中的重要作用.     

基于失效物理的集成电路故障定位方法

超大规模集成电路后道工艺(BEOL)中的失效日益增多,例如多层金属化布线桥连、划伤,栅氧化层的静电放电(ESD)损伤、裂纹等失效模式,由于失效点本身尺寸小加上电路规模大,使得失效分析难度增加。为了能够对故障点进行快速、精确定位,提出了基于失效物理的集成电路故障定位方法。根据CMOS反相器电路的失效模式提出了4种主要故障模型:栅极电平连接至电源(地)、栅极连接的金属化高阻或者开路、氧化层漏电和pn结漏电。结合故障模型产生的光发射显微镜(PEM)和光致电阻变化(OBIRCH)现象的特征形貌和位置特点,进行合理的失效物理假设。结果表明,基于该方法可对通孔缺陷、多层金属化布线损伤以及栅氧化层静电放电损伤失效进行有效的定位,快速缩小失效范围,提高失效分析的成功率。     

集成电路氧化层失效定位技术研究

介绍了一种针对集成电路氧化层失效的定位和分析技术。采用光发射显微镜、光致电阻变化技术,对比出电路中不同的发光机构或电阻变化点。结合电路故障假设法和版图分析,对氧化层失效位置进行定位。最终,采用制样和物理分析方法,找到失效原因。案例分析表明,该方法精确、快速,可应用于CMOS集成电路的栅氧化层、双极集成电路的MOS电容氧化层、GaAs集成电路的MIM电容的失效定位,减少了后续FIB或RIE等物理分析方法的工作量,提高了失效分析的成功率。     

多层瓷介电容器的应用现状及失效分析

电容器已广泛应用于各种电子设备中,其中多层瓷介电容器具有体积小、容量大、高频特性好、可靠性高等一系列优点。本文对多层瓷介电容器的应用现状进行研究,发现电容器失效主要表现为自身缺陷和在装配、使用过程中的引入缺陷,通过分析得出机械应力和热应力是导致多层瓷介电容器失效的主要原因。因此,在装配、焊接等使用过程中要避免引入过大的机械应力及热应力,防止多层瓷介电容器失效。     

OBIRCH用于集成电路短路的背面失效定位

基于光束感生电阻变化(OBIRCH)的热激光激发定位技术广泛应用于半导体器件的失效分析,特别是大规模集成电路的短路失效定位.详细介绍了OBIRCH技术在芯片背面失效定位时的原理和方法,通过精密研磨、抛光等先进制样手段对失效样品进行开封、芯片背面减薄.采用OBIRCH方法从芯片背面进行激光成像,成功对0.18 μm工艺6层金属化布线的集成电路ggNMOS结构保护网络二次击穿和PMOS电容栅氧化层损伤进行了失效定位,并对背面定位图像和正面定位图像、InGaAs CCD成像进行了对比分析.结果表明,InGaAs CCD成像模糊并无法定位,OBIRCH背面定位成像比正面成像清楚,可以精确定位并观察到缺陷点.因此,OBIRCH技术用于集成电路短路的背面失效定位是准确的,可解决多层结构的正面定位难题.     

PBGA焊接开裂失效原因分析及改善

由于PBGA组件点位于四件与PCB之间,焊点的检查和检修成本很高,控制PCB组件焊接失效显得尤为重要。文章通过对焊接失效的焊盘镍层、金层结构进行了SEM、X-RAY分析导致焊接失效产生的主要原因,并针对此现象进行控制与改善。     

多层瓷介电容器失效模式和机理

系统介绍了开路、短路和电参数漂移这三种主要的MLCC失效模式,以及介质层内空洞和电极结瘤、介质层分层、热应力和机械应力引起介质层裂纹、其他微观机理等五种主要的失效机理。针对MLCC的失效分析技术,从生产工艺和使用设计上提出了预防MLCC失效的措施。     

复合材料层合板渐进损伤分析与试验验证

文章基于能量耗散的渐进损伤分析方法,建立了复合材料层合板的三维有限元模型。采用了带剪切非线性的修正三维Hashin准则作为单元失效判据,使用Linde模型对失效单元进行材料性能退化。通过编写用户自定义材料子程序(UMAT),实现了失效准则与材料退化准则在Abaqus中的应用。并通过试验对有限元模型进行了验证,仿真误差为7.8%。仿真分析得到的失效位置与失效模式和试验一致,表明文章模型能合理有效地进行层合板的强度预测和失效分析。     

硅基异构集成模块金属互连失效分析

介绍了硅基三维异构集成模块金属互连失效的一种定位方法.通过分析集成模块的金属互连结构,采用介质层剥离、金刚刀裂片、磨削制样等预处理方法,结合聚焦离子束(FIB)、电子能谱(EDAX)等工具,实现了故障点的有效定位.介绍了三维集成模块金属互连失效的一种失效机理.通过对集成模块生产工艺的分析,以及对实验晶圆进行模拟去胶实验...     

Structural reliability assessment of multi-stack package (MSP) under high temperature storage (HTS) testing condition

Wire ball open failure at the interface of the gold wire and bonding pad of a multi-stack package (MSP) under high temperature storage (HTS) condition of 150 °C is studied. Failure analysis using FIB-SEM was conducted by in-plane moiré interferometry and FEA to clarify the failure mechanism. The ball open failure due to Kirkendall void that results from metal diffusion at high temperature was accelerated by the tensile stress imposed at the gold wire. The tensile stress developed at the gold wire when packages showing different warpage behaviours were stacked. Mechanical interaction between top and bottom packages caused unstable warpage, readily twisted and saddled. The wire came in contact with the photo-sensitive solder resist (PSR) dam because of the unstable warpage and this contact resulted in tensile stress at the gold wires. Solder flux residues reacted with the encapsulant, and as a result, the encapsulant of the top package adhered to the chip of the bottom package, and this adherence created additional tensile stress at the gold wires. To reduce the tensile stress at the wires, the PSR dam was removed, loop shape was altered from 45° to 90°, water soluble flux was applied, and cleaning process was added. HTS reliability was significantly improved and guaranteed after reducing the tensile stress at the wires.     

Interconnecting to aluminum- and copper-based semiconductors (electroless-nickel/gold for solder bumping and wire bonding)

Electroless nickel and immersion gold plating technologies (e-Ni/Au) have traditionally been used almost exclusively within the electronics industry to create a solderable surface on substrate materials, e.g. laminate boards. Recent advances in these plating technologies, along with the inherent low costs associated with electroless plating processes, have enabled the extension of their utilization into a variety of semiconductor applications, e.g. wafer level pad metallization. This paper describes the electroless nickel and immersion gold processes for both aluminum- and copper-based semiconductors. The nickel plating bath is a hypophosphite-based solution and the gold bath is a cyanide-free sulfate-based solution. For aluminum-based integrated circuits a zincation process is used to initiate nickel growth, and for copper, palladium is used to catalyze the surface. Tight control of the chemistries, equipment, and run-time process variables are required to ensure repeatability. Thin film Auger analysis of the as-plated films shows well-defined layers of high purity gold and nickel/phosphorous. Adhesion of the e-Ni/Au layers was evaluated by measuring the load required to shear I/O pads plated with tall nickel bumps. Integrity of the nickel was further evaluated by subjecting the structures to multiple temperature cycles and test for pad shear strength. Results show no degradation in shear load or failure mode.The deposition of nickel and gold onto the I/O pad surfaces enables the subsequent use of both wire bond and flip chip (lead-based and lead-free alloys) interconnect methods. The integrity of gold wire bonds to the e-Ni/Au plated I/O pad was evaluated using ball shear, wire pull, and the corresponding failure analysis of each. Results show values well above product specifications, with wire pull failure modes in the wire and intermetallic failure in the ball shear studies. For flip chip applications, the e-Ni/Au layer was evaluated using stencil-printing technology to deposit several different solder alloys. In the current investigation, two test vehicles were successfully bumped with both 63Sn/37Pb and 90Pb/10Sn lead-based solder alloys, as well as the 95.5Sn/3.8Ag/0.7Cu lead-free alloy. In order to evaluate the compatibility of these alloys with the electroless nickel layer, solder bump shear tests were performed as a function of number of reflow cycles. Results show no degradation in shear load or failure mode among all three of the alloys tested, indicating no critical nickel consumption (i.e., excessive intermetallic growth) during reflow. Additional tests were performed comparing nickel under-bump-metallurgy (UBM) thicknesses of 1, 2 and 5 μm. Again, no critical nickel consumption was detected.     

微波电路中In/Au合金焊点的失效分析

本文针对微波电路元件焊接脱落问题,分析了In/Au合金焊点的微观结构及成分, 研究了In/Au芯片焊接的失效模式.找出了焊点脱落的主要原因:温度控制不当引起焊点的过热吃金或焊料的氧化引起的浸润不良,导致焊点的结合强度不够,致使焊点脱落.根据分析提出了严格控制温度及焊接时使用氮气保护的改进意见,较好的解决了In/Au合金焊接脱落问题,支撑了微波电路的生产工艺.     

Increasing bondability and ball-shear force of gold balls thermosonic bonding to flex substrates by depositing a nickel layer

To improve the bondability and ball-shear force of gold balls that are thermosonically bonded to copper electrodes over flex substrates, a nickel layer was deposited on the surface of the copper electrodes to increase their rigidity. A silver layer was then deposited on the nickel layer to prevent oxidation of the copper electrodes during the thermosonic bonding process. This nickel layer was expected to enhance the rigidity of copper electrodes over the flex substrates, increasing the thermosonic bonding efficiency of gold balls to copper electrodes over the flex substrates.Deposition the nickel layer on the copper electrodes improved the elastic modulus of the flex substrates, indicating that the nickel layer is effective in enhancing the rigidity of copper electrodes over the flex substrates. The bondability and ball-shear force of gold balls that are thermosonically bonded to copper electrodes increases with the thickness of the nickel layer given fixed bonding parameters. One hundred percent bondability and high ball-shear force can be achieved when gold balls are thermosonically bonded to copper electrodes with the deposition of a 0.5 μm-thick nickel layer. Herein, the ball-shear force was higher than that specified in JEDEC standards. Furthermore, gold balls that were thermosonically bonded to copper electrodes with a nickel layer had a large bonded area with an extensive scrape, while gold balls that were thermosonically bonded to copper electrodes without a nickel layer had a blank surface morphology. This experimental result was similar to that of tests of the elastic modulus of flex substrates, similarity can be used to explain that the effectiveness of the nickel layer in increasing the rigidity of copper electrodes, increasing the bonding efficiency at the bonding interface between gold balls and copper electrodes during thermosonic bonding process. After ball-shear test, a layer that was stuck on the ball bond was observed at the location of fracture of the ball bonds for gold balls they were thermosonically boned on copper electrodes with 0.5 μm-thick nickel layer. This observation implies that the ball-shear force of the gold balls that were bonded on the copper electrodes exceeded even the adhesive force of the layers that were deposited on the copper electrodes.The deposition of a 0.5 μm-thick nickel layer on copper electrodes over flex substrates improved the rigidity of the copper electrodes; the ultrasonic power could be propagated to the bonding interface between the gold balls and the copper electrodes, increasing the bondability and ball-shear force.     

不同镀层结构的金属外壳盐雾试验分析

集成电路外壳的抗盐雾腐蚀能力是由材料、冶金、电镀工艺及镀层结构等多种因素决定的。对三种底材的三种镀层结构进行抗盐雾对比试验,并对三种结构的失效概率进行了统计分析。结果表明,在镀层达到一定厚度后,采用镍与金的交叉镀层结构抗盐雾能力最强,最差的是镍层加金层结构的镀层外壳。     

ENIG Corrosion Induced by Second-Phase Precipitation

Materials analysis of a flip-chip package lot with solder bump interconnect failures revealed a new mechanism for corrosion of electroless nickel immersion gold surface finish. Detailed scanning and transmission electron microscopy (SEM and TEM) in conjunction with focused ion beam microscopy and electron dispersion analysis of the unsoldered ball grid array substrate pads on packages that exhibited flip-chip solder bump interconnect failures revealed an unusual and subtle defect in the original Ni(P) layer, which was ultimately responsible for flip-chip joint failure. Detailed TEM analysis of the defect regions showed that they consisted of Ni(P) particles of slightly different composition than the bulk Ni(P) layer. Microstructure changes around these incorporated particles indicated that the second-phase particles were deposited from the plating bath during the Ni(P) growth stage. The second-phase particles provided additional surface area for nucleation and growth of Ni(P). Ultimately, a low-density boundary region in the growing Ni(P) layer formed where the particle-induced growth front and the planar Ni(P) film growth front intersected. This low-density interface eventually terminated at the surface of the Ni(P) layer. In addition the growth from the second-phase particle created localized surface topology that was different than that of the surrounding Ni(P) layer. The low-density interfaces as well as the surface topology led to enhanced corrosion of the Ni(P) layer when exposed to the immersion gold plating process. In some cases the corrosion was severe enough to create voids in the Ni(P) layer. The exposed, oxidized Ni(P) surfaces in and around these enhanced corrosion regions did not wet when exposed to solder. This led to degradation in the strength of the solder joint and subsequent solder interconnect failure.     

Aging Effects in Gold Thermocompression Bonds to Complex Metallizations

The times to failure of Au thermocompression bonds to Au-Mo-Al and to Au-Ti-Al multilayer films were determined as a function of temperature over the range of 125-400°C and compared with the time to failure of gold bonds to aluminum films. A 500-? Ti intermediate film was found to be ineffective as a barrier to reaction between gold and aluminum. On the other hand, a 500-? Mo film was effective, providing increased time to failure over that observed for bonds to Au-Ti-Al and Al films. No failures were observed after 2000 hours at 400°C when gold wire bonds were made to an Au/Mo/Al metallization having 1000 ? of molybdenum as the intermediate layer.     

PCB镀金层耐腐蚀性和失效机理浅析

文章通过对电镀软金过程采用不同的电镀时间,电流密度,电镀次数形成不同的金、镍层厚度的板件,用盐雾和酸雾实验研究不同工艺加工的金面耐腐蚀性差异,结果发现金厚是影响金面耐腐蚀性的关键因素,文章还对金面的耐腐蚀性机理进行了探讨。     

Microline-etching technique

This paper describes a technique of etching composite layers of molybdenum + gold into lines of micron dimensions. The technique makes use of sputter etching the composite layer of gold + molybdenum using the photo-resist as the mask and then using the chemical etching method to selectively etch the under layer of molybdenum. As a result, it is possible to under-cut the molybdenum film in a controllable manner thereby achieving lines of micron dimensions while leaving a wide and thick gold layer on the top. The various advantages of the technique are also pointed out.