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XD-YES:IC功能成品率模拟器的实现 总被引:1,自引:0,他引:1
首先建立缺陷空间分布和粒径分布的模型,并讨论了缺陷通过版图产生电路错误的过程,给出了IC功能成品率模拟器XD-YES的实现。用XD-YES对微电子测试图和实际IC的功能成品率模拟和分析表明,其结果与实际符合很好,从而表明XD-YES的可行性和实用性。 相似文献
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首先建立缺陷空间分布和粒径分布的模型,并讨论了缺陷通过版图产生电路错误的过程,给出了IC功能成品率模拟器XD-YES的实现。用XD-YES对微电子测试图和实际IC的功能成品率模拟和分析表明,其结果与实际符合很好,从而表明XD-YES的可行性和实用性。 相似文献
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本文主要讨论EDI用户对下层通信系统服务质量的要求,阐述MHS模型对EDI传输的支持,并从用户角度分析CCITT-X。435协议设计的出发点,帮助系统实现者深化标准的理解。 相似文献
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本文探讨了用X射线能谱仪(EDS)分析卤化银微晶的空间分辨率和吸收修正问题。对SEM-EDS和STEM-EDS两种不同分析模式的空间分辨率进行计算,表明STEM-EDS是研究单个卤化银微晶内碘的含量及分布的有效方法。并对定量分析数据和吸收修正参数进行了讨论,结果证明微晶不同区域厚度的差异,对碘含量的定量测定的影响可以忽略。 相似文献
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RELAX算法的分辨特性分析 总被引:2,自引:0,他引:2
本文讨论了RELAX算法实现信号分离的数学机理以及实现的信号分辨的一些特性,探讨了这些特性对其实现信号分辨与否的表现;而且对从DD-RELAX到CD-RELAX,ELAX-AS以及MD-RELAX的发展和联系作了分析讨论,最后对所作理论分析进行了计算机模拟。 相似文献
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EMX-500交换机系统带数据丢失的原因分析江苏省徐州邮电局朱小枫EMX-500交换机的系统带最初是由MOTOROLA公司提供的,它共有3个组成部分,即PATCH,SYSGEN(SYSTENGENARATION)和空的CHANGEJOUNAL。前两部... 相似文献
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雷卡1X-AIME(Air Interface Monitor/Emula-tor)系统是专门为手机的cdmaOne及 cdma2000 1X信令测试而设计的,广泛应用于新产品开发、兼容测试、评估和服务支持,是手机生产研发时必不可少的测试工具。 目前,1X-AIME系统可支持cdmaOne+cdma2000的标淮,包括:IS95A、IS95B、J-STD-008、ARIB-T53、KOREAN 800MHZ、KOREAN PCS、IS-2000 1X等,并且兼容CDG22、CDG53及CDG57的第二阶… 相似文献
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基于R.S.Soin和R.Spence(1980)提出的电路中心值设计的统计最优化方法,文中提出了一种改进的重心游移法。该方法系统地解决了成功点集为空集时的参数中心值设计问题。给出了两个改进策略和系统连接问题。以电路设计为例证明了该方法的可行性和实用性。 相似文献
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对于集成电路设计、生产过程中的多目标、多约束统计优化问题,本文提出了“合格率足够高”的优化宗旨,并从概率论的基本原理出发,结合集成电路的特点,导出了一种合格率的近似表述方法,提出的变权重Monte Carlo法编程简便,效率高。采用这些优化策略设计的集成电路合格率优化系统取得了比较好的结果。 相似文献
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IC优化设计及其成品率预测 总被引:3,自引:3,他引:0
IC成品率是与电路性能和制造成本及制造效益紧密相关的一个重要因素,在进行IC优化设计时,可将成品率与制造效益作为协调各性能指标的优化目标.针对这一问题,本文完善了IC成品率效益协调优化设计模型,提出了一种实现该模型的IC优化设计和成品率预测方法,并利用OrCAD/PSpice中的统计分析和电路性能分析的功能和特点,建立了相应的算法.实例表明,该方法及其实现算法是有效的. 相似文献
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集成电路局部缺陷模型及其相关的功能成品率分析 总被引:2,自引:0,他引:2
大规模集成电路(VLSI)使亚微米特征尺寸的大面积集成电路制造以及集成数百万个器件在一芯片上成为可能。然而,缺陷的存在致使电路版图的拓扑结构发生变化,产生IC电路连接错误,导致电路丧失功能,从而影响IC的成品率,特别是功能成品率。文章主要对缺陷的轮廓模型、空间分布模型和粒径分布模型作了介绍;对集成电路成品率的损失机理作了详细论述。最后,详细介绍了功能成品率的分析模型。 相似文献
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同步降压型DC/DC稳压器XD3407具有使用方便、性能稳定、价格低廉等优点,因此在掌上型个人电脑、蜂窝电话、无线与DSL调制解调器、数码相机和便携式媒体播放器等便携式电子产品领域得到了广泛的应用。主要介绍了XD3407的基本功能和特点,提出了XD3407过流保护模块的电路设计原理、设计分析、计算,并用HSpice软件对结果进行了仿真验证。 相似文献
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Chatterjee A. Gudmundsson D. Nurani R.K. Seshadri S. Shanthikumar J.G. 《Semiconductor Manufacturing, IEEE Transactions on》1999,12(1):44-52
The fabless-foundry partnership for integrated circuit (IC) manufacturing business is expected to grow from 12% in 1995 to approximately 17% (i.e., $45B) of the total IC market in 2000. The growth of this market will be even more significant for subquarter micron technologies-whose growth is driven by the multimedia industry. The customer base will extend beyond traditional fabless IC companies into vertically integrated IC manufacturers and system vendors. Given the rate of growth and the high technology profile of products, substantial investments in capital, technology, and skilled workforce have to be dedicated and managed effectively for ensuring a successful partnership. In this paper, we outline the potential coordination problems that may arise in such partnerships, and propose a framework for analyzing issues related to yield information sharing and yield improvement. Our analysis indicates that fabless-foundry contracts that are based on a fixed number of good dies, and better yield information are more profitable 相似文献
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S.M. Hu 《Solid-state electronics》1979,22(2):205-211
Some published modifications of the Poisson distribution for describing IC yield are critiqued. It is shown that it is incorrect to obtain an average yield for a non-uniform defect population by integrating, either in the geometrical space or in the density space, the Poisson distribution with some assumed density distribution functions. The correct way, and happily also the simplest way, is to average the yields of regionally partitioned subpopulations in a discrete manner. The simple Poisson distribution would become rigorously correct when the size of an imaginary IC increases to one quarter of a wafer, regardless of the non-uniformity in defect density. It is also shown that both cases of clustering of defects, one due to interaction among defects themselves, and the other due to wafer regional preference, result in increased yield for a given defect density in a wafer. On the other hand when there are interactions between defects and IC active area elements, or when defects themselves have physical dimensions, there would be a decreased yield for a given defect density, and a non-zero intercept in the plot of the logarithm of yield vs the active device area. 相似文献
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DESIGN AND ANALYSIS OF INTEGRATED OPERATIONAL AMPLIFIER XD1531 WITH LOW NOISE AT LOW FREQUENCIES 总被引:1,自引:0,他引:1
Principles of design are described for the low frequency integrated operationalamplifler XD1531 with low noise. The procedures of design of both the circuit structure and the tran-sistor shape are considered. The first stage of the circuit is designed with the methods of low noise atlow frequencies. The measures which decrease noises, especially, the 1/f noise originating .from thesemiconductor surface state and defects, are used for the transistor structure design. With analysisand comparison to products here and abroad in characteristics, it is shown that XD1531 has a lowernoise index at low frequencies than others, and the effectiveness of design methods for bringing lownoises have been demonstrated. 相似文献