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1.
Ultra-shallow junction formation is one of the most exciting new challenges for RTP process engineers and vendors. In many cases, reaction rat limited and diffusion limited processes are to be promoted or suppressed in a complementary manner. In the case of reaction rate limited processes, a short time “flash” annealing at higher temperatures is often more advantageous than the conventional temperature-time functions for 10–60 s with linear ramps. We have to optimize two phenomena simultaneously: the most effective dopant activation and defect removal without dopant loss. At the same time dopant profile redistribution is to be limited as much as possible. Beside the thermal kinetics of implant annealing, a proper surface control is also very important. Surface etching due to SiO formation with subsequent implant evaporation is as detrimental as SiO2 growth with subsequent implant segregation. The importance and possibilities of “controlled thermal kinetics” and “limited concentration” processing mode are shown in some RTA experiments.  相似文献   

2.
We discuss the desirable properties of an RTP tool and process for low temperature (<700 °C) applications. We contrast two different approaches for heating the substrates - a “cold-wall” system in which the energy is delivered as photons, and a “hot-wall” system where heat convection and conduction are the dominant heat transfer mechanism. We present arguments for why “hot-wall” systems have distinct advantages for most processes in the low temperature regime and demonstrate our conclusions on examples of Ni and Co silicidation process.  相似文献   

3.
An overview is given of modelling issues in rapid thermal processing. Firstly, the influence of surface and bulk properties on wafer emissivity is discussed. Secondly, the influence of back-side layers, wafer transparency and back-side roughness on temperature measurement is discussed. Thirdly, several causes of temperature non-uniformity are mentioned.  相似文献   

4.
Rapid thermal processing (RTP) applications are rapidly expanding from the original processes, typically performed above 1000 °C (e.g., post-implant annealing and silicon oxidation) to lower temperature applications such as cobalt and nickel silicide formation with process steps performed as low as 200 °C. The original lamp-based (i.e., “cold wall”) RTP systems, despite their pyrometry-related issues, are [1] still used, even in this low temperature regime. Another problem related to this approach occurs when processing materials exhibit significant outgassing, such as boron-phosphosilicate glass (BPSG). The outgassed vapour can condense on the cold chamber walls and change the light transmission characteristics of the quartz window. This can cause a process shift, uniformity change and will likely increase maintenance. In this paper, an alternative, hot wall approach, based on convection and conductive heat transfer is evaluated for low-temperature curing and annealing of benzocyclobutene (BCB) for high speed digital and microwave applications [2].  相似文献   

5.
A novel rapid thermal processing (RTP) unit called Zapper™ has recently been developed by MHI Inc. and the University of Florida for high temperature thermal processing of semiconductors. This Zapper™ unit is capable of reaching much higher temperatures (>1500°C) than conventional tungsten-halogen lamp RTP equipment and achieving high ramp-up and ramp-down rates. Implant activation annealing studies of Si+-implanted GaN thin films (with and without an AlN encapsulation layer) have been conducted using the Zapper™ unit at temperatures up to 1500°C. The measurements of electrical properties of such annealed samples have led to the conclusion that high annealing temperatures and AlN encapsulation are needed for the optimum activation efficiency of Si+ implants in GaN. It has clearly been demonstrated that the Zapper™ unit has tremendous potential for RTP annealing of semiconductor materials, especially for wide bandgap compound semiconductors that require very high processing temperatures.  相似文献   

6.
Like many of the technologies used to process integrated circuits, the road to manufacturing for rapid thermal processing (RTP) has been twisted. What began as a speculative laboratory apparatus has evolved into a cornerstone of IC technology. Qualities that make RTP desirable for IC manufacture include the ability to process wafers individually, the ability to minimize the time wafers spend at elevated temperature, the convenience of clustering RTP to other systems, and the possibility of maintaining cold reactor walls. This paper will review how these properties make RTP desirable. The paper also will present an overview of the difficulties surrounding the use of RTP and describe how many serious hurdles have been overcome. It will summarize the evolution of RTP from a curiosity to a mainstay technology in building integrated circuits. It then will describe SEMATECH’s role in working with RTP, ending with a direction for future application of RTP based on the National Technology Roadmap for Semiconductors (NTRS).  相似文献   

7.
Ion implants of 2.0 and 5.0 keV 11B+ and 2.2, 5.0, and 8.9 keV 49BF 2 + at a dose of 1E15/cm2 were investigated. Anneal conditions were developed which produced highly activated yet shallow junctions. The effects of oxygen were studied previously by us1–12 and found to be an important variable to control in order to produce uniform and repeatable sheet resistance and junction depths. A purge procedure and integrated oxygen sensor were developed to measure and control the oxygen background concentration for each anneal to assure repeatable results. “Shelf-life,” that is dwell time between implant and anneal, was investigated. It was found that, for low energy implants, the amount of native oxide grown affects retained dose, sheet resistance (Rs), and uniformity. Controlled oxygen level repeatability and shelf life results are presented and equipment designs are discussed.  相似文献   

8.
Minority carrier lifetime is an efficient indicator of defect levels present in the starting material as well as process and equipment induced defects. By employing rapid thermal processing (RTP) and rapid photothermal processing (RPP) as the thermal processing techniques, we have studied the effect of ultraviolet (UV) and vacuum ultraviolet (VUV) photons on the bulk minority carrier lifetime of phosphorous doped and undoped single crystal silicon wafers. For both diffused and undiffused wafers, we have observed an enhancement in the minority carrier lifetime when UV and VUV photons are used in conjunction with the samples processed without the use of UV and VUV photons. The effect of ramp rates on the minority carrier lifetime and the significance of optimized thermal cycles have also been studied in this paper. A possible explanation based on the dependence of diffusion coefficient on the photo spectrum of light source is also given in this paper.  相似文献   

9.
吕百达  廖严  蔡邦维 《中国激光》1991,18(4):255-261
本文建立了有限几何尺寸棒状激光介质瞬态热分布的三维模型。在普遍情况下推导出温度分布的解析公式。对棒状和slab介质作了对比。使用计算机作了数值计算进一步说明了我们的理论结果。  相似文献   

10.
In this study, we used a vacuum ultraviolet (VUV) radiation source in conjunction with tungsten halogen lamps based rapid thermal processing (RTP) system. The two light sources were arranged in different configurations to study the phosphorus diffusion in silicon. The high energy VUV photons in conjunction with infrared and visible photons resulted in enhanced diffusion and improved the bulk properties of silicon substrate. An improvement in the leakage currents of the diodes made from VUV irradiated wafers is observed. A qualitative explanation of the results based on the role of high energy photons in RTP is presented. High energy photons from VUV region to about 800 nm results in a decrease in the bond dissociation energies of the molecules, since they are in electronic excited states. Higher activation of dopants and reduction in activation energies is observed. The minority carrier lifetime measurements show that there is an enhanced phosphorus gettering and overall reduction of the recombination-generation centers in silicon.  相似文献   

11.
殷际英  颜炜 《激光与红外》2008,38(2):158-160
针对现有测温仪无法适应高温与真空工作环境的问题,对光纤传导辐射能进行了定性和定量分析,建立了光纤传导测温模型,导出了选型参数计算式及误差纠正式,并给出了实验实例,证明了该方法可行性,实现了对已有红外高温计的功能延伸.  相似文献   

12.
Fabrication of devices and circuits on silicon wafers creates patterns in optical properties, particularly the thermal emissivity and absorptivity, that lead to temperature nonuniformity during rapid thermal processing (RTP) by infrared heating methods. The work reported in this paper compares the effect of emissivity test patterns on wafers heated by two RTP methods: (1) a steadystate furnace or (2) arrays of incandescent lamps. Method I was found to yield reduced temperature variability, attributable to smaller temperature differences between the wafer and heat source. The temperature was determined by monitoring test processes involving either the device side or the reverse side of the wafer. These include electrical activiation of implanted dopants after rapid thermal annealing (RTA) or growth of oxide films by rapid thermal oxidation (RTO). Temperature variation data are compared with a model of radiant heating of patterned wafers in RTP systems.  相似文献   

13.
The effects of rapid thermal annealing on deep level defects in the undoped n-type InP with Ru as Schottky contact metal have been characterized using deep level transient spectroscopy (DLTS). It is observed that the as-deposited sample exhibit two deep levels with activation energies of 0.66 and 0.89 eV. For the samples annealed at 300 °C and 400 °C, a deep level is identified with activation energies 0.89 and 0.70 eV, respectively below the conduction band. When the sample is annealed at 500 °C, three deep levels are observed with activation energies 0.25, 0.32 and 0.66 eV. Annealing of the sample at 300 °C, orders the lattice of as-grown material by suppressing the defect 0.66 eV (A1) which is found in the as-deposited sample. The trap concentration of the 0.89 eV deep levels is found to be increased with annealing temperature. The deep level 0.32 eV may be due to the lattice defect by thermal damage during rapid thermal annealing process such as vacancies, interstitials and its complexes, indicating the damage of the sample after annealing at 500 °C. The defects observed in all the samples are possibly due to the creation of phosphorous vacancy or phosphorous antisite.  相似文献   

14.
H.261视频数据流的RTP封装   总被引:1,自引:0,他引:1  
H.261视频编解码标准广泛应用于IP网络的视频通信中,一般采用实时传输协议(RTP)保证H.261视频数据流的实时传输和质量监测.本文在分析H.261帧结构和RTP协议的基础上,基于H.261数据RTP封装的三层结构,此提出了一种新的适用于低带宽高效的封装算法和具体实现方法.  相似文献   

15.
The growth history of Hg1−xCdxTe films deposited on (100) CdTe substrates by chemical vapor transport (CVT) has been studied, for the first time, by using a transient growth technique. The observed morphological evolution of Hg1−xCdxTe films deposited at 545°C shows a transition behavior from three-dimensional (3D) islands to two-dimensional (2D) layer growth. The experimental results indicate that the so-called critical time needed for the above morphological transition is about lh under present experimental conditions. Based on the chemical bonding properties of Hg1−xCdxTe, and on the behavior of the morphological transition, the Stranski-Krastanov growth mode is suggested for the epitaxial growth system. The time dependence of the growth thickness, of the growth rate (R100) along the [100] direction, and of the surface composition all reveal a transient behavior. These are related to the nature of the Hg1-xCdxTe/ (100)CdTe heterojunction and to the surface reactions. Comparison of the growth rates and of the total mass deposited as a function of time shows the relationship between epitaxial growth and mass flux of the Hg1−xCdxTe-HgI2 chemical vapor transport system.  相似文献   

16.
This article presents a modeling and simulation method for transient thermal analyses of integrated circuits(ICs) using the original and voltage-in-current(VinC) latency insertion method(LIM). LIM-based algorithms are a set of fast transient simulation methods that solve electrical circuits in a leapfrog updating manner without relying on large matrix operations used in conventional Simulation Program with Integrated Circuit Emphasis(SPICE)-based methods which can significantly slow down the sol...  相似文献   

17.
汪波  胡安  陈明  唐勇 《半导体技术》2011,(7):501-504
绝缘栅双极晶体管(IGBT)是一种性能优良的全控型电力电子器件,由于线路和器件内部分布电感的存在,关断时集电极电流的快速变化会感应产生一个较大的电压尖峰从而引起过电压击穿。分析了栅极结电容放电时间常数和拖尾电流对电压尖峰的影响,通过改变栅极驱动电阻和温度可以抑制电压尖峰。分析了电压尖峰引起过压击穿的失效机理以及失效模式,表明IGBT过压击穿引起失效的本质仍然是结温过高引起的热击穿失效。  相似文献   

18.
The physical and electrical properties of BF 2 + implanted polysilicon films subjected to rapid thermal annealing (RTA) are presented. It is found that the out diffusion ofF and its segregation at polysilicon/silicon oxide interface during RTA are the major causes ofF anomalous migration. Fluorine bubbles were observed in BF 2 + implanted samples at doses of 1×1015 and 5×1015 cm−2 after RTA.  相似文献   

19.
硬脆性材料在磨削过程中的加工质量和效率成为目前制约硬脆性材料应用的主要问题之一,如何在加工工艺环节提高生产效率和加工质量成为亟待解决的问题,制约问题解决的主要原因是加工效率在很大程度上会引起加工质量变差,在提高加工效率的同时保证良好的加工质量极其困难。主要从影响加工质量的因素之一磨削温度入手,以硬脆性材料中的碳化硅、氧化铝为例,利用有限元分析软件对硬脆性材料的磨削过程进行热瞬态分析,分析了在不同的磨削加工参数(砂轮转速、磨削深度和工件速度)即不同加工效率时大口径碳化硅工件和氧化铝工件的最高温度及其变化曲线,并横向对比了氧化铝材料和碳化硅材料在同等磨削加工参数时的磨削热状态。针对性地研究了硬脆性材料在磨削加工过程中的一些特性,为硬脆性材料的加工工艺提供参考。  相似文献   

20.
Rapid thermal processing utilizing microwave energy has been used to anneal N, P, and Al ion-implanted 6H-SiC. The microwaves raise the temperature of the sample at a rate of 200°C/min vs 10°C/min for conventional ceramic furnace annealing. Samples were annealed in the temperature range of 1400-1700°C for 2-10 min. The implanted/annealed samples were characterized using van der Pauw Hall, Rutherford backscattering, and secondary ion mass spectrometry. For a given annealing temperature, the characteristics of the microwave-annealed material are similar to those of conventional furnace anneals despite the difference in cycle time.  相似文献   

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