Analysis of SCCL as a PN-code tracking loop

We introduce the application of SCCL that is based on sample-correlate-choose-largest procedure as a coherent baseband PN-code tracking loop applying biphase-level signals. Three adjacent estimates are formed by correlating the samples of the baseband waveform for each bit. We choose the corresponding timing (phase) of the estimate with the largest magnitude as the current correct timing (phase) and update it for each bit. Only one summation circuit is required due to the digital realization of the SCCL. The correlation properties of the samples from maximum length codes using the biphase-level signal set are investigated. Tracking performance is theoretically analyzed in both steady-state and transient conditions via a finite-state Markov chain model. The numerical results demonstrate strong PN-code tracking characteristics of SCCL     

Simple phase-locked loop with large pull-in range to noise bandwidth ratio

The little-known sawtooth phase comparator is shown to display frequency discrimination, allowing its pull-in range to be orders of magnitude greater than its noise bandwidth.     

On the rms bandwidth of nonlinearly envelope detected narrow-band Gaussian noise

This paper determines the relationship between the rms bandwidth of the envelope of a narrow-band Gaussian process and the rms bandwidth of the process itself for a general nonlinear (no-memory) envelope detector. The interesting result is shown that the output rms bandwidth depends only on the input rms bandwidth and the nonlinear device and not on the shape of the input spectrum. As an illustrative example, it is shown that the rms bandwidth of the output of anuth-law envelope detector issqrt{nu/2}times the rms bandwidth of the input process. Some attention is given to the determination of higher moments of the output spectrum in terms of moments of the input spectrum.     

A constant loop bandwidth in delta sigma fractional-N PLL frequency synthesizer with phase noise cancellation

This work presents the design of a new and unique design technique of constant loop bandwidth and phase-noise cancellation in a wideband ΔΣ fractional-N PLL frequency synthesizer. Phase noise performance of the proposed ΔΣ fractional-N PLL frequency synthesizer has been verified using CppSim simulator with the help of transistor level simulation results in Cadence SpecctreRF. Transient response of the proposed ΔΣ fractional-N PLL has been verified in transistor level simulation using Cadence SpectreRF in 0.13 μm standard CMOS process. The proposed phase-noise cancellation and constant loop bandwidth in wideband ΔΣ fractional-N PLL reduces the out of band phase noise by 18 dBc/Hz at 2 MHz offset frequency for a closed loop bandwidth of 1 MHz, when I_CP,max is equal to 2.6 mA. PLL locking time has been reduced with phase-noise cancellation and a constant loop bandwidth calibration circuits using the proposed CP unit current cell for the mismatch compensated PFD/DAC in wideband ΔΣ fractional-N PLL frequency synthesizer. Optimum phase noise performance can be achieved with the help of proposed design technique. Proposed ΔΣ fractional-N PLL frequency synthesizer is locked within 14.0 μs with an automatic frequency control circuit of the LC VCO and a constant loop bandwidth calibration circuit through the use of proposed CP unit current cell for the mismatch compensated PFD/DAC for the phase-noise cancellation in worst case condition of K_VFC = 10 and K_LBC = 150. Our new design technique can be extensively integrated for wideband fractional-N PLL for new type of wireless communication paradigm using the thinnest channel subharmonic transistor and low power devices, and it has the potential to open a new era of fractional-N PLLs for wideband application.     

A low-noise phase-locked loop design by loop bandwidth optimization

This paper describes a low-noise phase-locked loop (PLL) design method to achieve minimum jitter from a given PLL circuit topology. An optimal loop-bandwidth design method, derived from a discrete-time PLL model, further improves the jitter characteristics of a PLL already somewhat enhanced by optimizing individual circuit components. The described method not only estimates the timing jitter of a PLL, but also finds the optimal bandwidth minimizing the overall PLL jitter. A prototype PLL fabricated in a 0.6-μm CMOS technology is tested. The measurement shows significant performance improvement by using the proposed method, The measured rms and peak-to-peak jitter of the PLL at the optimal loop-bandwidth are 3.1 and 22 ps, respectively     

Gain-weighted technique for directly measuring loop bandwidth of split-loop phase-locked loop

A technique is described, for directly measuring the loop bandwidth of the recently proposed split-loop phase-locked receiver. This technique takes advantage of recent advances in laboratory test equipment, and is both rapid and straightforward. The characteristics produced permit the actual loop parameters to be determined, thus providing verification of the calculated performance.<>     

An astonishing reduction in the bandwidth of noise

When a band of Gaussian noise is hard-limited and its frequency is divided by N, its bandwidth is divided by about N². This experimental observation is verified by theoretical analysis and is explained heuristically.     

Thermal noise in a finite bandwidth

In a practical circuit, the output noise due to the thermal noise of a resistor will depend on the actual transfer function of the noise source. The bandwidth will never be infinite because the transfer function of either the noise source or the device measuring the output noise will cause limitations. Consequently, the thermal noise voltage of a resistor in a finite bandwidth is maximum for a given resistor value. That maximum thermal noise voltage depends on the stop frequencies and decreases for both smaller and larger resistor values     

On bandwidth

It is easy to argue that real signals must be bandlimited. It is also easy to argue that they cannot be so. This paper presents one possible resolution of this seeming paradox. A philosophical discussion of the role of mathematical models in the exact sciences is given and a new formulation of the 2 WT theorem is presented. The paper is a written version of the second Shannon Lecture given at the 1974 International Symposium on Information Theory. An appendix giving proof of the 2 WT theorem has been added.     

A low-noise PLL design achieved by optimizing the loop bandwidth

imal loop-bandwidth are 10.262 ps and 46.851 ps, respectively.     

Reducing the PLL noise bandwidth by a digital split-loop

The advantages of the split-loop technique for analog phase-locked loops with a time delay are well known. In this paper, it will be shown that the digital counterpart of the split-loop offers an additional advantage, since the first oscillator can already convert the incoming signal down into the baseband. If this signal is used for the demodulation, the noise bandwidth of the loop is reduced significantly without changing the acquisition and tracking ranges. The resulting noise bandwidth is calculated and compared to a conventional digital high-gain second-order loop. Furthermore, the effect on the BER performance for DQPSK modulation is simulated     

A fast-settling charge-pump PLL with constant loop bandwidth

A fully integrated fast-settling Fractional-N phase-locked loop (PLL) is presented. Based on the \(\Delta \varSigma\) modulator and I/Q generator architectures, the frequency synthesizer covers a frequency range of 130 MHz-1 GHz with a 3-KHz channel step. The constant loop bandwidth over the above tuning frequency ranges is achieved without modifying low pass filter parameters. The current of charge pump \(Icp\) is programmed not only to compensate the variation of voltage-controlled oscillator gain \(Kvco\), but also for adapting to the change of divider ratio \(N_{m}\). This calibration process is carried out in an open-loop condition for a small settling time. The proposed synthesizer was fabricated in 0.18 µm CMOS process. The measurement results show that the whole synthesizer PLL draws 11.3-mA including I/Q generator from 1.8 V supply. The out-of-band phase noise is ? 123 dBc/Hz@10 MHz with a 433 MHz carrier frequency after the divider. The normalized \(\left( {Icp*Kvco} \right)/N_{m}\) which is equivalent to the variation of PLL loop bandwidth ranges from ? 6 to 6%.     

基于优化环路带宽的低噪声锁相环设计

This paper describes a low-noise phase-locked loop （PLL） design method to achieve minimum jitter. Based on the phase noise properties extracted from the transistor, and the low-pass or high-pass transfer characteristics of different noise sources to the output, an optimal loop bandwidth design method, derived from a continuous-time PLL model, further improves the jitter characteristics of the PLL. The described method not only finds the optimal loop-bandwidth to minimize the overall PLL jitter, but also achieves optimal loop-bandwidth by changing the value of the resistor or charge pump current. In addition, a phase-domain behavioral model in ADS is presented for accurately predicting improved jitter performance of a PLL at system level. A prototype PLL designed in a 0.18 μm CMOS technology is used to investigate the accuracy of the theoretical predictions. The simulation shows significant performance improvement by using the proposed method. The simulated RMS and peak-to-peak jitter of the PLL at the optimal loop-bandwidth are 10.262 ps and 46.851 ps, respectively.     

Noise bandwidth suppression for low noise readout circuit

A new noise reduction circuit that suppresses noise bandwidth of the output stage is proposed for the readout circuit of an infrared detector operating at a high pixel rate. Using this circuit, it is found that the rms noise voltage of the output stage is effectively reduced from 87 to 52 μV at a pixel rate of 10 pixel/μs     

On the bandwidth of T-septum waveguide

The single T-septum waveguide is analyzed using the Rayleigh-Ritz-Galerkin technique. The method is a variation of that used by previous groups with reported conflicting results. The results of the analysis agree closely with those of G.G. Mazumder and P.K. Saha (1985) and those of F.J. German and L.S. Riggs (ibid., vol.37, no.5, p.917-9, 1989)     

On minimum step response rise time of linear low-pass systems under the constraint of a given noise bandwidth

If the step-response rise time of a linear low-pass system is to be a minimum under the constraint of a given noise bandwidth, the systems parameters should be so tuned that the step response is strictly free from overshoot. This conclusion is also true when the system bandwidth is defined as its 3-dB bandwidth.     

GNSS接收机锁相环最佳环路带宽的选取

锁相环环路带宽值的选取对于锁相环的跟踪误差性能有重要影响。基于全球卫星导航系统(GNSS）接收机中常用锁相环结构与数学模型,首先介绍了锁相环及其重要组成部分环路滤波器的结构和原理,然后分析了环路带宽的取值对锁相环两个最重要的误差源——环路热噪声误差和晶振阿伦偏差的影响,给出了低动态下使锁相环总的跟踪误差最小的最佳环路带宽的理论表达式。对基于由现场可编程门阵列（FPGA）芯片、温补晶振和模/数接口电路构建的实际硬件接收机平台进行了验证,结果表明：当根据最佳环路带宽的理论表达式取环路带宽值时,锁相环的跟踪误差最小。所推得的理论表达式不仅可以应用于GNSS接收机,也适用于一般的载波跟踪环设计。     

A constant loop bandwidth fractional-N frequency synthesizer for GNSS receivers

正A constant loop bandwidth fractional-TV frequency synthesizer for portable civilian global navigation satellite system(GNSS) receivers implemented in a 130 nm 1P6M CMOS process is introduced.Via discrete working regions,the LC-VCO obtains a wide tuning range with a simple structure and small VCO gain.Spur suppression technology is proposed to minimize the phase offset introduced by PFD and charge pumps.The optimized bandwidth is maintained by an auto loop calibration module to adjust the charge pump current when the PLL output frequency changes or the temperature varies.Measurement results show that this synthesizer attains an in-band phase noise lower than -93 dBc at a 10 kHz offset and a spur less than -70 dBc;the bandwidth varies by±3%for all the GNSS signals.The whole synthesizer consumes 4.5 mA current from a 1 V supply,and its area(without the LO tested buffer) is 0.5 mm~2.     

On the spatial bandwidth of scattered fields

It is shown that the scattered fields are almost space bandlimited functions. The effective bandwidthWis introduced and evaluated for a very general scattering system, as well as the error made using functions bandlimited tow > Wfor representing the scattered field. The effective bandwidth is very simply related to the maximum dimension of the scattering system; the error drops to negligible values for modest increases ofwcompared toW, in the case of large scatterers. Important consequences of the above general results are finally stressed.