State-variable-based transient circuit simulation using wavelets

For the first time a state variable transient analysis using wavelets is developed and implemented in a circuit simulator. The formulation is particularly well suited to modeling RF and microwave circuits and is validated by considering a nonlinear transmission line. However, results indicate that still more research is needed to make this method efficient for the simulation of large circuits     

A simple Flash memory cell model for transient circuit simulation

A simple Flash memory cell model for circuit simulation is presented. The proposed model gives an excellent fitting of dc and transient data and does not require additional simulation time comparing with that of a MOSFET transistor. Effective control-gate voltage method and ideal current-mirror technique are introduced to calculate floating-gate voltage. These allow macro modeling of a Flash memory cell in a circuit simulator.     

RLC二阶电路暂态过程的Multisim仿真

基于探索RLC二阶电路仿真实验技术的目的,采用Multisim仿真软件对RLC二阶电路暂态过程进行了仿真实验测试．给出了电路在过阻尼、临界阻尼、欠阻尼等情况下零输入响应及零状态响应的Multisim仿真方案,并介绍了不同工作条件下仿真时Multisim中信号源的选取及设置条件。结论是仿真实验可直观形象地描述RLC二阶电...     

Application of recursive convolution to transient simulation of interconnects using a hybrid phase-pole macromodel

A hybrid phase-pole macromodel (HPPM), which explicitly includes phase shifts (time delays) in addition to the system poles, was recently developed for modeling interconnects. In this paper, the HPPM is applied to the transient simulation of interconnects. First, the time-domain source waveform is expanded in terms of triangular expansion functions. Knowledge of the triangle impulse response (TIR) for an interconnect, which is represented in the form of an HPPM, then allows for the time domain simulation of the interconnect. A recursive convolution algorithm is adopted to carry out the required convolutions efficiently in the transient simulator. Combining this transient simulator with an HPPM extractor yields a transient interconnect signal analysis tool.     

Redesigning the old 555 [timer circuit]

It is rare that an integrated circuit stays on the market for 25 years. And it is surprising that, except for a CMOS derivative, the 555 timer has never been updated. It has been shrunk somewhat, but the original schematic and layout have remained intact. For a long time this situation could be explained by the versatility of the 555, whose speed, current draw and voltage range sit right in the middle of a vast field of applications. But in the last few years, supply voltages have moved downward, well below the 4.5 V at which the 555 cuts off, and the unit's 5-10 mA current requirement now seems wasteful. A better design is clearly needed. The author describes the features of the original timer before discussing the redesign. The voltage versus current design and output stage are discussed     

Three-dimensional transient thermal simulation: application to delayed short circuit protection in power ICs

Thermal effects may represent a limiting factor in the development of integrated circuits. As the power dissipated by integrated circuits becomes more relevant, the need increases for accurate modeling of the stationary and transient thermal behavior of the die-package structure. An analytical solution of the three-dimensional transient thermal diffusion problem is presented for a two-layer structure, together with a simple computer program for the calculation of the solution. The program, implemented on a minicomputer, is proven to be fast and accurate. The simulation technique is then applied to the design of a new short-circuit protection of a 6A current booster.     

Improved MOS transducer drive circuit [piezoelectric transducers]

The operation and design of a novel floating gate MOS output circuit is described. The circuit uses a unique variable positive feedback that increases the speed significantly and decreases the circuit area.     

PC programs for engineers [linear circuit CAD]

The program addresses the problem of relating the statistical effects of random element deviations to the variations in the magnitude characteristics of linear circuits. The program was written as a tool to assist in the design of equalizers, compensators, and filters. It is readily applicable to active or passive filters. It analyzes circuits composed of resisters, lossy (or non-lossy) capacitors and inductors, and operational amplifiers. For the latter devices, finite gain and bandwidth may be specified. The graphic display of the circuit characteristics is especially informative in that it shows not only the basic ideal Bode plot magnitude characteristic and its high/low range statistical variations, but also the limits of the specifications provided by the user     

A monolithic subscriber line interface circuit [in bipolar technology]

A monolithic SLIC fabricated with high-voltage dielectric isolation (DI) technology has been proven to have excellent performance and requires a minimum of external circuitry. The SLIC provides battery feed, overvoltage protection (with some external devices), ringing control, supervision, and hybrid functions.     

DIS today [Distributed interactive simulation]

As the power and potential to create robust distributed interactive simulation (DIS) environments using the technical principles introduced by the SIMNET project gains recognition, the need for establishing standards for the implementation of these principles has grown dramatically. Initially, the interest in achieving interoperability between many disparate simulation components drove the work in developing standards. More recently, an equally important aspect for establishing standards has been to expand the market opportunities for simulation component suppliers. During the past five years, Workshops on Standards for the Interoperability of Distributed Simulations have provided the forum for establishing standards for networking dissimilar simulations to create virtual worlds in which many subjects can interact. These virtual worlds can be used for training individuals, testing equipment, prototyping products, research and development or any application involving the interaction of groups of people in a common synthetic environment     

A robust and physical BSIM3 non-quasi-static transient and ACsmall-signal model for circuit simulation

A new non-quasi-static (NQS) MOSFET model, which is applicable for both large-signal transient and small-signal ac analysis, has been developed. It employs a physical relaxation time approach to take care of the finite channel charging time to reach equilibrium and the effect of instantaneous channel charge re-distribution. The NQS model is formulated independently from the dc I-V and the charge-capacitor model, thus can be easily applied to any existing simulators. The model has been implemented in the newly released BSIM3 version 3, and comparison has been made among this model, common quasi-static (QS) SPICE models and PISCES two-dimensional (2-D) numerical device simulator. While predicting accurate NQS behavior, the time penalty for using the new model is only about 20-30% more than the common QS models. It is much less than the time required by other NQS models reported. Limitations and compromises between simplicity, efficiency and accuracy are also discussed     

Designing without numbers [computerised circuit design/analysis]

The author describes how computers are taking even more of the drudgery of analysis out of circuit design. This is being achieved by the use of symbolic manipulation. The author describes an example using the Nodal and Mathematical tool to show how the technique of symbolic manipulation is used in circuit design     

Improving functional density using run-time circuit reconfiguration[FPGAs]

The ability to provide flexibility and allow fine-grain circuit specialization make field programmable gate arrays (FPGA's) ideal candidates for computing elements within application-specific architectures. The benefits of gate-level specialization and reconfigurability can be extended by reconfiguring circuit resources at run-time. This technique, termed run-time reconfiguration (RTR), allows the exploitation of dynamic conditions or temporal locality within application-specific problems. For several applications, this technique has been shown to reduce the hardware resources required for computation. The use of this technique on conventional FPGA's, however, requires additional time for circuit reconfiguration. A functional density metric is introduced that balances the advantages of RTR against its associated reconfiguration costs. This metric is used to justify run-time reconfiguration against other more conventional approaches. Several run-time reconfigured applications are presented and analyzed using this approach