Preparation and properties of SiCN diffusion barrier layer for Cu interconnect in ULSI

SiCN thin films and Cu/SiCN/Si structures were fabricated by magnetron sputtering. And some samples underwent the rapid thermal annealing(RTA) processing. The thin-film surface morphology, crystal structure and electronic properties were characterized by atomic force microscopy(AFM), X-ray diffractometry(XRD), Fourier transform infrared transmission(FTIR) and four-point probe(FPP) analyses. The results reveal the formation of complex networks among the three elements, Si, C and N, and the existence of different chemical bonds in the SiCN films, such as Si-C, Si-N, C-N and C=N. The as-deposited SiCN thin films are amorphous in the Cu/SiCN/Si structures and have good thermal stability, and the SiCN thin films are still able to prevent the diffusion reaction between Cu and Si interface after RTA processing at 600 ℃ for 5 min.     

Characterization of NiCo composite silicides by 10 nm-Ni50Co50 alloy films with additional annealing

We fabricated 10 nm-Ni₅₀Co₅₀ alloy films into a single crystal and a polycrystalline silicon substrate, and applied silicidation annealing to these substrates at 600 °C to 1100 °C for 40 s. To test the thermal stability of the processed silicide layers, we examined the change in their physical properties after an additional 30-min annealing at the given rapid thermal annealing (RTA) temperatures. To characterize the physical properties of the silicide layers, we used a four-point probe, an x-ray diffractometer (XRD), a transmission electron microscope, a scanning electron microscope, an Auger electron spectroscope, and an atomic force microscope. The silicide layer formed only through RTA showed low resistance (20 Ω/sq) at up to 1100 °C and 900 °C for the single crystal and for the polycrystalline silicon substrate, respectively. Sheet resistance after the additional 30-min annealing was low, and did not differ significantly before and after the additional annealing for the single crystal substrate, but it became high at all temperatures for the polycrystalline substrate. The XRD confirmed the formation of the NiSi (or Ni(Co)Si) phase, in which there were no changes after the additional annealing. The thickness of the RTA-formed silicide layers varied from 11 nm to 13 nm, 20 nm and 28 nm, depending on whether the temperature was 700 °C or 1000 °C, for both the single and the polycrystalline substrates. The thickness of the silicide layers tended to increase from 22 nm to 25 nm, 48 nm and 82 nm after the additional 30-min annealing. Auger depth profiling also confirmed changes in thickness with the additional annealing. The surface roughness was no greater than 10 nm in all cases, even with the additional annealing. We verified that the nano-silicide layer formed with the proposed nano-NiCo alloy films satisfied the requirements for the nano-CMOS process.     

Microstructure evolution of the Ir-inserted Ni silicides with additional annealing

Thermally-evaporated 10 nm-Ni/1 nm-Ir/(poly)Si structures were fabricated in order to investigate the thermal stability of Ir-inserted nickel silicide after additional annealing. The silicide samples underwent rapid thermal annealing at 300 ° C to 1200 ° C for 40 s, followed by 30 min annealing at the given RTA temperatures. Silicides suitable for the salicide process were formed on the top of the single crystal and polycrystalline silicon substrates, mimicking actives and gates. The sheet resistance was measured using a four-point probe. High resolution x-ray diffraction and Auger depth profiling were used for phase and chemical composition analysis, respectively. Transmission electron microscope and scanning probe microscope were used to determine the cross-section structure and surface roughness. The silicide, which formed on single crystal silicon substrate with surface agglomeration after additional annealing, could defer the transformation of Ni(Ir)Si to Ni(Ir)Si2 and was stable at temperatures up to 1200 °C. Moreover, the silicide thickness doubled. There were no outstanding changes in the silicide thickness on polycrystalline silicon. However, after additional annealing, the silicon-silicide mixing became serious and showed high resistance at temperatures >700 °C. Auger depth profiling confirmed the increased thickness of the silicide layers after additional annealing without a change in composition. For a single crystal silicon substrate, the sheet resistance increased slightly due to the significant increases in surface roughness caused by surface agglomeration after additional annealing. Otherwise, there were almost no changes in surface roughness on the polycrystalline silicon substrate. The Ir-inserted nickel monosilicide was able to maintain a low resistance in a wide temperature range and is considered suitable for the nano-thick silicide process.     

Evolution of structural, surfacial and mechanical properties of titanium-nickel-copper thin films during rapid thermal annealing

The structural, surfacial and nanoscale mechanical properties evolution of Ti-Ni-Cu thin films, prepared by the co-sputtering of TiNi and Cu targets during rapid thermal annealing (RTA) were investigated. Crystallization took place in a few seconds at 480 °C. With increasing annealing time (up to 180 s), roughness increased dramatically, and was far more prominent than in films crystallized by conventional thermal annealing (CTA). Although RTA is energy efficient due to the lower annealing time, the film roughness is less ideal than CTA, which may prove limiting in specific applications. The surface and subsurface chemical states of Ti, Ni and Cu was similar for RTA and CTA processed materials, demonstrating they are exposed to comparable redox potentials during annealing. Using X-ray absorption spectroscopy (XAS), it was found that the RTA (180 s) and CTA (1 h) films possessed longer range order. The evolution of nanoscale mechanical properties of the RTA films during rapid thermal annealing was also studied.     

Fabrication and diffusion barrier properties of nanoscale Ta/Ta-N bi-layer

One of the most important processes in Cu metallization for ultra large scale integrated circuits (ULSI) is to fabricate better diffusion barrier. In this paper, Ta/Ta-N films were fabricated by dc magnetron reactive sputtering (DCMS) in N₂/Ar ambient, then Cu/Ta/Ta-N/Si multi-structures were prepared in suite. The thin-film samples were rapid thermal annealed (RTA) at variational temperatures in N₂ ambient. Alpha-Step IQ Profiler, four-point probe (FPP) sheet resistance measurer, atomic force microscope (AFM), scanning electron microscope (SEM), X-ray diffraction (XRD) and tape test were used to characterize the microstructure and diffusion properties of the thin-films. The results show that the nanoscale Ta/Ta-N thin-films have smooth surface, and the thermal stability and barrier performance are good. After 600 °C/300 s RTA, Ta (40 nm)/Ta-N (60 nm) thin-films can effectively block against Cu diffusion and keep good adhesion strength with Cu films. After higher temperature RTA process, Cu atoms penetrated through the barrier and reacted with silicon, the barrier fail.     

Effects of la concentration on the texturing and the electrical properties of sol-gel derived PLT thin films

Lanthanum doped lead titanate (PLT) thin films consisting of different La concentrations were fabricated on Pt/Ti/SiO₂/Si using sol-gel method. The films were dried at 440°C for 5 min and fired at 600°C using rapid thermal annealing (RTA) for 1min. The preferred orientation (texturing) and the morphology of the PLT film were changed with La concentration and a possible cause of the texturing has been discussed. The effects of La doping to the Lead titanate films on the dielectric constants, P-E hysteresis loop and pyroelectric coefficient were measured and discussed.     

Influence of synthesis conditions on optical and electrical properties of CaTiO3:Pr3+ thin films deposited by radiofrequency sputtering for electroluminescent device

CaTiO₃:Pr³⁺ is a phosphor of great interest for electroluminescence application owing to its intense red emission characterized by CIE coordinates very close to those of the NSTC “ideal red”. In this paper, thin films of CaTiO₃:Pr³⁺ are deposited by radiofrequency sputtering technique in pure argon and post-treated by Rapid Thermal Annealing (RTA). The influence of the deposition pressure (0.125–4.5 Pa) and annealing conditions on the optical and electrical properties of the thin films is investigated. The chemical composition of the as-deposited films, checked by Rutherford Backscattering Spectroscopy (RBS), is close to that of the ceramic target used for the deposition. The crystal structure is confirmed to be orthorhombic by X-ray diffraction. We highlight an improvement of the optical and electrical properties of the films after RTA treatment. Moreover, a net gain is obtained by comparison with conventional thermal treatment procedures in classical furnaces, especially for the reduction of electrical defect densities.     

Effect of sputtering pressure and rapid thermal annealing on optical properties of Ta2O5 thin films

Ta2O5 thin films were deposited by DC reactive magnetron sputtering followed by rapid thermal annealing(RTA). Influence of sputtering pressure and annealing temperature on surface characteristics, microstructure and optical property of Ta2O5 thin films were investigated. As-deposited Ta2O5 thin films are amorphous. It takes hexagonal structure (δ-Ta2O5) after being annealed at 800 ℃. A transition from δ-Ta2O5 to orthorhombic structure (L-Ta2O5) occurs at 900-1 000 ℃. Surface roughness is decreased after annealing at low temperature. Refractive index and extinction coefficient are decreased when annealing temperature is increased.     

Effect of elevated-temperature annealing on microstructureand properties of Cu−0.15Zr alloy

Cu−0.15Zr (wt.%) alloy with uniform and fine microstructure was fabricated by rapid solidification followed by hot forging. Evolution of microstructure, mechanical properties and electrical conductivity of the alloy during elevated-temperature annealing were investigated. The alloy exhibits good thermal stability, and its strength decreases slightly even after annealing at 700 °C for 2 h. The nano-sized Cu₅Zr precipitates show significant pinning effect on dislocation moving, which is the main reason for the high strength of the alloy. Additionally, the large-size Cu₅Zr precipitates play a major role in retarding grain growth by pinning the grain boundaries during annealing. After annealing at 700 °C for 2 h, the electrical conductivity of samples reaches the peak value of 88% (IACS), which is attributed to the decrease of vacancy defects, dislocations, grain boundaries and Zr solutes.     

不同退火工艺Pt电极上沉积溶胶凝胶Pb(Zr,Ti)O_3薄膜的织构演化(英文)

利用溶胶凝胶工艺在Pt电极上沉积了PZT薄膜,选用传统退火及其快速退火工艺制备两种Pt基底(CTA-Pt和RTA-Pt),并采用X射线衍射广角及其ù扫描技术分别研究了Pt电极退火工艺对溶胶凝胶PZT结构及其织构演化的影响.研究结果显示:在传统退火工艺制备Pt电极上沉积的薄膜为(111)择优取向,而在快速退火工艺制备Pt电极上沉积的薄膜表现为(100)织构;分析表明PZT薄膜的织构演化可能与Pt电极在不同退火工艺下的内应力差异有关.     

Microstructural Analysis and Transport Properties of Thermally Sprayed Multiple-Layer Ceramic Coatings

Multilayer, graded ceramic/metal coatings were prepared by an air plasma spray method on Ti-6Al-4V, 4140 steel and graphite substrates. The coatings were designed to provide thermal barriers for diesel engine pistons to operate at higher temperatures with improved thermal efficiency and cleaner emissions. A systematic, progressive variation in the mixture of yttria-stabilized zirconia and bondcoat alloys (NiCoCrAlYHfSi) was designed to provide better thermal expansion match with the substrate and to improve thermal shock resistance and cycle life. Heat transfer through the layers was evaluated by a flash diffusivity technique based on a model of one-dimensional heat flow. The aging effect of the as-sprayed coatings was captured during diffusivity measurements, which included one heating and cooling cycle. The hysteresis of thermal diffusivity due to aging was not observed after 100-h annealing at 800 °C. The measurements of coatings on substrate and freestanding coatings allowed the influence of interface resistance to be evaluated. The microstructure of the multilayer coating was examined using scanning electron microscope and electron probe microanalysis.     

退火对栅介质SrHfON薄膜性能的影响

采用射频磁控溅射法在Si衬底上制备新型栅介质SrHfON薄膜。采用X射线衍射(XRD)仪、高分辨透射电镜(HRTEM)和X射线光电子谱(XPS)分析退火对SrHfON薄膜的界面形态、薄膜的结构和电学性能的影响。结果表明,SrHfON薄膜经900℃退火后仍保持非晶态,表现出良好的热稳定性。SrHfON薄膜与Si衬底的界面主要由HfSixOy和SiO2组成。以SrHfON薄膜为栅介质的MOS电容结构具有较小的漏电流密度,并且漏电流密度随着退火温度的升高而减小。在外加偏压(Vg)为+1V时样品在沉积态和900℃退火后的漏电流密度分别为4.3×10-6和1.2×10-7A/cm2。研究表明,SrHfON薄膜是一种很有希望替代SiO2的新型栅介质材料。     

Investigation of annealing effects on microstructure of hybrid nanocrystal–polymer solar cells by impedance spectroscopy

We have fabricated hybrid bulk heterojunction solar cells with blends of MEH-PPV (poly[2-methoxy,5-(2-ethylhexoxy)-1,4-phenylene vinylene]) and nano-CdS as electron donor and electron acceptor, respectively. The effect of thermal annealing was investigated with impedance spectroscopy (IS) and capacitance–voltage (C–V) characteristic measurements on devices. The IS and C–V characteristic manifested very different before and after thermal annealing. We performed equivalent circuit to explain the effect of thermal annealing. The thermal treatment of nanocrystal–polymer films is seen to aid in the formation of a continuous network for electron transport between nanorods, and hence improves devices performance. The method based on the IS is available to probe the microstructure of hybrid bulk heterojunction solar cells before and after thermal annealing, and therefore detect the mechanism for the annealing improvements.     

Investigation of electrical conductivity in Schottky-barrier devices based on nickel phthalocyanine thin films

Evaporated multilayer sandwich structure of Au/NiPc/Al was fabricated by thermal evaporation technique. The electrical conductivity of Au/NiPc/Al device has been measured both as prepared and after annealing at 623 K for 2 h. Under forward bias conditions, ohmic and SCLC conductions were identified at low and higher voltages respectively. After annealing, a strong rectifying effect was observed. The potential barrier height and the depletion region width for annealed sample were calculated as 0.96 eV and 70 nm, respectively. Hole and trap parameters for as prepared and after annealing devices, also, were evaluated.     

利用可控In气氛下热处理工艺制备Cd0．9Zn0．1Te：In

利用控制In气氛下的热处理工艺成功地制备了CdZnTe：In。不同In压下（Cd，Zn分压保持在平衡分压）的热处理实验结果表明：热处理后样品的电阻率可从6．75×10^5Ω·cm提高到10^8～10^1010Ω·cm；并且随着In压的增加，导电类型逐渐由p型转变为n型。热处理后样品的电阻率变化特征可以由In的扩散和施主缺陷InCd、受主缺陷VCd之间的补偿作用来很好地解释。利用扩散理论建立了CdZnTe：In的电阻率物理模型。利用热处理后样品的电阻率数据，计算了在873，973和1073K时In原子在CZT晶体中的有效扩散系数DIn，分别为3．455×10^-11，2．625×10^-10和5．17×10^-9cm^2／s。将扩散数据经过拟合后得到了DIn的表达式：1．35exp（-1．85eV／kT）cm^2／s（873～1073K）。     

Rapid thermal processing for silicon nanoelectronics applications

Single-wafer rapid thermal processing, which has become indispensable in the present-day manufacture of integrated circuits, has replaced batch furnace processing to satisfy device and production requirements for reduced thermal budget, process uniformity, high throughput, ease of process development, and low manufacturing cost. To meet the requirements for critical applications, rapid thermal annealing (RTA) techniques have been developed. For example, RTA is used to form ultrashallow junctions in complementarymetal-oxide semiconductor transistors with 10-nm-scale gate lengths. This paper discusses approaches to realize the needed rapidity and uniformity in RTA processes, some of which combine radiative, convective, and conductive heat transfer, to control the rapid thermal cycling of silicon wafers for various processes requiring peak temperatures in the range of 200°C to 1,350°C. A.T. Fiory is with the Department of Physics at the New Jersey Institute of Technology in Newark, New Jersey.     

Dielectric properties of Ta<Subscript>2</Subscript>O<Subscript>5</Subscript> thin films deposited onto Ti and TiO<Subscript>2</Subscript> layer

The present study describes the dielectric properties of RF sputtered Ta₂O₅ thin films as a function of the buffer layer and annealing condition. The buffer layers were Ti or TiO₂. And the thin film was annealed in various conditions. The X-ray pattern results showed that the phase of the RF sputtered Ta₂O₅ thin films was amorphous and this state was kept stable to RTA (rapid thermal annealing) even at 700°C. Measurements of the electrical and dielectric properties of the reactive sputtered Ta₂O₅ fabricated in two simple metal insulator semiconductor (MIS) structures, (Cu/Ta₂O₅/Ti/Si/Cu and Cu/Ta₂O₅/TiO₂/Si/Cu) indicated that the amorphous Ta₂O₅ grown on Ti possesses a high dielectric constant (30–70) and high leakage current (10⁻¹–10⁻⁴ A/cm²), whereas a relatively low dielectric constant (−10) and low leakage current (−10⁻¹⁰ A/cm²) were observed in the amorphous Ta₂O₅ deposited on the TiO₂ buffer layer. In addition, the leakage current mechanisms of the two amorphous Ta₂O₅ thin films were investigated by plotting the relation of current density (J) vs. applied electric field (E). The Ta₂O₅/Ti film exhibited three dominant conduction mechanism regimes contributed by the Ohmic emission at low electrical field, by the Schottky emission at intermediate field and by the Poole-Frenkel emission at high field. In the case of Ta₂O₅/TiO₂ film, the two conduction mechanisms, the Ohmic and Schottky emissions, governed the leakage current density behavior. The conduction mechanisms at various electric fields applied were related to the diffusion of Ta, Ti and O, followed by the creation of vacancies, in the rapid thermal treated capacitors.     

Direct bonding of silicon paris with heterogeneous insulator using different annealing methods

We prepared SOI (silicon-on-insulator) wafer pairs of 2000 Å-SiO₂/Si(100) and 560 å-Si₃N₄/Si(100) by CFA (Conventional electric Fumace Annealing), RTA (Rapid Thermal Annealing), and FLA (Fast Linear Annealing) at different annealing temperatures for each annealing process. We measured the bonding area and the bonding strength for the respective processes. It was demonstrated that the measured bonding area was close to 100% above 450°C for RTA, and 400°C for CFA. The maximum bond strength of the SiO₂/Si₃N₄ wafer pair was 2344, 2300, and 195 mJ/m² for CFA, FLA, and RTA, respectively. We clearly demonstrated that the FLA method is far superior in producing high-quality directly bonded Si wafer pairs with SiO₂ and Si₃N₄films compared to the CFA and RTA methods.     

Self-Ordered Nanoporous Alumina Templates Formed by Anodization of Aluminum in Oxalic Acid

Anodic aluminum oxide (AAO) membranes with highly ordered nanopores serve as ideal templates for the formation of various nanostructured materials. The procedure of the template preparation is based on a two-step self-organized anodization of aluminum. In the current study, AAO templates were fabricated in 0.3?M oxalic acid under the anodizing potential range of 30?C60?V at an electrolyte temperature of ~5°C. The AAO templates were analyzed using scanning electron microscopy, x-ray diffraction, Fourier-transform infrared spectroscopy, and differential thermal analysis. The as obtained layers are amorphous; the mean pore size is between 40?nm and 75?nm and increases with the increase of the anodization potential. Well-defined pores across the whole aluminum template, a pore density of ~10¹⁰?pores/cm², and a tendency to form a porous structure with hexagonal symmetry were observed.     

High temperature reliability evaluation of CoSb3/electrode thermoelectric joints

The CoSb₃/electrode thermoelectric (TE) joints were fabricated with the insertion of Ti foil by spark plasma sintering (SPS). The interfacial microstructure evolution and reliability of joints were investigated during accelerated thermal aging. After thermal aging, a multi-layer structure, which was composed of intermetallic compounds (IMCs), was observed at the CoSb₃/Ti interface. The growth kinetics of IMC layers was studied. The theoretic life of CoSb₃/electrode joints was predicted using the growth rate of IMC layers. The shear strength of aged CoSb₃/electrode joints was also tested and the results showed the joints had sufficient strength for keeping the reliability of TE device. Scanning electron microscopy (SEM) showed that, in the aged sample, all fracture occurred inside of the IMC layers, while the fracture occurred in the Ti layer or Ti/TiSb interface in the un-aged sample. The results of four-probe tests showed that the electrical contact of CoSb₃/electrode joint was good.