Design of 20-44 GHz broadband doubler MMIC

This paper presents the design and performance of a broadband millimeter-wave frequency doubler MMIC using active 0.15μm GaAs PHEMT and operating at output frequencies from 20 to 44 GHz.This chip is composed of a single ended-into differential-out active Balun,balanced FETs in push-push configuration,and a distributed amplifier. The MMIC doubler exhibits more than 4 dB conversion gain with 12 dBm of output power,and the fundamental frequency suppression is typically -20 dBc up to 44 GHz.The MMIC works at...     

Millimeter wave band ultra wideband transmitter MMIC

This paper presents a new millimeter-wave (MMW) ultra wideband (UWB) transmitter MMIC which has been developed in an OMMIC 0.1 μm GaAs PHEMT foundry process (f_t = 100 GHz) for 22-29 GHz vehicular radar systems. The transmitter is composed of an MMW negative resistance oscillator (NRO), a power amplifier (PA), and two UWB pulse generators (PGs). In order to convert the UWB pulse signal to MMW frequency and reduce the total power consumption, the MMW NRO is driven by one of the UWB pulse generators and the power amplifier is triggered by another UWB pulse generator. The main advantages of this transmitter are: new design, simple architecture, high-precision distance measurements, infinite ON/OFF switch ratio, and low power consumption. The total power consumption of the transmitter MMIC is 218 mW with a peak output power of 5.5 dBm at 27 GHz.     

High Power SiGe X-Band (8～10GHz) Heterojunction Bipolar Transistors and Amplifiers

Limited by increased parasitics and thermal effects as device size increases,current commercial SiGe power HBTs are difficult to operate at X-band (8～12GHz) frequencies with adequate power added efficiencies at high power levels.We find that,by changing the heterostructure and doping profile of SiGe HBTs,their power gain can be significantly improved without resorting to substantial lateral scaling.Furthermore,employing a common-base configuration with a proper doping profile instead of a common-emitter configuration improves the power gain characteristics of SiGe HBTs,thus permitting these devices to be efficiently operated at X-band frequencies.In this paper,we report the results of SiGe power HBTs and MMIC power amplifiers operating at 8～10GHz.At 10GHz,a 22.5dBm (178mW) RF output power with a concurrent gain of 7.32dB is measured at the peak power-added efficiency of 20.0%,and a maximum RF output power of 24.0dBm (250mW) is achieved from a 20 emitter finger SiGe power HBT.The demonstration of a single-stage X-band medium-power linear MMIC power amplifier is also realized at 8GHz.Employing a 10-emitter finger SiGe HBT and on-chip input and output matching passive components,a linear gain of 9.7dB,a maximum output power of 23.4dBm,and peak power added efficiency of 16% are achieved from the power amplifier.The MMIC exhibits very low distortion with 3rd order intermodulation (IM) suppression C/I of -13dBc at an output power of 21.2dBm and over 20dBm 3rd order output intercept point (OIP3).     

A Ka-band 22 dBm GaN amplifier MMIC

A Ka-band GaN amplifier MMIC has been designed in CPW technology,and fabricated with a domestic GaN epitaxial wafer and process.This is,to the best of our knowledge,the first demonstration of domestic Kaband GaN amplifier MMICs.The single stage CPW MMIC utilizes an AlGaN/GaN HEMT with a gate-length of 0.25μm and a gate-width of 2×75μm.Under V_ds=10 V,continuous-wave operating conditions,the amplifier has a 1.5 GHz operating bandwidth.It exhibits a linear gain of 6.3 dB,a maximum output power of 22 dBm and a peak PAE of 9.5%at 26.5 GHz.The output power density of the AlGaN/GaN HEMT in the MMIC reaches 1 W/mm at Ka-band under the condition of V_ds=10 V.     

Design of a low noise distributed amplifier with adjustable gain control in 0.15μm GaAs PHEMT

正A low noise distributed amplifier consisting of 9 gain cells is presented.The chip is fabricated with 0.15-μm GaAs pseudomorphic high electron mobility transistor(PHEMT) technology from Win Semiconductor of Taiwan.A special optional gate bias technique is introduced to allow an adjustable gain control range of 10 dB.A novel cascode structure is adopted to extend the output voltage and bandwidth.The measurement results show that the amplifier gives an average gain of 15 dB with a gain flatness of±1 dB in the 2-20 GHz band.The noise figure is between 2 and 4.1 dB during the band from 2 to 20 GHz.The amplifier also provides 13.8 dBm of output power at a 1 dB gain compression point and 10.5 dBm of input third order intercept point(IIP3),which demonstrates the excellent performance of linearity.The power consumption is 300 mW with a supply of 5 V,and the chip area is 2.36×1.01 mm~2.     

一种针对中国超宽带标准的CMOS PA

A 6–9 GHz ultra-wideband CMOS power amplifier (PA) for the high frequency band of China's UWB standard is proposed. Compared with the conventional band-pass filter wideband input matching methodology, the number of inductors is saved by the resistive feedback complementary amplifying topology presented. The output impendence matching network utilized is very simple but efficient at the cost of only one inductor. The measured S₂₂ far exceeds that of similar work. The PA is designed and fabricated with TSMC 0.18 μ m 1P6M RF CMOS technology. The implemented PA achieves a power gain of 10 dB with a ripple of 0.6 dB, and S₁₁ < –10 dB over 6–9 GHz, S₂₂ < –35 dB over 4–10 GHz. The measured output power at the 1 dB compression point is over 3.5 dBm from 6 to 9 GHz. The PA dissipates a total power of 21 mW from a 1.8 V power supply. The chip size is 1.1 × 0.8 mm².     

An 8-18 GHz broadband high power amplifier

An 8-18 GHz broadband high power amplifier(HPA) with a hybrid integrated circuit(HIC) is designed and fabricated.This HPA is achieved with the use of a 4-fingered micro-strip Lange coupler in a GaAs MMIC process.In order to decrease electromagnetic interference,a multilayer AlN material with good heat dissipation is adopted as the carrier of the power amplifier.When the input power is 25 dBm,the saturated power of the continuous wave(CW) outputted by the power amplifier is more than 39 dBm within the frequency range of 8-13 GHz,while it is more than 38.6 dBm within other frequency ranges.We obtain the peak power output,39.4 dBm,at the frequency of 11.9 GHz.In the whole frequency band,the power-added efficiency is more than 18%.When the input power is 18 dBm,the small signal gain is 15.7±0.7 dB.The dimensions of the HPA are 25×15×1.5 mm~3.     

A 500-600 MHz GaN power amplifier with RC-LC stability network

A 500-600 MHz high-efficiency, high-power GaN power amplifier is designed and realized on the basis of the push-pull structure. The RC-LC stability network is proposed and applied to the power amplifier circuit for the first time. The RC-LC stability network can significantly reduce the high gain out the band, which eliminates the instability of the power amplifier circuit. The developed power amplifier exhibits 58.5 dBm (700 W) output power with a 17 dB gain and 85% PAE at 500-600 MHz, 300 μs, 20% duty cycle. It has the highest PAE in P-band among the products at home and abroad.     

A 75 GHz regenerative dynamic frequency divider with active transformer using InGaAs/InP HBT technology

This letter presents a high speed 2:1 regenerative dynamic frequency divider with an active transformer fabricated in 0.7 μm InP DHBT technology with f_T of 165 GHz and f_max of 230 GHz. The circuit includes a two-stage active transformer, input buffer, divider core and output buffer. The core part of the frequency divider is composed of a double-balanced active mixer (widely known as the Gilbert cell) and a regenerative feedback loop. The active transformer with two stages can contribute to positive gain and greatly improve phase difference. Instead of the passive transformer, the active one occupies a much smaller chip area. The area of the chip is only 469×414 μm² and it entirely consumes a total DC power of only 94.6 mW from a single -4.8 V DC supply. The measured results present that the divider achieves an operating frequency bandwidth from 75 to 80 GHz, and performs a -23 dBm maximum output power at 37.5 GHz with a 0 dBm input signal of 75 GHz.     

A high-efficiency low-voltage class-E PA for IoT applications in sub-1 GHz frequency range

We present and propose a complete and iterative integrated-circuit and electro-magnetic (EM) co-design methodology and procedure for a low-voltage sub-1 GHz class-E PA. The presented class-E PA consists of the on-chip power transistor, the on-chip gate driving circuits, the off-chip tunable LC load network and the off-chip LC ladder low pass filter. The design methodology includes an explicit design equation based circuit components values'' analysis and numerical derivation, output power targeted transistor size and low pass filter design, and power efficiency oriented design optimization. The proposed design procedure includes the power efficiency oriented LC network tuning, the detailed circuit/EM co-simulation plan on integrated circuit level, package level and PCB level to ensure an accurate simulation to measurement match and first pass design success. The proposed PA is targeted to achieve more than 15 dBm output power delivery and 40% power efficiency at 433 MHz frequency band with 1.5 V low voltage supply. The LC load network is designed to be off-chip for the purpose of easy tuning and optimization. The same circuit can be extended to all sub-1 GHz applications with the same tuning and optimization on the load network at different frequencies. The amplifier is implemented in 0.13 μm CMOS technology with a core area occupation of 400 μm by 300 μm. Measurement results showed that it provided power delivery of 16.42 dBm at antenna with efficiency of 40.6%. A harmonics suppression of 44 dBc is achieved, making it suitable for massive deployment of IoT devices.     

一种应用于RFID标签的新型功率放大器设计

A novel matching method between the power amplifier (PA) and antenna of an active or semi-active RFID tag is presented. A PCB dipole antenna is used as the resonance inductor of a differential power amplifier. The total PA chip area is reduced greatly to only 240 × 70 μm² in a 0.18 μm CMOS process due to saving two on-chip integrated inductors. Operating in class AB with a 1.8 V supply voltage and 2.45 GHz input signal, the PA shows a measured output power of 8 dBm at the 1 dB compression point.     

功率为16.9 dBm增益大于20 dB的InP DHBT W波段功率放大器

A two-stage MMIC power amplifier has been realized by use of a l-μm InP double heterojunction bipolar transistor(DHBT).The cascode structure,low-loss matching networks,and low-parasite cell units enhance the power gain.The optimum load impedance is determined from load-pull simulation.A coplanar waveguide transmission line is adopted for its ease of fabrication.The chip size is 1.5×1.7 mm~2 with the emitter area of 16×1μm×15μm in the output stage.Measurements show that small signal gain is more than 20 dB over 75.5-84.5 GHz and the saturated power is 16.9 dBm @ 79 GHz with gain of 15.2 dB.The high power gain makes it very suitable for medium power amplification.     

A Ku band internally matched high power GaN HEMT amplifier with over 30%of PAE

正We report a high power Ku band internally matched power amplifier(IMPA) with high power added efficiency(PAE) using 0.3μm AlGaN/GaN high electron mobility transistors(HEMTs) on 6H-SiC substrate.The internal matching circuit is designed to achieve high power output for the developed devices with a gate width of 4 mm.To improve the bandwidth of the amplifier,a T type pre-matching network is used at the input and output circuits,respectively.After optimization by a three-dimensional electromagnetic(3D-EM) simulator,the amplifier demonstrates a maximum output power of 42.5 dBm(17.8 W),PAE of 30%to 36.4%and linear gain of 7 to 9.3 dB over 13.8-14.3 GHz under a 10%duty cycle pulse condition when operated at V_(ds) = 30 V and V_(gs)=—4 V.At such a power level and PAE,the amplifier exhibits a power density of 4.45 W/mm.     

A 0.02% THD and 80 dB PSRR filterless class D amplifier with direct lithium battery hookup in mobile application

This paper presents a fully integrated CMOS filterless class D amplifier that can directly hook up lithium battery in mobile application The proposed amplifier embodies a 2-order feedback path architecture instead of direct feedback of output to input of the integrator to decrease the high frequency intermodulation distortion associated with direct feedback and eliminate the integrator input common mode disturbance from the output in ternary modulation. The prototype class D amplifier realized in 0.35μm digital technology achieves a THD+N of 0.02% when delivering 400 mW to an 8Ω load from V_DD=3.6 V. The PSRR of the prototype class D amplifier is 80 dB at 217 Hz. Furthermore a filterless method that can eliminate the external LC filter is employed which offers great advantages of saving PCB space and lowering system cost. In addition the prototype class D amplifier can operate in large voltage range with V_DD range from 2.5 to 4.2 V in mobile application. The total area of the amplifier is 1.7 mm².     

A Compact Ka-Band PHEMT MMIC Voltage Controlled Oscillator

A compact Ka-band monolithic microwave integrated circuit(MMIC) voltage controlled oscillator (VCO) with wide tuning range and high output power,which is based on GaAs PHEMT process,is presented.A method is introduced to reduce the chip size and to increase the bandwidth of operation.The procedure to design a MMIC VCO is also described here.The measured oscillating frequency of the MMIC VCO is 36±1.2GHz and the output power is 10±1dBm.The fabricated MMIC chip size is 1.3mm×1.0mm.     

Design, fabrication and characterising of 100 W GaN HEMT for Ku-bandapplication

Ku-band GaN power transistor with output power over 100 W under the pulsed operation mode is presented. A high temperature AlN nucleation together with an Fe doped GaN buffer was introduced for the developed GaN HEMT. The AlGaN/GaN hetero-structure deposited on 3 inch SiC substrate exhibited a 2DEG hall mobility and density of ~2100 cm²/(V·s) and 1.0×10¹³ cm^-2, respectively, at room temperature. Dual field plates were introduced to the designed 0.25 μm GaN HEMT and the source connected field plate was optimized for minimizing the peak field plate near the drain side of the gate, while maintaining excellent power gain performance for Ku-band application. The load-pull measurement at 14 GHz showed a power density of 5.2 W/mm for the fabricated 400 μm gate periphery GaN HEMT operated at a drain bias of 28 V. A Ku-band internally matched GaN power transistor was developed with two 10.8 mm gate periphery GaN HEMT chips combined. The GaN power transistor exhibited an output power of 102 W at 13.3 GHz and 32 V operating voltage under pulsed operation mode with a pulse width of 100 μs and duty cycle of 10%. The associated power gain and power added efficiency were 9.2 dB and 48%, respectively. To the best of the authors'' knowledge, the PAE is the highest for Ku-band GaN power transistor with over 100 W output power.     

Optimized power simulation of AlGaN/GaN HEMT for continuous wave and pulse applications

An optimized modeling method of 8 × 100 μm AlGaN/GaN-based high electron mobility transistor (HEMT) for accurate continuous wave (CW) and pulsed power simulations is proposed. Since the self-heating effect can occur during the continuous operation, the power gain from the continuous operation significantly decreases when compared to a pulsed power operation. This paper extracts power performances of different device models from different quiescent biases of pulsed current-voltage (I-V) measurements and compared them in order to determine the most suitable device model for CW and pulse RF microwave power amplifier design. The simulated output power and gain results of the models at V_gs = -3.5 V, V_ds = 30 V with a frequency of 9.6 GHz are presented.     

A highly linear power amplifier for WLAN

A three-stage power amplifier (PA) for WLAN application in 2.4-2.5 GHz is presented. The proposed PA employs an adaptive bias circuit to adjust the operating point of the PA to improve the linearity of the PA. Two methods to short the 2nd harmonic circuit are compared in the area of efficiency and gain of the PA. The PA is taped out in the process of 2 μm InGaP/GaAs HBT and is tested by the evaluation board. The measured results show that 31.5 dB power gain and 29.3 dBm P_1dB with an associated 40.4% power added efficiency (PAE) under the single tone stimulus. Up to 26.5 dBm output power can be achieved with an error vector magnitude (EVM) of lower than 3% under the 64QAM/OFDM WLAN stimulus.     

X 波段氮化镓合成固态放大器

Based on a self-developed A1GaN/GaN HEMT with 2.5 mm gate width technology on a SiC substrate, an X-band GaN combined solid-state power amplifier module is fabricated. The module consists of an AIGaN/GaN HEMT, Wilkinson power couplers, DC-bias circuit and microstrip line. For each amplifier, we use a bipolar DC power source. Special RC networks at the input and output and a resistor between the DC power source and the gate of the transistor at the input are used for cancellation of self-oscillation and crosstalk of low-frequency of each amplifier. At the same time, branches of length 3λ/4 for Wilkinson power couplers are designed for the elimination of self-oscillation of the two amplifiers. Microstrip stub lines are used for input matching and output matching. Under Vds = 27 V, Vgs = -4.0 V, CW operating conditions at 8 GHz, the amplifier module exhibits a line gain of 5.6 dB with power added efficiency of 23.4%, and output power of 41.46 dBm （14 W）, and the power gain compression is 3 dB. Between 8 and 8.5 GHz, the variation of output power is less than 1.5 dB.     

CMOS high linearity PA driver with an on-chip transformer for W-CDMA application

A fully integrated high linearity differential power amplifier driver with an on-chip transformer in a standard 0.13-μm CMOS process for W-CDMA application is presented.The transformer not only accomplishes output impedance matching,but also acts as a balun for converting differential signals to single-ended ones.Under a supply voltage of 3.3 V,the measured maximum power is larger than 17 dBm with a peak power efficiency of 21%.The output power at the 1-dB compression point and the power gain are 12.7 dBm and 13.2 dB,respectively. The die size is 0.91×1.12 mm~2.