A field-effect transistor with a negative differential resistance

We report the effect of negative differential resistance (NDR) in the drain circuit of a new type of selectively doped AlGaAs/ GaAs heterojunction transistor. The key new element of our structure is the presence of a subsidiary GaAs conducting layer, separated from the FET channel by an AlGaAs graded barrier. In this work the subsidiary layer is realized by the conducting substrate. The NDR effect arises due to the heating of channel electrons by the source-to-drain field, and the subsequent charge injection over the barrier. This effect is strongly influenced by the gate and substrate voltages. In a floating-substrate arrangement the current-voltage characteristics exhibit memory effects associated with retention of injected charge in the substrate. In this mode, the NDR is seen only at low temperatures with the peak-to-valley ratios in current at 77 K reaching values as high as 30. On the other hand, when the substrate is biased positively, the NDR results from a peculiar effect of dynamical channel depletion by the injected space charge which drifts on the downhill slope of the graded barrier. In this case, the NDR is observed even at room temperature.     

The accumulation-mode field-effect transistor: a new ultralowon-resistance MOSFET

An ultralow specific on-resistance, vertical channel, power MOSFET structure, based on current conduction via an accumulation layer formed on the surface of a trench (UMOS) gate structure, is described. Two-dimensional numerical simulations and experimental results have been obtained, demonstrating that a specific on-resistance approaching 100 μΩ-cm² can be obtained for a silicon device capable of blocking 25 V     

The cylindrical field-effect transistor

The characteristics of a cylindrical field-effect transistor are derived analytically on the basis of Shockley's theory of the planar field-effect transistor. It is found that the cylindrical device is capable of giving twice the (voltage) amplification factor of that of the planar device. Its frequency behavior should be comparable to that of the Shockley unit. Because of the loss of one degree of freedom, the transconductance and power characteristics of the cylindrical field-effect transistor are sharply limited. Experimental data support the analytical results.     

Gridistor—A new field-effect device

This article concerns a new category of field effect transistors currently being developed which are derived from the Tecnetron (known as the Fieldtron in the U.S.A.) and which use the principal of centripetal striction and have a multichannel structure. By this development it is intended that the advantages of bipolar and field effect transistors be combined insofar as this is possible. In the theoretical part of the article the peculiarities of centripetal striction are discussed. It is shown that since the multichannel structure of the Gridistor removes the limitations arising from the restriction on the degrees of freedom, it eliminates the disadvantages of centripetal striction while retaining its advantages. The various geometries of the Gridistor and the techniques for realizing them are then described with particular attention to their remarkable suitability for integrated circuits. The results obtained are then given briefly and prospects for the future are outlined.     

j-MOS: A versatile power field-effect transistor

A novel field-effect transistor (FET) structure that is attractive for power control applications is proposed and demonstrated. It combines MOSFET structural features and junction FET function in a simple, self-aligned structure that we refer to as j-MOS. Lateral j-MOS transistors were fabricated in silicon-on-sapphire (SOS) with on-resistance as low as 2.5 Ω in 1 cm of channel width. From this result, we project that a vertical version of j-MOS can be fabricated in silicon-on-buried insulator (SOI) with a specific on-resistance ≤ 1 m Ω.cm², approximately a factor of two improvement over current power FET technology.     

The insulated gate transistor: A new three-terminal MOS-controlled bipolar power device

A new three-terminal power device, called the insulated gate transistor (IGT), with voltage-controlled output characteristics is described. In this device, the best features of the existing families of bipolar devices and power MOSFET's are combined to achieve optimal device characteristics for low-frequency power-control applications. Devices with 600-V blocking capability fabricated using a vertical DMOS process exhibit 20 times the conduction current density of an equivalent power MOSFET and five times that of an equivalent bipolar transistor operating at a current gain of 10. Typical gate turn-off times have been measured to range from 10 to 50 µs.     

A semi-insulated gate gallium-arsenide field-effect transistor

Proton bombardment has been used to make a semi-insulated gate gallium-arsenide field-effect transistor. This technique combines the simplicity of the metal semiconductor FET technique, the advantage of operating the device using positive as well as negative bias on the gate, and the possible use of higher conductivity material for the channel, which may result in a higher transconductance and a higher saturated current density.     

The field-effect modified transistor: a high-responsivity photosensor

A new photosensing device that can be described as a field-effect modified bipolar transistor, has been developed. A novel technique of reducing the effective collector capacitance without reducing the total primary photocurrent provides for a decade improvement in responsivity for the FEM phototransistor operating in the charge-storage mode. Other applications of this device include a high noise-immunity inverter, a light intensity-to-frequency converter, and a simple semiconductor memory element. FEM transistors can be fabricated using the same processing schedule used for conventional bipolar transistors; no additional steps are required.     

The NEGIT: A surface-controlled negative impedance transistor

A Negative impedance transistor (NEGIT) is realized by controlling base surface recombination in a bipolar transistor by biasing a gate on the oxide over the emitter-base junction. This gate is attached to the collector by conventional metallization. As VCEincreases, the active region is robbed of base current causing ICto decrease. It is shown theoretically, and confirmed experimentally, that both the magnitude of the effect and the voltage range over which the negative resistance occurs, depend strongly on base oxide thickness and base surface doping, and are dominated by the base surface immediately adjacent to the emitter-base junction. Thus very small area devices are possible in both discrete and IC versions, for either high or low voltage operation, with only minor changes in existing technology. Although only sample applications are shown, and frequencies employed only up to 11 MHz, a wide variety of applications are possible.     

A new ferroelectric memory device, metal-ferroelectric-semiconductor transistor

The ferroelectric field effect has successfully been demonstrated on a bulk semiconductor (silicon) using a thin ferroelectric film of bismuth titanate (Bi4Ti3O12) deposited onto it by RF sputtering. A new memory device, the metal-ferroelectric-semiconductor transistor (MFST); has been fabricated. This device utilizes the remanent polarization of a ferroeletric thin film to control the surface conductivity of a bulk semiconductor substrate and perform a memory function. The capacitance-voltage characteristics of the metal-ferroelectric-semiconductor structure were employed to study the memory behavior. The details of the study together with a preliminary results on the MFST are presented.     

A semianalytical model of a nanowire-based field-effect transistor

A semianalytical model of a field-effect ballistic nanotransistor with a nanowire-based or nano- tube-based channel, which is applicable to describe transistors with various gate configurations, is proposed. Based on this model, the calculations of the distribution of the potential and electron concentration in a transistor channel are determined and its current-voltage characteristics are plotted. Considerable distinctions regarding the computation of short-channel transistors based on the local model and good agreement with the computations performed according to the rigorous models are revealed.     

Modulating transistor: a new class of semiconductor device

A new negative resistance transistor n+-p-p?-p structure, consisting of four layers with three electrodes, is reported. The negative resistance effect is due to bulk conductivity modulation. Common emitter, common collector and common base characteristics are described.     

A generalized theory of an electrolyte-insulator-semiconductor field-effect transistor

A model of surface ionization and complexation of surface hydroxyl groups on the gate insulator surface is adapted in conjunction with electronic device physics to arrive at a generalized theory for the current-voltage characteristics of an electrolyte-insulator-semiconductor field-effect transistor (EISFET) in electrolyte solutions. EISFET's that employ thermally grown silicon dioxide were tested in simple electrolytes that contain Na⁺, K⁺, and Li⁺ions titrated in apH range from 2 to 9. Experimental results show good agreement with the theory. The model successfully explainspH sensitivity, as well as the ion interference effect, of the EISFET working as apH sensor. From this model, it is conluded that, among all the electrolyte parameters associated with an EISFET, the surface site density of the hydroxyl groups Nsand the separation of surface ionization constantsDelta pKare the primary factors to consider when employing EISFET's aspH sensors. For high sensitivity and good selectivity, large Nsand smallDelta pKvalues are required.     

The n-channel SiGe/Si modulation-doped field-effect transistor

At the heterointerface of Si1-xGex/Si the existence of two-dimensional carrier gas has recently been demonstrated. The electrons are confined inside the large-gap material Si. We report the first fabrication of n-channel modulation-doped SiGe/Si hetero field-effect transistors by use of molecular-beam epitaxial growth. Though neither layer sequence nor parasitic resistances were optimized, these first transistors exhibit an extrinsic transconductance of 40 mS/mm for a gate length of 1.6 µm. This value is higher than that of conventional Si MESFET's of comparable carrier concentration. Technological processing steps and device evaluation are described.     

A two-dimensional mathematical model of the insulated-gate field-effect transistor

This paper is concerned with the mathematical details of a numerical model of the insulated-gate field-effect transistor; a computer-aided analysis of the device, based on this model, appears separately. A finite-difference scheme is presented for obtaining an approximate solution of a system of nonlinear elliptic partial differential equations describing the carrier distribution in such a device model. In particular, our scheme allows the device current, as a function of the applied bias voltages, to be reliably calculated. The results of numerical experiments appraising the accuracy of the method are also included.     

A time-dependent numerical model of the insulated-gate field-effect transistor

A new method is described for computing the flow of mobile carriers in a semiconductor device, in two space dimensions plus time. In this method, each variable is updated separately, and in each step only linear systems of equations are solved. The method is stable, independently of the time step. Various current components are resolved by stream functions, and current balance is maintained.A sample computation is included, involving the switching off of an n-channel IGFET.