Schottky barrier heights on IV-IV compound semiconductors

The variations of Schottky barrier heights on Si_1-x-y Ge_xC_y films with composition and strain have been investigated and compared to those expected for the band gap energy. The barrier on n-type does not depend on composition and strain. This independence suggests that the Fermi level at the interface between tungsten and Si_1-x-yGe_xC_y alloys (x≠0) is pinned relative to the conduction-band. For Si_1-xGe_x the barrier on p-type follows the same trends as the band gap. For the ternary alloys, the variations of the barrier on p-type seem to be too large to be only due to a variation of the band-gap. In addition, we have investigated the influence of the deposition conditions of the sputtered-W-gate on the barrier to silicon and Si_1-xGe_x. Our results show that the barrier on n-type-Si and p-type-Si_1-xGe_x-films increases when the stress retained in the W-films changes from compressive to tensile as the deposition pressure increases. The absence of change in the barrier height of W to p-type-silicon and n-type-Sij xGex-films suggests that the Fermi level at the interface with Si is pinned relative to the valence-band while it is pinned relative to the conduction when Ge is added.     

平面肖特基二极管的制作

为研究制作THz频段下工作的肖特基二极管器件,系统研究了平面肖特基二极管的制作工艺。通过分子束外延(MBE)生长了掺杂浓度分别为5×1018 cm-3的缓冲层和2×1017 cm-3的外延层,并研究温度对厚度的影响,使得膜层厚度控制良好,晶格完整。通过参数控制,减小了等离子体增强化学气相沉积(PECVD)的SiO2钝化层应力,使压指结构的翘曲情况得以改善。研究了不同退火温度下欧姆接触的情况,使接触电阻率减小到0.8×10-7 ?/cm2。用电子束光刻和干法刻蚀制作了亚微米级的阳极区域,结合GaAs湿法刻蚀的速率控制,完成了表面沟道的制作,制作出完整的平面肖特基二极管。通过I-U曲线理论计算,二极管的截止频率达到太赫兹量级,为后续工作奠定了基础。     

Enhancement of effective barrier height in Ti-silicon Schottky diode using low-energy ion implantation

Increasing the effective barrier height in a Ti-p-type silicon Schottky diode has been achieved by means of low-energy ion implantation to introduce a thin inversion layer on silicon substrate. It is shown theoretically that effective barrier height equal to the energy bandgap can be obtained in such structure if the thickness and dopant density of the implanted layer are properly chosen. Experimental results for several titanium (Ti) on phosphorus implanted p-type silicon Schottky diodes show that effective barrier heights were increased from 0.6 eV for the Ti-p Si Schottky diode to 0.96 eV for a Ti-n-p-Si Schottky diode with a phosphorus-implanted layer thickness of 400 Å and dose of 1.26 × 10¹²cm^-2. Good agreement is obtained between the calculated and the measured barrier height for several Ti-n-p silicon Schottky diodes.     

Metal/n-GaP Schottky barrier heights

A systematic study, which aims to extend the existing metal/n-Gap Schottky barrier height data, is made. Schottky diodes of various barriers, which included Pt/n-GaP, Au/n-GaP, Ni/n-GaP, Mo/n-Gap, Al/n-GaP, Cr/n-GaP, Ag/n-GaP and Cu/n-GaP, were fabricated and their I-V and C-V characteristics were measured. The derived barrier height values for Au, Cr, and Cu agree with the existing data. The derived I-V and C-V barrier height data on Ni, Mo and Ag extend the present barrier height data for n-type GaP. The C-V barrier height values are plotted vs work function of metals and a straight line relationship is obtained.     

Schottky barrier heights of contact metals to p-type ZnSe

Schottky barrier heights (SBHs) of a variety of metals (In, Cd, Nb, Ti, W, Cu, Ag, Au, Ni, Pt, and Se) contacting to p-ZnSe grown by a molecular beam epitaxy method were determined by analyzing capacitance-voltage (C-V) and/or current density-voltage (J-V) curves. The SBH values of the Au and Ni contacts were determined from intersections of straight lines of the C⁻²-V curves to be 1.23 and 1.13 eV, respectively. The J-V calculations provided a large SBH value of 1.2 ± 0.1 eV for a variety of metals, indicating that the Fermi-level could be pinned at the contact interface. Reduction of the SBH values to a level lower than 0.4 eV and/or increase of doping concentrations to a level higher than 10²⁰ cm⁻³ are essential to obtain an ohmic contact with contact resistivity of around 10⁻³ Ω·cm².     

Temperature behaviour and compensation of Schottky barrier diode

This paper offers a fresh look into the temperature behaviour and compensation of Schottky barrier diode's radio frequency (RF) resistance. RF resistance of a Schottky diode varies with temperature at conventional fixed current bias as well as fixed voltage bias condition. Here we have proposed “optimum load-line biasing technique” to achieve temperature invariant RF performance of the Schottky diode based RF circuits. Mathematically we have shown and verified by measurements that the proposed technique provides temperature insensitive RF performance over a very wide range of operating temperature. Thus, without any separate temperature sensor and compensation circuits, as used in conventional temperature-compensation schemes, it is possible to achieve temperature invariant RF performance of the Schottky diode based RF circuits.     

Theory of Schottky barrier heights of amorphous MIS solar cells

The Schottky barrier height φ_m of amorphous MIS solar cells depends greatly on the density of surface states D_s, and on the density of localized states near the Fermi level. At low density of gap states, the φ_m is maximum for D_s being around 10¹⁸ m^?2 eV^?1. With an illumination of light, the barrier height decreases as the collection of minority carriers near the interface increases.     

A novel Schottky diode with controlled barrier height

InxGa1-xAs Schottky diodes are fabricated, and the current sensitivity and conversion loss are measured. Although the present result is preliminary, it supports the previous theoretical prediction of the optimization of the Schottky barrier height (φ = 0.3 V).     

p-n junction—Schottky barrier hybrid diode

A new fabrication technique for passivated silicon Schottky barrier diodes is described. It is shown that the p-n junction guard ring or "hybrid" approach produces Schottky barriers whose forward and reverse electrical characteristics are in excellent agreement with simple theory, and that the excess noise normally found in passivated Schottky barrier diodes has been significantly reduced. The influence of metal barrier height and diffusion profile on the charge storage characteristics of these devices is discussed and examined experimentally.     

A composite model for Schottky diode barrier height

A composite model, which includes both electrostatic screening and an interfacial region, is developed for Schottky diode barrier height. The model is used to calculate barrier height as a function of donor concentration for a gold-on-silicon diode structure. The results show that the influence of electrostatic screening on the barrier height is small and that the barrier height decreases rapidly for donor concentrations greater than 10¹⁷cm^-3.     

Electrical characteristics of an epitaxial high barrier Schottky diode

A Schottky barrier diode with high barrier height injects minority carriers at the forward biased condition. With injection of minority carriers the current density–voltage characteristics are altered significantly from that of the conventional exponential relationship. A model incorporating drift and diffusion currents for both holes and electrons, carrier recombination within the drift region and also the blocking properties of the low–high (n^- n⁺) interface is developed. The previous works on high barrier Schottky diodes used empirical expressions to combine the high injection model with the low injection model in order to study its behaviour at intermediate levels of injection. Whereas in the present work, a boundary condition is applied to combine the high injection model with an intermediate injection model. To combine an intermediate level model with a low injection level model, another boundary condition is introduced. The present work provides solutions for important physical quantities such as the minority carrier profile and current within the drift region, injection ratio and storage time.     

A GaAs MESFET Schottky diode barrier height reference circuit

A barrier height reference voltage has been implemented with Schottky diodes in GaAs MESFET technology. It achieves less than 100 ppm/°C drift and can be used to create a reference voltage for source coupled logic, data converters, and as the basis for a variety of biasing circuits. Moderate accuracy is achieved with a circuit topology that reduces the ratio of control amplifier input voltage to reference voltage. The 7×16 mil² circuit achieves 36 dB of supply rejection, draws 700 μA from 5 V, and is implemented in a 20-GHz ion implanted manufacturing process     

Enhanced Schottky barrier heights on n-type Ga0.47In0.53As by Be implantation

Ion implantation of Be with extremely low energies of 2?5 keV into n-type GalnAs was performed, leading to shallow, fully depleted p-layers. This allowed us to achieve barrier heights of up to 0?6 eV, leading to well behaved diode characteristics.     

Effect of deep impurity levels on Schottky barrier diode characteristics

In the presence of an arbitrary number of deep donor levels volt-ampere and volt-farad characteristics are obtained for the Schottky barrier diode which contains a thin dielectric layer between the metal and the semiconductor. The analysis of these characteristics shows that the deep levels can significantly influence both the capacitance and the rectifying properties of the Schottky diode; the thicker the dielectric layer, the greater the effect of the deep levels upon volt-ampere relationship and the lesser upon volt-farad one. One can determine the parameters of the deep levels from these relationships. The results of the calculation are in agreement with the data of the experiment performed.     

Fabrication and characteristics of a 4H-SiC junction barrier Schottky diode

4H-SiC junction barrier Schottky(JBS)diodes with four kinds of design have been fabricated and characterized using two different processes in which one is fabricated by making the P-type ohmic contact of the anode independently,and the other is processed by depositing a Schottky metal multi-layer on the whole anode.The reverse performances are compared to find the influences of these factors.The results show that JBS diodes with field guard rings have a lower reverse current density and a higher breakdown voltage,and with independent P-type ohmic contact manufacturing,the reverse performance of 4H-SiC JBS diodes can be improved effectively. Furthermore,the P-type ohmic contact is studied in this work.     

4H-SiC结型势垒肖特基二极管的制作与特性研究

本文设计制作了两种具有不同结构参数的4H-SiC结型势垒肖特基二极管,在制作过程中采用了两种制作方法：一种是对正电极上的P型欧姆接触进行单独制作,然后制作肖特基接触的工艺过程;另一种是通用的通过一次肖特基接触制作就完成正电极制作的工艺过程。器件制作完成后,通过测试结果比较了采用场限环作为边界终端与未采用边界终端的器件的反向特性,结果显示采用场限环有效地提高了该器件的击穿电压,减小了其反向电流。另外,测试结果还显示采用独立制作P型欧姆接触的工艺过程有效提高了4H-SiC结型势垒肖特基二极管的反向特性,其中P型欧姆接触的制作过程和结果也在本文中做出了详细叙述。     

Numerical analysis of inhomogeneous Schottky diode with discrete barrier height patches

The potential profile inside the semiconductor at the metal–semiconductor contact is simulated by numerically solving the Poisson equation and the drift diffusion equations for inhomogeneous Schottky diode. From the simulated potential and the electron and hole concentrations, the drift-diffusion current as a function of bias is calculated. The simulation is carried out for various distribution patterns of barrier height patches at the metal–semiconductor contact to study the effect of barrier inhomogeneities on the Schottky diode parameters, namely barrier height and ideality factor and their temperature dependence. It is found that barrier height decreases and ideality factor increases with increase in the deviation of discrete barrier height patches in the distribution. The resulting barrier parameters are studied to understand the effect of barrier inhomogeneities on the current–voltage characteristics of inhomogeneous Schottky contact.     

Conduction power loss in MOSFET synchronous rectifier withparallel-connected Schottky barrier diode

The conduction power loss in an MOSFET synchronous rectifier with a parallel-connected Schottky barrier diode (SBD) was investigated. It was found that the parasitic inductance between the MOSFET and SBD has a large effect on the conduction power loss. This parasitic inductance creates a current that is shared by the two devices for a certain period and increases the conduction power loss. If conventional devices are used for under 1 MHz switching, the advantage of the low on-resistance MOSFET will almost be lost. To reduce the conduction loss for 10 MHz switching, the parasitic inductance must be a subnanohenley     

A study of Pd/Si MIS Schottky barrier diode hydrogen detector

Pd/Si MIS Schottky diode hydrogen detectors have been fabricated with a response of 2-3 orders of magnitude change in current for 154 ppm of H2in N2. Detailed evaluation of dark I-V, C-V, illuminated I-V, and internal photoemission data unambiguously ascribes the strong hydrogen sensitivity of these diodes to hydrogen-induced change in the work function of Pd, rather than to any surface-state effects. The reaction rate of the device to different gas ambients has been studied with time response measurements. A long-term degradation mechanism has been identified and traced to the poisoning of Pd by environmental sulfur. The role of oxygen and atomic hydrogen in determining the Schottky barrier height also is discussed in some detail.