300mm晶圆后段制程发展趋势探讨

台湾省半导体产业结构完整,以其紧密延伸的芯片制造合作模式,在过去数年间已建立起完整的半导体制程供应链,并持续向高附加值的高端制程发展。而考虑到成本效益与缩短产品上市时间的要求,300mm晶圆厂已成为晶圆代工下一波的竞争主力。在国际整合组件大厂纷纷将产能委托代工的趋势下,造就了台湾省晶圆代工的亮丽表现。为了建立台湾省半导体产业的竞争优势,台湾省晶圆代工两大龙头台积电及台联电在新竹科学园区及台南科学园区皆开始投资兴建300mm晶圆代工制造厂,并进行小型试产,加上国际级的整合组件大厂也都朝300mm晶圆的发展趋势前进,使得后…     

蔚华科技推出八大整合解决方案

<正>从IC设计、制造到测试协助半导体与FPD产业提升竞争优势。提供高科技产业最佳整合解决方案的蔚华科技于日前举行的Semicon China 2007展会中,针对半导体与FPD产业推出液晶驱动IC测试、     

与客户紧密合作,做最好的晶圆代工伙伴——访联华电子副总经理 王国雍先生

问:在全球半导体代工市场不断成长的同时,代工业的产业格局已由最初的晶圆双雄(台积电、联电)转向群雄争霸的阶段,竞争格局不断升级,请您谈谈联电目前在半导体代工业中所处的角色﹖答:产业竞争确实很激烈,但是联华电子在过去五年中,除了2008年金融危机外,每年都保持获利,     

抓紧创新 提升我国集成电路制造软实力

集成电路是信息技术产业的基础性和先导性产业,其技术水平和发展规模已经成为衡量一个国家产业竞争力和综合国力的重要标志之一。美国的集成电路产业在日本崛起之前独步世界,基本采取自由市场的发展方式。随着竞争的加剧,美国、韩国等都在不同阶段越来越重视政府在其中的推动作用。其中,半导体代工制造对于实现成本控制、工艺提高,尤其是对于我国半导体产业的优化与提升有着极其重要的意义。     

关于电子封装

我国半导体封装业相比IC设计和制造最接近国际先进水平,先进封装技术的广泛应用将改变半导体产业竞争格局,我国半导体封装业在"天时、地利、人和"有利环境下有望在国际竞争中实现"弯道超车"。集成电路产业"十二五"规划对产业发展提出了明确目标:涉及我国封测企业层面的结构目标,对封装测试业的技术要求,专用设备、仪器、材料的发展目标等三个方面。     

晶圆代工产业走过繁华及落寞以技术创新及服务品质续战未来

虽然半导体产业已打开发垂直分工型态的大门，但未必就可一路顺利地走向彻底的垂直分工化模式。晶圆代工业者虽已累积相当大的资源和既有优势，但半导体产业经蕾和竞争环境的变动，却在20、21世纪交警的时候冲击着晶圆代工产业，开始激发怀疑性的见解，不再认同其美丽的憧憬，以及再创造历史的能耐。民间针对此议题，有正反不一的争议。不过大体而言，这些论点大多是基于最近若干新闻事件，如nVidia下一代绘图处理器将改委由IBM代工；ATI坚持在中国台湾地区生产的决策等而衍生出来的观察，并未对晶圆代工产业在不同的时期的半导体产业环境变迁下所面临的问题以及有利点，做深入的分析，难免有以偏概全的论点产生。     

我国半导体代工业市场可持续发展的探研

一、我国半导体IC晶园代工业现状 我国半导体IC晶圆代工业发端于上世纪九十年代中下叶,当时的中国华晶电子集团公司承接微电子"七五""八五"无锡工程MOS集成电路生产线建设,摆脱开工不足的困境,为适应市场环境,变IDM模式为代工模式,成立了华晶上华半导体公司于1998年开创了中国大陆纯开放式专业的晶圆代工模式企业,由此带动了我国IC晶圆代工业的快速发展的历程,中国半导体产业开始按国际流行的按产业链分工模式转变,设计业、晶园制造业、封装测试业三业齐头并进,有力地促进了我国集成电路产业整体发展的崭新局面.     

精英聚焦产业链:探讨、交锋、决策

<半导体技术>专访 我认为症结在于我们的半导体设计业这一环节上.中国的半导体代工业的制造水准已经不落后于世界任何一家代工企业.可是我们的设计业还远远落后于国际领先水平,无法设计出具有强大竞争里的产品,无法为国内的代工业提供大量的订单进行投片生产.代工业要生存,要尽快收回巨大的投资成本,只能接大量国外公司的订单,这也是不得以而为之.     

2007年全球2.5G手机销售将达高峰

iSuppli公司预测，受需求减弱以及半导体委外制造活动的减缓，2005年专业晶圆代工(pure-play foundry)市场营收呈现衰退趋势，预计整体半导体产业的增长率将首次超过专业晶圆代工市场的扩张。     

日月光与华亚科技携手合作拓展系统级封装技术(SiP)

正半导体封装测试厂日月光半导体近日宣布与DRAM晶圆代工厂商华亚科技携手合作拓展系统级封装(SiP,System in Package)的技术制造能力。华亚科技将提供日月光2.5D晶片技术应用的硅中介层(silicon interposer)的硅晶圆生产制造服务,以扩展日月光现有封装产品线,此合作模式将结合华亚科技在前段晶圆的代工制造优势     

300 mm半导体代工厂的化学供应系统探讨

随着中国半导体业的发展,300 mm半导体代工厂(foundry)在中国纷纷出现,本讨论介绍了300 mm代工厂厂务化学系统的定义和分类、基本构成、安全设计和品质监控的要点,力图使读者对厂务化学系统有一个整体的了解,针对一些化学供应系统的常见问题和可改进之处,提出了改进建议.     

Mikroelektronikfabriken — Schmelztiegel von Technologie, Geld und Markt

Based on the project of a new 200-mm wafer fab of austriamicrosystems AG the competitive market environment and today’s technical aspects of the development and production of integrated circuits are presented as well as advanced technological developments are discussed. The change of the business model in the semiconductor industry, especially the combination of the fabless and foundry models are discussed and requirements and chances for an SME foundry are investigated using austriamicrosystems as an example. Having adapted the business model to the new industry structure and continuing to provide its high service competence in mixed signal and RF in combination with a strong focus on special technology options, austriamicrosystems fulfils all requirements for a continuous growth of its business.     

A Strategic Technology Planning Framework: A Case of Taiwan's Semiconductor Foundry Industry

The increasingly important role that technologies play in today's business success is well known. To ensure proper selection and development of the key technologies, a deliberate technology plan is needed. In this paper, a strategic technology planning framework is proposed. A hierarchical decision model and its sensitivity analysis are presented as two major steps of the framework to provide effective technology assessment and to generate technology scenarios. The hierarchical model links an organization's competitive goals and strategies in evaluating the technology alternatives’ overall contributions to business success; the sensitivity analysis helps to forecast and implement possible future changes in the economic environment, industry policies, and organization strategies. With the proposed framework, organizations can start to implement their technology plans synoptically and follow up with incremental adaptations as necessary. A case study on Taiwan's semiconductor foundry industry is presented to demonstrate the model in detail.      

Effects of pattern characteristics on the copper electroplating process

The non-planarity of a surface post electroplating process is usually dependent on variations of key layout characteristics including line width,line spacing and metal density.A test chip is designed and manufactured in a semiconductor foundry to test the layout dependency of the electroplating process.By checking test data such as field height,array height,step height and SEM photos,some conclusions are made.Line width is a critical factor of topographical shapes such as the step height and height difference.After the electroplating process,the fine line has a thicker copper thickness,while the wide line has the greatest step height.Three typical topographies, conformal-fill,supper-fill and over-fill,are observed.Moreover,quantified effects are found using the test data and explained by theory,which can be used to develop electroplating process modeling and design for manufacturability (DFM) research.     

Application of Six Sigma Methodology to Optimize the Performance of the Inter-Metal Dielectric Process

As semiconductor device density increases, integrated circuits generally involve more levels of metallization. In multilevel interconnected metallization schemes, an inter-metal dielectric (IMD) is deposited between metal layers. The basic advantage of this dielectric layer is that it provides good step coverage to help smooth the topology, making it free of pinholes and allowing it to act as a good insulator. The key problem in the IMD layer is the occurrence of voids which may cause electric leakage and later result in yield loss. The occurrence of these voids may be avoided by ensuring an excellent gap-fill capacity. Taking this into consideration, improving the gap-fill capacity is one of the critical issues for the IMD layer. In addition, the quantity of fluorine and the value of voltage ramping to dielectrics breakdown (VRDB) also affect the quality of the IMD layer. The gap-fill capacity, VRDB, and the quantity of fluorine are important quality characteristics for the optimization of the performance of the IMD layer. Due to the complicated inputs/responses relation, it is difficult for the output of the IMD process to reach the desired target. To resolve this problem, this study employs the Six Sigma methodology to reduce the defect in the IMD layer. A case study of a semiconductor manufacturing foundry in Taiwan is illustrated to show the practicability of the Six Sigma methodology.      

Semiconductor random-access memories

In the last few years, semiconductor random-access memory (RAM) components have been introduced into high-speed scratchpad applications and small buffer memory systems, where the performance or cost advantage of semiconductor components is greatest. More recently, developments in the technology of large-scale integrated (LSI) circuits have resulted in cost-performance characteristics of semiconductor RAMs that are competitive in computer main-frame memories as well. This article reviews the basic circuit concepts used in these components, representative products that are presently available, and some systems considerations involved in their use.     

A Web Services-Based Collaborative Planning, Forecasting, and Replenishment (CPFR) Framework for Managing Spare Parts of Semiconductor Equipment

In a semiconductor foundry, equipment failure has long been recognized as a major cause of unpredicted breakdown which results in an excessive production loss. Equipment maintenance management is one of the essential tasks in semiconductor manufacturing. Due to the prosperity of Internet and IT, e-diagnostics and e-maintenance through the web have become important applications in the semiconductor industry. Web services (WSs) can assist the data integration in heterogeneous e-manufacturing systems to support faster and remote maintenance functions. In this paper, a WS-based collaborative planning, forecasting and replenishment (CPFR) framework, namely WS-CPFR, is developed to collaboratively manage the logistics activities of spare parts in semiconductor equipment between equipment suppliers and semiconductor factories.      

节能减排的基础技术-功率半导体芯片

功率半导体作为半导体行业的一个重要分支,大量应用于消费类电子、工业控制和国防装备,是节能减排的关键技术和基础技术。本文结合我国功率半导体市场需求,概要介绍了功率半导体发展的技术趋势以及面临的挑战和发展前景。同时根据我国功率半导体技术的发展现状,对未来我国功率半导体领域的发展方向和重点发展技术做了展望与建议。     

Virtual test reduces semiconductor product development time

In the semiconductor industry's evolutionary life cycle, the speed at which products are introduced to the market-place is key to the competitive success of individual companies. The semiconductor industry is classed as a fast-changing industry in which product technology, manufacturing process technology and industry organisation need to be continuously updated in relatively short cycle times. This paper looks at the test engineering aspect of the IC (integrated circuit) product development process and describes how an emerging `virtual test' methodology can be effectively applied to reduce the overall product development time for semiconductor devices     

MOSFET和Poly-Si TFTs参数提取策略的研究

随着半导体制造技术的不断改善和工艺的不断升级,精确的模型参数对于代工厂和设计者尤为重要.而参数提取策略的选择是整个参数提取过程中的关键步骤.该研究以伯克利大学开发的SPICE Level-3 MOSFET和多晶硅薄膜晶体管模型为研究对象,以包括了短沟效应、窄沟效应、漏致势垒降低效应的MOSFET阈值电压方程和多晶硅薄膜晶体管统一漏电流方程作为研究出发点,然后分别讨论了模型中几个主要参数的提取方法,最后给出了参数提取的流程图.