Low-voltage organic ferroelectric field effect transistors using Langmuir–Schaefer films of poly(vinylidene fluoride-trifluororethylene)

Langmuir–Schaefer transfer was used to fabricate ultrathin films of ferroelectric copolymer, poly(vinylidene fluoride-trifluoroethylene) (70–30 mol%), for non-volatile memory application at low operating voltage. Increasing the number of transferred monolayers up to 10 led to improved film crystallinity in the “in-plane” direction, which reduced surface roughness of the semicrystalline film. Treatment of the substrate surface by plasma results in different film coverage which was subsequently found to be governed by interaction of the deposited film and surface condition. Localized ferroelectric switching was substantially attained using piezo-force tip at 10 V on 10-monolayer films. Integrating this film as a dielectric layer into organic capacitor and field effect transistor yields a reasonably good leakage current (<10^?7 A/cm²) with hysteresis in capacitance and drain current with ON/OFF ratio of 10³ for organic ferroelectric memory application at significantly reduced operating voltage of |15| V.     

Ferroelectric random access memory based on one-transistor–one-capacitor structure for flexible electronics

We have demonstrated a low temperature process for a ferroelectric non-volatile random access memory cell based on a one-transistor–one-capacitor (1T1C) structure for application in flexible electronics. The n-channel thin film transistors (TFTs) and ferroelectric capacitors (FeCaps) are fabricated using cadmium sulfide (CdS) as the semiconductor and poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] copolymer as the ferroelectric material, respectively. The maximum processing temperature for the TFTs is 100 °C and 120 °C for the FeCaps. The TFT shows excellent access control of the FeCap in the 1T1C memory cell, and the stored polarization signals are undisturbed when the TFT is off. The fabricated 1T1C memory cell was also evaluated in a FRAM circuit. The memory window on the bit line was demonstrated as 2.3 V, based on the 1T1C memory cell with a TFT having dimensions of 80 μm/5 μm (W/L) and a FeCap with an area of 0.2 × 10^?3 cm² using a bit line capacitor of 1 nF pre-charged at 17.2 V. The 1T1C memory cell is fabricated using photolithographic processes, allowing the integration with other circuit components for flexible electronics systems.     

Hybrid dual gate ferroelectric memory for multilevel information storage

Here, we report hybrid organic/inorganic ferroelectric memory with multilevel information storage using transparent p-type SnO semiconductor and ferroelectric P(VDF-TrFE) polymer. The dual gate devices include a top ferroelectric field-effect transistor (FeFET) and a bottom thin-film transistor (TFT). The devices are all fabricated at low temperatures (∼200 °C), and demonstrate excellent performance with high hole mobility of 2.7 cm² V⁻¹ s⁻¹, large memory window of ∼18 V, and a low sub-threshold swing ∼−4 V dec⁻¹. The channel conductance of the bottom-TFT and the top-FeFET can be controlled independently by the bottom and top gates, respectively. The results demonstrate multilevel nonvolatile information storage using ferroelectric memory devices with good retention characteristics.     

Polymeric gate dielectric interlayer of cross-linkable poly(styrene-r-methylmethacrylate) copolymer for ferroelectric PVDF-TrFE field effect transistor memory

A new polymeric gate dielectric interlayer of a cross-linkable poly(styrene-random-methylmethacrylate) copolymer is introduced with a good thermal and chemical resistance in bottom gate Ferroelectric Field Effect Transistor (FeFET) memory with pentacene active layer and ferroelectric poly(vinylidene fluoride-co-trifluoroethylene) (PVDF-TrFE) one. A thin uniform PVDF-TrFE film was successfully formed with well defined ferroelectric microdomains on an interlayer. Thickness of the interlayer turns out to be one of the most important factors for controlling gate leakage current which is supposed to be minimized for high ON/OFF bistability of a FeFET memory. An interlayer inserted between gate electrode and PVDF-TrFE layer significantly reduces gate leakage current, leading to source–drain OFF current of approximately 10^?11 A in particular when its thickness becomes greater than approximately 25 nm. A reliable FeFET device shows a clockwise I-V hysteresis with drain current bistablility of 10³ at ±40 V gate voltage.     

Characterization of current transport in ferroelectric polymer devices

We report the charge injection characteristics in poly(vinylidene fluoride-trifluoroethylene), P(VDF-TrFE), as a function of electrode material in metal/ferroelectric/metal device structures. Symmetric and asymmetric devices with Al, Ag, Au and Pt electrodes were fabricated to determine the dominant carrier type, injection current density, and to propose transport mechanisms in the ferroelectric polymer. Higher work function metals such as Pt are found to inject less charges compared to lower work function metals, implying n-type conduction behavior for P(VDF-TrFE) with electrons as the dominant injected carrier. Two distinct charge transport regimes were identified in the P(VDF-TrFE) devices; a Schottky-limited conduction regime for low to intermediate fields (E < 20 MV/m), and a space-charge limited conduction (SCLC) regime for high fields (20 < E < 120 MV/m). Implication of these results for degradation in P(VDF-TrFE) memory performance are discussed.     

Effect of the film thickness on the crystal structure and ferroelectric properties of (Hf0.5Zr0.5)O2 thin films deposited on various substrates

In this work, the effect of the film thickness on the crystal structure and ferroelectric properties of (Hf_0.5Zr_0.5)O₂ thin films was investigated. The thin films were deposited on (111) Pt-coated SiO₂, Si, and CaF₂ substrates with thermal expansion coefficients of 0.47, 4.5, and 22×10⁻⁶/°C, respectively. From the X-ray diffraction measurements, it was found that the (Hf_0.5Zr_0.5)O₂ thin films deposited on the SiO₂ and CaF₂ substrates experienced in-plane tensile and compressive strains, respectively, in comparison with the films deposited on the Si substrates. For films deposited on all three substrates, the volume fraction of the monoclinic phase increased with increasing film thickness, with the SiO₂ substrate having the lowest monoclinic phase volume fraction at all film thicknesses tested. The grain size of the films, which is an important factor for the formation of the ferroelectric phase, remained almost constant at about 10 nm in diameter regardless of the film thickness and type of substrate utilized. Ferroelectricity was observed for the 17 nm-thick films deposited on SiO₂ and Si substrates, and the maximum remanent polarization (P_r) value of 9.3 µC/cm² was obtained for films deposited on the SiO₂ substrate. In contrast, ferroelectricity with P_r=4.4 µC/cm² was observed only for film on SiO₂ substrate in case of 55 nm-thick films. These results suggest that the films under in-plane tensile strain results in the larger ferroelectricity for 17 nm-thick films and have a ferroelectricity up to 55 nm-thick films.     

Growth temperature dependence of epitaxial Gd2O3 films on Si(1 1 1)

This article reports on the epitaxy of crystalline high κ oxide Gd₂O₃ layers on Si(1 1 1) for CMOS gate application. Epitaxial Gd₂O₃ thin films have been grown by Molecular Beam Epitaxy (MBE) on Si(1 1 1) substrates between 650 and 750 °C. The structural and electrical properties were investigated depending on the growth temperature. The C–V measurements reveal that equivalent oxide thickness (EOT) equals 0.7 nm for the sample deposited at the optimal temperature of 700 °C with a relatively low leakage current of 3.6 × 10^?2 A/cm² at |V_g ? V_FB| = 1 V.     

Influences of embossing technology on Pb(Zr0.3,Ti0.7)O3 ferroelectric thin film

The ferroelectric random access memory (FRAM) which uses ferroelectric thin film as memory material is considered to be a candidate for the next generation memory application. In this work, we apply nano-embossing technology to fabricate Pb(Zr_0.3,Ti_0.7)O₃ (PZT) ferroelectric thin film nanostructures and investigate the influence of the patterning process on the material and ferroelectric properties by using SEM, XRD and Precision Ferroelectric Tester. Embossing process has been optimized for embossing depth and pattern profile. It was found that embossing will result in (1 0 0) preferred orientation of the PZT thin film. The electrical characteristics of patterned and un-patterned PZT films have been also studied for comparison.     

Topography engineering of ferroelectric crystalline copolymer film

Effects of surface roughness as well as crystallinity onto functionalities of crystalline copolymer films were studied using a dipping method to inject the crystalline grains into voids among crystalline nano-rods. Differently from a widely-used fabrication method such as spin-coating of solution, we achieved a smooth surface and high crystallinity in ferroelectric P(VDF-TrFE) films, simultaneously. Varying dipping temperature and time, remnant polarization and relative dielectric constant values increased by 20% and 75% with a decrease of surface roughness from 20 nm to 7 nm in root mean square value, respectively. The ferroelectric stabilities of P(VDF-TrFE) film capacitors were found to be strongly dependent on the crystallinity.     

Potentiality of trap charge effects and SiON induced interface defects in a-Si3N4/SiON based MIS structure for resistive NVM device

Potential application of amorphous silicon nitride (a-Si₃N₄)/silicon oxy-nitride (SiON) film has been demonstrated as resistive non-volatile memory (NVM) device by studying the Al/Si₃N₄/SiON/p-Si metal–insulator–semiconductor (MIS) structure. The existence of several deep trap states was revealed by the photoluminescence characterizations. The bipolar resistive switching operation of this device was investigated by current–voltage measurements whereas the trap charge effect was studied in detail by hysteresis behavior of frequency dependent capacitance–voltage characteristics. A memory window of 4.6 V was found with the interface trap density being 6.4 × 10¹¹ cm⁻² eV⁻¹. Excellent charge retention characteristics have been observed for the said MIS structure enabling it to be used as a reliable non-volatile resistive memory device.     

Properties of fluorine-doped tin oxide films prepared by an improved sol-gel process

Fluorine-doped tin oxide (FTO) films were prepared by an improved sol-gel process, in which FTO films were deposited on glass substrates using evaporation method, with the precursors prepared by the conventional sol-gel method. The coating and sintering processes were combined in the evaporation method, with the advantage of reduced probability of films cracking and simplified preparation process. The effects of F-doping contents and structure of films on properties of films were analyzed. The results showed the performance index (Φ_TC=3.535×10⁻³ Ω⁻¹ cm) of the film was maximum with surface resistance (R_sh) of 14.7 Ω cm⁻¹, average transmittance (T) of 74.4% when F/Sn=14 mol%, the reaction temperature of the sol was 50 °C, and the evaporation temperature was 600 °C in muffle furnace, and the film has densification pyramid morphology and SnO_2−xF_x polycrystalline structure with tetragonal rutile phase. Compared with the commercial FTO films (Φ_TC=3.9×10⁻³ Ω⁻¹ cm, R_sh=27.4 Ω cm⁻¹, T=80%) produced by chemical vapor deposition (CVD) method, the Φ_TC value of FTO films prepared by an improved sol-gel process is close to them, the electrical properties are higher, and the optical properties are lower.     

Low-voltage,high speed inkjet-printed flexible complementary polymer electronic circuits

We report the development of high-performance inkjet-printed organic field-effect transistors (OFETs) and complementary circuits using high-k polymer dielectric blends comprising poly(vinylidenefluoride-trifluoroethylene) (P(VDF-TrFE)) and poly(methyl methacrylate) (PMMA) for high-speed and low-voltage operation. Inkjet-printed p-type polymer semiconductors containing alkyl-substituted thienylenevinylene (TV) and dodecylthiophene (PC12TV12T) and n-type P(NDI2OD-T2) OFETs showed high field-effect mobilities of 0.1–0.4 cm² V^?1 s^?1 and low threshold voltages down to 5 V. These OFET properties were modified by changing the blend ratio of P(VDF-TrFE) and PMMA. The optimum blend – a 7:3 wt% mixture of P(VDF-TrFE) and PMMA – was successfully used to realize high-performance complementary inverters and ring oscillators (ROs). The complementary ROs operated at a supplied bias (V_DD) of 5 V and showed an oscillation frequency (f_osc) as high as ～80 kHz at V_DD = 30 V. Furthermore, the f_osc of the complementary ROs was significantly affected by a variety of fundamental parameters such as the electron and hole mobilities, channel width and length, capacitance of the gate dielectrics, V_DD, and the overlap capacitance in the circuit configuration.     

Memory and ferroelectric photovoltaic effects arising from quasi-reversible oxidation and reduction in porphyrin entrapped aminopropyl-silicate films

We report non-zero-crossing bipolar current–voltage characteristics, and ferroelectric photovoltaic-like effects in flexible organosilicate polymer films. These film are composed of 5,10,15,20-terakis(4-hydroxyphenyl)-21H,23H-porphine and 5,10,15,20-tetra(4-pyridyl)-21H,23H-porphine embedded in (3-aminopropyl)trimethoxysilane network. The films were prepared on gold coated bi-axially oriented polyethylene terephthalate (BoPET) substrate by sol–gel method. For electrical characterizations, gold (40 nm) was deposited on the film for using as top contact. The current–voltage characteristics of devices, BoPET/gold/film/gold, have shown hysteresis with two current peaks in opposite direction. The open circuit voltage (∼±0.8 V) and short circuit current (∼±6 μA) that arise from non zero-crossing current–voltage characteristics have been utilized to read the ON and OFF states for non-volatile memory application of the devices. Furthermore, the studies on redox induced polarization in the polymer matrix by charge–voltage, capacitance–voltage, and positive-up and negative-down measurements reveal the characteristics of ferroelectric materials. The photovoltaic behaviors such as short circuit photocurrent were studied under blue LED source after polarizing BoPET/gold/polymer film/gold device by electric field as done for classical ferroelectric materials. The observed memory, ferroelectric-like and photovoltaic effects of organosilicate film were explained from quasi-reversible oxidation and reduction of moisture that diffuse into the film and dissociate to ions under applied electric field. These findings are important for designing new solution processible polymer materials which could find applications in flexible memory, ferroelectric based memory and switchable photovoltaic effects.     

Investigations on phosphorus doped amorphous/nanocrystalline silicon films deposited by a filtered cathodic vacuum arc technique in the presence of hydrogen gas

Phosphorus doped amorphous/nanocrystalline silicon (a-Si:H/nc-Si:H) thin films have been deposited by a filtered cathodic vacuum arc (FCVA) technique in the presence of hydrogen gas at different substrate temperatures (T_s) ranging from room temperature (RT) to 350 °C. The films have been characterized by using X-ray diffraction (XRD), Raman spectroscopy, Fourier transform infrared (FTIR) spectroscopy, dark conductivity (σ_D), activation energy (ΔE), optical band gap (E_g) and secondary ion mass spectroscopy. The XRD patterns show that RT grown film is amorphous in nature but high temperature (225 and 350 °C) deposited films exhibit nanocrystalline structure with (111) and (220) crystal orientations. The crystallite size of higher temperature grown silicon film evaluated was between 13 and 25 nm. Raman spectra reveal the amorphous nature of the film deposited at RT, whereas higher temperature deposited films show crystalline nature. The crystalline volume fraction of the silicon film deposited at higher temperatures (225 and 350 °C) was estimated to be 58 and 72%. With the increase of T_s, the bonding configuration changes from mono-hydride to di-hydride as revealed by the FTIR spectra. The values of σ_D, ΔE and E_g of silicon films deposited at different T_s were found to be in the range of 5.37×10⁻⁴–1.04 Ω⁻¹ cm⁻¹, 0.05–0.45 eV and 1.42–1.83 eV, respectively. Photoconduction of 3.5% has also been observed in n-type nc-Si:H films with the response and recovery times of 9 and 12 s, respectively. A n-type nc-Si:H/p-type c-Si heterojunction diode was fabricated which showed the diode quality factor between 1.6 and 1.8.     

Memory characteristics of Al2O3/La2O3/Al2O3 multi-layer films with various blocking and tunnel oxide thicknesses

In order to investigate charge trap characteristics with various thicknesses of blocking and tunnel oxide for application to non-volatile memory devices, we fabricated 5 and 15 nm Al₂O₃/5 nm La₂O₃/5 nm Al₂O₃ and 15 nm Al₂O₃/5 nm La₂O₃/5, 7.5, and 10 nm Al₂O₃ multi-stack films, respectively. The optimized structure was 15 nm Al₂O₃ blocking oxide/5 nm La₂O₃ trap layer/5 nm Al₂O₃ tunnel oxide film. The maximum memory window of this film of about 1.12 V was observed at 11 V for 10 ms in program mode and at ?13 V for 100 ms in erase mode. At these program/erase conditions, the threshold voltage of the 15 nm Al₂O₃/5 nm La₂O₃/5 nm Al₂O₃ film did not change for up to about 10⁴ cycles. Although the value of the memory window in this structure was not large, it is thought that a memory window of 1.12 V is acceptable in the flash memory devices due to a recently improved sense amplifier.     

Effect of processing parameter on structural,optical and electrical properties of photovoltaic chalcogenide nanostructured RF magnetron sputtered thin absorbing films

The aim of this work was to develop high quality of CuIn_1−xGa_xSe₂ thin absorbing films with x (Ga/In+Ga)<0.3 by sputtering without selenization process. CuIn_0.8Ga_0.2Se₂ (CIGS) thin absorbing films were deposited on soda lime glass substrate by RF magnetron sputtering using single quaternary chalcogenide (CIGS) target. The effect of substrate temperature, sputtering power & working pressure on structural, morphological, optical and electrical properties of deposited films were studied. CIGS thin films were characterised by X-ray diffraction (XRD), Field emission scanning electron microscope (FE-SEM), Energy dispersive X-ray spectroscopy (EDAX), Atomic force microscopy (AFM), UV–vis–NIR spectroscopy and four probe methods. It was observed that microstructure, surface morphology, elemental composition, transmittance as well as conductivity of thin films were strongly dependent on deposition parameters. The optimum parameters for CIGS thin films were obtained at a power 100 W, pressure 5 mT and substrate temperature 500 °C. XRD revealed that thin film deposited at above said parameters was polycrystalline in nature with larger crystallite size (32 nm) and low dislocation density (0.97×10¹⁵ lines m⁻²). The deposited film also showed preferred orientation along (112) plane. The morphology of the film depicted by FE-SEM was compact and uniform without any micro cracks and pits. The deposited film exhibited good stoichiometry (Ga/In+Ga=0.19 and In/In+Ga=0.8) with desired Cu/In+Ga ratio (0.92), which is essential for high efficiency solar cells. Transmittance of deposited film was found to be very low (1.09%). The absorption coefficient of film was ~10⁵ cm⁻¹ for high energy photon. The band gap of CIGS thin film evaluated from transmission data was found to be 1.13 eV which is optimum for solar cell application. The electrical conductivity (7.87 Ω⁻¹ cm⁻¹) of deposited CIGS thin film at optimum parameters was also high enough for practical purpose.     

Fabrication of single crystal field-effect transistors with phenacene-type molecules and their excellent transistor characteristics

Single crystal field-effect transistors (FETs) using [6]phenacene and [7]phenacene show p-channel FET characteristics. Field-effect mobilities, μs, as high as 5.6 × 10^?1 cm² V^?1 s^?1 in a [6]phenacene single crystal FET with an SiO₂ gate dielectric and 2.3 cm² V^?1 s^?1 in a [7]phenacene single crystal FET were recorded. In these FETs, 7,7,8,8-tetracyanoquinodimethane (TCNQ) was inserted between the Au source/drain electrodes and the single crystal to reduce hole-injection barrier heights. The μ reached 3.2 cm² V^?1 s^?1 in the [7]phenacene single crystal FET with a Ta₂O₅ gate dielectric, and a low absolute threshold voltage |V_TH| (6.3 V) was observed. Insertion of 2,3,5,6-tetrafluoro-7,7,8,8-tetracyanoquinodimethane (F₄TCNQ) in the interface produced very a high μ value (4.7–6.7 cm² V^?1 s^?1) in the [7]phenacene single crystal FET, indicating that F₄TCNQ was better for interface modification than TCNQ. A single crystal electric double-layer FET provided μ as high as 3.8 × 10^?1 cm² V^?1 s^?1 and |V_TH| as low as 2.3 V. These results indicate that [6]phenacene and [7]phenacene are promising materials for future practical FET devices, and in addition we suggest that such devices might also provide a research tool to investigate a material’s potential as a superconductor and a possible new way to produce the superconducting state.     

Properties of In2O3 films obtained by thermal oxidation of sprayed In2S3

In₂S₃ thin films were grown by the chemical spray pyrolysis (CSP) method using indium chloride and thiourea as precursors at a molar ratio of S:In=2.5. The deposition was carried out at 350 °C on quartz substrates. The film thickness is about 1 µm. The films were then annealed for 2 h at 550, 600, 650 and 700 °C in oxygen flow. This process allows the transformation of nanocrystal In₂O₃ from In₂S₃ and the reaction is complete at 600 °C. X-ray diffraction spectra show that In₂O₃ films are polycrystalline with a cubic phase and preferentially oriented towards (222). The film grain size increases from 19 to 25 nm and RMS values increase from 9 to 30 nm. In₂O₃ films exhibit transparency over 70–85% in the visible and infrared regions due to the thickness and crystalline properties of the films. The optical band gap is found to vary in the range 3.87–3.95 eV for direct transitions. Hall effect measurements at room temperature show that resistivity is decreased from 117 to 27 Ω cm. A carrier concentration of 1×10¹⁶ cm^?3 and mobility of about 117 cm² V^?1 s^?1 are obtained at 700 °C.     

Polymer nanocomposite dielectric based on P(VDF-TrFE)/PMMA/BaTiO3 for TIPs-pentacene OFETs

TIPs-pentacene OFETs were fabricated on a plastic substrate using polymer nanocomposite dielectric. The blend polymer P(VDF-TrFE)/PMMA (30 wt%) was used as polymer matrix and BaTiO₃ nanoparticles modified by 3-glycidoxypropyltrimethoxysilane (GPTMS) were dispersed as ceramic fillers. The effects of different loadings of BaTiO₃ on the surface morphology and electrical properties of dielectric films were investigated. The formulation of screen-printable dielectric ink of P(VDF-TrFE)/PMMA/BaTiO₃/Silica (SII) was achieved by adding fumed silica as the viscosity modifier. TIPs-pentacene OFETs using SII as the gate dielectric features a mobility of 0.01 cm²/V s, and having a threshold voltage of −6 V. This screen-printable dielectric ink is promising for low operating-voltage fully-printed OFETs.     

Effect of temperature on structural and optical properties of ZnS thin films by chemical bath deposition without stirring the reaction bath

ZnS thin films were deposited at different temperatures on glass substrates by chemical bath deposition method without stirring the deposition bath. With deposition temperature increasing from 50 °C to 90 °C, pH decreases rapidly, homogeneous precipitation of ZnS, instead of Zn(OH)₂ easily forms in the bath. It means that higher temperature is favorable for the formation of relatively high stoichiometric film, due to the lower concentration of OH⁻. The thickness of the films deposited at 90 °C is much higher than that of the films deposited at 50 °C and 70 °C. Combining the film thickness with the change of pH, the growth of film, especially deposited at 90 °C mainly comes from the fluctuation region of pH. At the same time, with the increase of deposition temperature, the obtained films are transparent, homogeneous, reflecting, compact, and tightly adherent. The ZnS films deposited for 1.5 h, 2 h and 2.5 h at 70 °C and 90 °C have the cubic structure only after single deposition. The average transmission of all films, especially the thicker films deposited at 90 °C, is greater than 90% for wavelength values in the visible region. Comparing with the condition of stirring, the structural and optical properties of films are improved significantly. The direct band gaps range from 3.93 to 4.06 eV.