Low-temperature CVD TiN as a diffusion barrier between gold and silicon

Low-temperature (200°C), atmospheric pressure chemical vapor deposited (APCVD) titanium nitride films are shown to be effective diffusion barriers for the Au/TiN/Si contact scheme. The samples were analyzed by Rutherford backscattering spectroscopy (RBS), and by optical microscopy. It was found that a pure TiN layer constitutes an effective barrier for 40 min at 550°C, at which point the TiN cracks and peels. Even thin layers of TiN (200Å thick) can significantly reduce the amount of interdiffusion between the gold and silicon.     

Significant reduction in the hole-injection barrier by the charge-transfer state formation: Diindenoperylene contacted with silver and copper electrodes

Charge-carrier injection in organic electronics is critically influenced by the interface electronic states formed at the organic semiconducting thin films and metal electrode contacts. A practical solution for the issue is to form a charge-transfer (CT) state at the interfaces, which will produce a substantial density of gap states in the vicinity of the Fermi level of metal electrodes and thus reduce significantly the charge-injection barrier at the interfaces. In this study, we use ultraviolet photoelectron spectroscopy and demonstrate the formation of a CT state at diindenoperylene (DIP) and Ag (or Cu) electrode contacts. Remarkably, the CT state occurs irrespective of the electrode crystallinity, crystal grain orientations, or the molecular orientations in the DIP film, hence both the top- or bottom-metal contact conditions result in the formation of the CT state. Theoretical calculation simulations show the sign of strong interaction between those metal atoms and DIP leading to the CT state formation, analogous to the surface-induced aromatic stabilization proposed by Heimel et al. in a literature [Nat. Chem., 5(2013)187.]. Our results aid in understanding the mechanism of the CT state formation and propose the DIP-CT interlayers being novel candidates for the efficient hole-injection layers used in organic electronics.     

Interfacial reaction between the electroless nickel immersion gold substrate and Sn-based solders

The electroless nickel immersion gold (ENIG) surface finish is widely used in electronic packaging. The ENIG induced Au embrittlement has been investigated in SnPb/ENIG/Cu solder joint since several years ago. However, in Sn-based lead-free solder joint, discrepancies still exist about the influence of Au finish on the reliability of the solder joint. This study investigated the effects of ENIG surface finish on the interfacial reaction and thus the mechanical property of Sn-based solder joints. Experimentally, two types of ENIG with different thickness of Au layer were fabricated. The results indicated that the Au layer dissolved into the solder matrix readily in the soldering stage, and then affected the shear strength of the solder joint significantly. The Au migration occurred in the solder joint during isothermal aging. The Au migration is more apparent when the Cu₆Sn₅ type compound formed at the interface. The embrittlement caused by the weak interface between the (Au_1−xNi_x)Sn₄ and Ni₃Sn₄ layers cannot be observed in this study.     

Cu contact on NiSi substrate with a Ta/TaN barrier stack

The thermal and electrical stabilities of Cu contact on NiSi substrate with and without a Ta/TaN barrier stack in between were investigated. Four-point probe (FPP), X-ray diffraction (XRD), scanning electron microscopy (SEM), depth-profiling X-ray photoelectron spectroscopy (XPS), and Schottky barrier height (SBH) measurement were carried out to characterize the diffusion barrier properties. The SBH measurement provides a very sensitive method to characterize the diffusion barrier properties for the copper contact on NiSi/Si. The results show that the Ta/TaN stack can be both thermally and electrically stable after annealing at 450 °C for 30 min and it will have a potential application as a diffusion barrier for Cu contact on NiSi.     

High-voltage and high-temperature applications of DTMOS with reverse Schottky barrier on substrate contacts

In this letter, for the first time, application of dynamic threshold voltage MOSFET (DTMOS) with reverse Schottky barrier on substrate contacts (RSBSCs) for high voltage and high temperature is presented. By this RSBSC, DTMOS can be operated at high voltage (>0.7 V), and exhibits excellent performance at high temperature in terms of ideal subthreshold slope, low threshold voltage and high driving current.     

Increasing bondability and bonding strength of gold stud bumps onto copper pads with a deposited titanium barrier layer

A flip-chip assembly is an attractive scheme for use in high performance and miniaturized microelectronics packaging. Wafer bumping is essential before chips can be flip-bonded to a substrate. Wafer bumping can be used for mechanical-single point stud bump bonding (SBB), and is based on conventional thermosonic wire bonding. This work proposes depositing a titanium barrier layer between the copper film and the silver bonding layer to achieve perfect bondability and sufficiently strong thermosonic bonding between a stud bump and the copper pad.A titanium layer was deposited on the copper pads to prevent copper atoms from out-diffusing during thermosonic stud bump bonding. A silver film was then deposited on the surface of the titanium film as a bonding layer to increase the bondability and bonding strength for stud bumps onto copper pads. The integration of the silver bonding layer with a diffusion barrier layer of titanium on the copper pads yielded 100% bondability between the stud bump and pads. The strength of bonding between the gold bumps on the copper pads significantly exceeds the minimum average values in JEDEC specifications. The diffusion barrier layer of titanium effectively prevents copper atoms from out-diffusing to the silver bonding layer surface during thermosonic bonding, which fact can be interpreted with reference to the experimental results of energy dispersive spectrometry (EDS) and analyses of Auger depth profiles. This diffusion barrier layer of titanium efficiently provides perfect bondability and sufficiently strong bonding between a stud bump and copper pads with a silver bonding layer.     

Carrier mobility in pentacene as a function of grain size and orientation derived from scanning transmission X-ray microscopy

Pentacene field-effect transistors were prepared on silicon nitride membranes for scanning transmission X-ray microscopy (STXM) investigations. The membranes were modified by different self-assembled monolayers (SAMs). Pentacene was deposited atop the SAM-treated membrane and the in-plane orientation of the grains were subsequently investigated by polarization dependent STXM measurements. The grain sizes were determined and compared to those obtained from atomic force microscopy (AFM) measurements. Statistical analysis of the grain orientation was correlated with the charge carrier mobility of the films, in which we observed an increase in the mobility with increasing grain size and decreasing surface roughness of the SAM.     

Contact resistance between pentacene and indium–tin oxide (ITO) electrode with surface treatment

Contact resistance between indium–tin oxide (ITO) electrode and pentacene was studied by transmission line method (TLM). Organic solvent cleaned, inorganic alkali cleaned, and self-assembled monolayer (with OTS: octadecyltrichlorosilane) modified ITO electrode structures were compared. Pentacene layer of 300 Å thickness was vacuum deposited on patterned ITO layer at 70 °C with a deposition rate of 0.3 Å/s. Alkali cleaned and SAM modified ITO gave a lower contact resistance of about 6.34 × 10⁴ Ω cm² and 1.88 × 10³ Ω cm², respectively than organic solvent cleaned ITO of about 6.58 × 10⁵ Ω cm². Especially with the SAM treatment, the work function of ITO increased closer to the highest occupied molecular orbital (HOMO) level of pentacene, which lowers the injection barrier between ITO and pentacene. It was also believed that pentacene morphology was improved on SAM modified ITO surface due to the lowering of the surface energy. We could obtain the low contact resistance with SAM treatment which is comparable to the measured value of gold–pentacene contact, 1.86 × 10³ Ω cm². This specific contact resistance is still much higher than that of amorphous silicon thin film transistor (0.1–30 Ω cm²).     

Electron tunneling between two-dimensional electronic systems in a heterostructure with a single doped barrier

Electron tunneling in a heterostructure with a single doped barrier was investigated. Analysis of the experimental data showed that all features in the tunneling conductance are due to electron tunneling between two-dimensional electron sheets which appear on different sides of the barrier as a result of ionization of impurities in the barrier. Electron transport between the two-dimensional electron sheets and three-dimensional contact regions does not introduce significant distortions in the measured tunneling characteristics. In such structures there is no current flow along the two-dimensional electron gas; such a current ordinarily makes it difficult to investigate tunneling between two-dimensional electronic systems in magnetic fields. Fiz. Tekh. Poluprovodn. 32, 602–606 (May 1998)     

Titanium nitride as a diffusion barrier between nickel silicide and aluminum

The diffusion barrier properties of titanium nitride between nickel silicide and aluminum have been investigated in NiSi Schottky contacts on silicon for annealing temperatures of 400–600°C. No interaction between the metals of the contact structure was detected by backscattering spectrometry, even at 600°C. The electron barrier height of Schottky diodes stays constant at ϕBn = 0.67 ± 0.01 upon thermal annealing in vacuum at 500°C for 2 h . The ideality factor is n = 1.01. After 4 h, ϕ Bn decreases by about 10 mV and n rises to 1.0 6. The diodes degrade after annealing at 550°C or 600°C for 30 min.     

Development of a conjugated donor-acceptor polyelectrolyte with high work function and conductivity for organic solar cells

To achieve highly efficient organic photovoltaic (OPV) devices, the interface between the photoactive layer and the electrode must be modified to afford the appropriate alignment of the energy levels and to ensure efficient charge extraction at the same time as suppressing charge recombination and accumulation. Recently, p-type conjugated polyelectrolytes (CPEs) have emerged as new hole-transporting materials that can be deposited on electrodes through simple solution processes without additional heat treatment. However, the applications of CPEs have been limited so far because the high electron richness of their conjugated backbones result in low work functions, ∼5.0 eV. Here, by inserting a donor−acceptor (D−A) building block into the CPE backbone, we successfully synthesized a new p-type CPE (PhNa-DTBT), which shows a deep work function above 5.3 eV on several electrodes including Au, Ag, and indium tin oxide. More importantly, PhNa-DTBT produces stable polarons on the polymer backbone and thus achieves a high electrical conductivity of 5.7 × 10⁻⁴ S cm⁻¹. As a result, an OPV incorporating PhNa-DTBT as a hole-transporting layer was found to exhibit a high performance with a power conversion efficiency of 9.29%. Also, the OPV device shows improved stability in air due to the neutral characteristics of the CPE which is favorable for stabilizing neighbored active and electrode layers.     

The influence of adsorbate on the work function and penetrability of the surface potential barrier of GaAs(110) single crystal

The characteristic features of variations in the current-voltage characteristics of the current of slow monoenergetic electrons, which are introduced into single-crystal GaAs(110) from vacuum, were established with the removal of the native oxide layer from the surface. It is demonstrated that the work function decreases and the penetrability of the potential barrier increases with the temperature of thermal treatment of the crystal in high vacuum. The oxide removal was monitored simultaneously by ellipsometry. According to calculations from the Drude equations, the thickness of the removed layer is no larger than 20 Å.     

InxGa1−xAs ohmic contacts to n-type GaAs with a tungsten nitride barrier

Significant reduction of the contact resistance of In_0.7Ga_0.3As/Ni/W contacts (which were previously developed by sputtering in our laboratory) was achieved by depositing a W₂N barrier layer between the Ni layer and W layer. The In_0.7Ga_0.3 As/Ni/W₂N/W contact prepared by the radio-frequency sputtering technique showed the lowest contact resistance of 0.2 Ωmm after annealing at 550°C for 10 s. This contact also provided a smooth surface, good reproducibility, and excellent thermal stability at 400°C. The polycrystalline W₂N layer was found to suppress the In diffusion to the contact surface, leading to improvement of the surface morphology and an increase in the total area of the In_xGa−As between metal and the GaAs substrate. These improvements are believed to reduce the contact resistance.     

Modeling the solid-state reaction between Sn-Pb solder and a porous substrate coating

Solder joints in hybrid microelectronic circuit electronics are formed between the solder alloy and the noble metal thick film conductor that has been printed and fired onto the ceramic. Although the noble metal conductors provide excellent solderability at the time of manufacture, they are susceptible to solid-state reactions with Sn or other constituents of the solder. The reaction products consist of one or more intermetallic compounds (IMC). The integrity of these solder joints can be jeopardized by formation of IMC layers, which can have thermal and mechanical properties that are substantially different from the solder and substrate and which can consume the conductor layer by solid-state reaction. Analytical models predicting IMC growth for a variety of conditions are needed to improve predictions of long-term joint reliability and manufacturing processes. Unfortunately, because of the inherent porosity of thick film conductors, IMC growth in conductors cannot be well predicted by simply applying growth kinetics to a quasi-one-dimensional layer geometry. Rather, IMC growth involves a complicated geometry in which the interfaces between solid-state phases grow, intersect, and coalesce. In such geometries, explicit boundary tracking, which is normally done in one-dimensional models, is impractical. In heat transfer analyses, an implicit approach, referred to as the enthalpy method, has been used to address multidimensional problems in which interface displacement is controlled by an energy flux. However, an analogous general approach has not been available for mass transfer and reaction analyses. This paper discusses initial 2-D results from a coupled experimental and computational effort to develop a mathematical model and computer code that will ultimately predict 3-D intermetallic growth in porous substrate-solder systems. The numerical model is based on an implicit interface tracking approach developed for diffusion-reaction analyses in complicated geometries. To illustrate the implicit approach with a “real” system, the 2-D calculations were based on the reaction couple formed between 63Sn-37Pb solder and 76Au-21Pt-3Pd substrates. Physical constants in the model were evaluated from experimental data. Consumption of the thick film was predicted as a function of time and compared with data from independent experiments.     

Oxygen incorporation in TiN for metal gate work function tuning with a replacement gate integration approach

In this study, we used oxygen to increase the work function of a TiN gated stack. To prevent the EOT growth associated with oxygen incorporation, we proposed a novel replacement gate flow, where oxygen incorporation by O₂ anneal on a thin TiN layer was performed after dopant activation. With this novel flow, a maximum work function tuning range of ∼0.32 eV was achieved without significant EOT penalty, making it attractive for p-type metal gate integration.     

银纳米线与二氧化硅衬底表面摩擦力的测量

银纳米线是制作纳米光电子器件的理想材料,了解银纳米线与特定衬底间的摩擦特性对于器件的设计和制备工艺具有重要参考价值.本文利用原子力显微镜(AFM)研究银纳米线与二氧化硅衬底表面的摩擦特性,为提高摩擦力测量准确性,依次借助斜面法和横向力曲线分别标定了AFM探针的扭转弹性常数和光杠杆横向灵敏度,同时对扫描器引入的横向误差进行了补偿.利用AFM纳米操纵技术记录了单根银纳米线由静止到整体滑动的全过程,实验测得直径50 nm银纳米线与二氧化硅衬底表面的最大静摩擦线密度和滑动摩擦线密度分别为1.07 nN/nm和0.56 nN/nm.     

Potential difference and photovoltaic effect arising from distortion of the electron wave function in a GaAs quantum well with a thin AlGaAs barrier

This paper discusses changes in the spectrum and distortion of the electron wave function of a GaAs quantum well when a thin AlGaAs barrier is introduced into it. The potential difference generated across the quantum well by distortion of the electron wave function is calculated, along with its dependence on the position of the barrier in the quantum well. The photovoltaic response of the structure to optical intersubband excitations is also calculated, along with the role of wave function and electronic spectrum distortion as well as intersubband nonradiative transitions in generating this response. The suitability of a GaAs quantum well with a thin barrier for use as an infrared detector is considered. Fiz. Tekh. Poluprovodn. 32, 1246–1250 (October 1998)     

The effects of SiO2 barrier between active layer and substrate on the performance and reliability of polycrystalline silicon thin film transistors

We report on the performance and hot carrier stress (HCS) reliability of n-channel and p-channel poly-Si thin film transisters (TFT)s fabricated on SiO₂-coated 1737 glass or bare 1737 glass substrates. Low-pressure chemical vapor deposited (LPCVD) or atmospheric pressure chemical vapor deposited (APCVD) SiO₂ with different thicknesses are used as the impurity diffusion barrier layers. We have found that the performance and HCS reliability of n-TFTs on SiO₂-coated 1737 glass are superior to those of n-TFTs on bare 1737 glass. P-TFTs on SiO₂-coated 1737 glass, on the other hand, are observed to perform better than p-TFTs on bare 1737 glass substrates, however p-TFTs on SiO₂-coated 1737 glass are seen to undergo larger improvements in their OFF current, I_OFF, following the HCS compared to p-TFTs on bare 1737 glass. We also explore the impact of SiO₂ coating thickness on the performance and HCS reliability of the TFTs. The HCS reliability of the TFTs on SiO₂-coated 1737 glass substrates is observed to depend on the SiO₂ coating thickness. This was explained in terms of a phenomenological model which involves impurity and grain boundary traps. The presence of the former type of traps is controlled by the presence or absence of the SiO₂ coating, whereas the grain boundary traps are proposed to be sensitive to compressive and tensile stresses in the SiO₂ coating layer which are, in turn, dependent on the layer's thickness.