High-performance thin-film transistor with 6,13-bis(triisopropylsilylethynyl) pentacene by inkjet printing

We have studied the performance improvement of organic thin-film transistor (OTFT) with a solution based TIPS pentacene (6,13-bis(triisopropylsilylethynyl)pentacene) by inkjet printing. The TIPS pentacene with 1.0 wt.% solution in 1,2-dichlorobenzene was used for printing of an active layer of OTFT. The OTFT printed at room temperature shows a shoulder-like behavior but it disappears for the OTFT printed at the substrate temperature of 60 °C. The OTFT on plastic exhibited an on/off current ratio of ∼10⁷, a threshold voltage of −2.0 V, a gate voltage swing of 0.6 V/decade and a field-effect mobility of 0.24 cm²/Vs in the saturation region.     

Pentacene organic thin-film transistors with solution-based gelatin dielectric

Gelatin is a natural protein in the field of food, pharmaceutical and tissue engineering, which works very well as the gate dielectric for pentacene organic thin-film transistors (OTFTs). An aqueous solution process has been applied to form a gelatin thin film on poly(ethylene terephthalate) (PET) or glass by spin-coating and subsequent casting. The device performance of pentacene OTFTs depend on the bloom number (molecular weight) of gelatin. The pentacene OTFT with 300 bloom gelatin as the gate dielectric in air ambient exhibits the best performance with an average field-effect mobility (μ_FE) value of ca. 16 cm² V^?1 s^?1 in the saturation regime and a low threshold voltage of ?1 V. The high performance of the pentacene OTFT in air ambient is attributed to the water resided in gelatin. The crystal quality of pentacene is not the key factor for the high performance.     

High performance of pentacene organic thin film transistors by doping of iodine on source/drain regions

Contact doping was conducted by iodine in a top contact configuration in a pentacene organic thin film transistor (OTFT), to investigate its effects on contact resistance and the resulting electrical performance. Iodine doping in the pentacene film caused the change of pentacene structure, thus leading to an increase in electrical anisotropy, i.e. ratio of lateral to vertical resistivity. The two resistive components of doped pentacene film underneath the Au contacts were major contributors to the contact resistance, and a model to explain the dependence of contact resistance on iodine doping was presented. Finally, OTFTs fabricated on iodine doped source/drain contacts exhibited high mobility of 1.078 cm²/V s, two times that of OTFTs with undoped contacts, due to the low contact resistance.     

Novel organic inverters with dual-gate pentacene thin-film transistor

We report on the fabrication and characterization of dual-gate pentacene organic thin-film transistors (OTFTs) with plasma-enhanced atomic-layer-deposited (PEALD) 150 nm thick Al₂O₃ as a bottom-gate dielectric and PEALD 200 nm thick Al₂O₃ as a top-gate dielectric. The V_th of dual-gate OTFT has changed systematically with the application of voltage bias to top-gate electrode. When voltage bias from −10 V to 10 V is applied to top gate, V_th changes from 1.95 V to −9.8 V. Two novel types of the zero drive load logic inverter with dual-gate structure have been proposed and fabricated using PEALD Al₂O₃ gate dielectrics. Because the variation of V_th due to chemical degradation and the spatial variation of V_th are inherent in OTFTs, the compensation technology by dual-gate structure can be essential to OTFT applications.     

Thermal analysis of active layer in organic thin-film transistors

This paper reports on the direct thermal observation of the pentacene – based organic thin-film transistors (OTFTs) under the real operating conditions. Liquid crystal (LC) spreading method was utilized for the thermal investigation of an active layer of the OTFT package. Temperature variation in the OTFT package was recorded for the different input power and significant heat generation was observed in the confined active layer. Detailed thermal performance of the OTFT package was projected using a Computational Fluid Dynamics (CFD) method as well. It was shown that the driving of the OTFT package with the drain voltage of ?15 V resulted in the active layer temperature of about 53.2 °C. The result indicates that the device design with effective thermal dissipation is imperative for reliable operation of the OTFT package.     

Effect of active layer thickness on environmental stability of printed thin-film transistor

We have studied the effect of active layer thickness on the performance and environmental stability of the 6,13-bis(triisopropylsilylethynyl) pentacene (TIPS pentacene) thin-film transistor. The organic thin-film transistors (OTFTs) were fabricated by inkjet printing using a solution based TIPS pentacene. To get thick organic semiconductor, the surface of gate insulator was treated with n-octyltrichlorosilane (OTS-C₈) before jetting. The on-currents of the OTFT with ～1 μm active layer decreases a little in air, but the OTFT with 0.05 μm TIPS pentacene shows a significant degradation in drain currents.     

Organic thin-film transistors with bilayer of rubbed and evaporated hydrocarbon-based acene as active layer

We have investigated organic thin-film transistors (OTFTs) with a bilayer of rubbed and evaporated hydrocarbon-based acene 2,7-dioctyl[1]benzothieno[3,2-b][1]benzothiophene (C8-BTBT) as an active layer. Using a rubbing process after spin-coating the C8-BTBT, crystallinity of the C8-BTBT thin film was improved and resultant superior OTFT characteristics were realized. We obtained a field-effect mobility of 1.6 cm²/Vs, a threshold voltage of −8.2 V, an on-off ratio of 10⁶, and a subthreshold swing of 55 mV/decade.     

Improved pentacene device characteristics with sol–gel SiO2 dielectric films

The interfacial interactions between semiconductors and gate dielectrics have a profound influence on the device characteristics of field effect transistors (FETs). This paper reports on the concept of introducing a sol–gel SiO₂ as inorganic capping layer to significantly improve device characteristics of pentacene-based FETs. The smoother film surfaces of sol–gel SiO₂ (1.9 Å root-mean-square) induced larger pentacene grain sizes, and led to hole mobilities of 1.43 cm²/Vs, on–off ratio of 10⁷, and a subthreshold swing of 102 mV/decade when operating at −20 V.     

Hybridization of a low-temperature processable polyimide gate insulator for high performance pentacene thin-film transistors

We have synthesized a novel fully soluble and low-temperature processable polyimide gate insulator (KSPI) through the one-step condensation polymerization of the monomers 5-(2,5-dioxytetrahydrofuryl)-3-methyl-3-cyclohexene-1,2-dicarboxylic anhydride and 4,4-diaminodiphenylmethane. Fully imidized KSPI was found to be completely soluble in organic solvents such as N-methyl-2-pyrrolidone (NMP), dimethylacetamide (DMAc), γ-butyrolactone, dimethylsulfoxide (DMSO), and 2-butoxyethanol. Thin films of KSPI can be fabricated at only 150 °C and a pentacene OTFT with KSPI as a gate dielectric was found to exhibit a field effect mobility of 0.22 cm²/V s. To obtain a high performance organic thin-film transistor (OTFT), the KSPI surface was modified in our new technique by hybridization with a non-polar side chain containing a polyimide insulator (PI). The carrier mobility of a pentacene OTFT with a hybridized polyimide gate insulator (BPI-3) was found to be 0.92 cm²/V s. Our new low-temperature processable polyimides show promise as gate dielectrics for OTFTs.     

Improving the performance of the organic thin-film transistors with thin insulating lithium fluoride buffer layer

The pentacene-based organic thin-film transistors (OTFTs) with a thin insulating lithium fluoride (LiF) buffer layer between the pentacene and source/drain electrodes were fabricated. Compared with conventional OTFTs, the introduction of the buffer layer (1 nm) leads to field-effect mobility increases from 0.16 to 0.5 cm²/Vs, and threshold voltage downshifts from −19 to −8 V for the linear region. The on/off current ratio is improved to a level of 10⁵ for the off-state current decreasing. These improvements are attributed to (i) tunneling injection through the LiF layer and (ii) interface dipole energy barrier decreasing and contact resistance reduction between pentacene and Au. The results demonstrate that it is an effective method to improve the device characteristics by using a buffer layer.     

Fabrication of the flexible pentacene thin-film transistors on 304 and 430 stainless steel (SS) substrate

Flexible organic thin-film transistors (OTFT) were fabricated on 304 and 430 stainless steel (SS) substrate with aluminum oxide as a gate insulator and pentacene as an organic semiconductor. Chemical mechanical polishing (CMP) process was used to study the effect of the SS roughens on the dielectric properties of the gate insulator and OTFT characteristics. The surface roughness was decreased from 33.8 nm for 304 SS and 19.5 nm for 430 SS down to ～2.5 nm. The leakage current of the metal–insulator–metal (MIM) structure (Au/Al₂O₃/SS) was reduced with polishing. Mobility and on/off ratio of pentacene TFT with bare SS showed a wide range of values between 0.005 and 0.36 cm²/Vs and between 10³ and 10⁵ depending on the location in the substrate. Pentacene TFTs on polished SS showed an improved performance with a mobility of 0.24–0.42 cm²/Vs regardless of the location in the substrate and on/off ratio of ～10⁵. With self assembled monolayer formation of octadecyltrichlorosilane (OTS) on insulator surface, mobility and on/off ratio of pentacene TFT on polished SS was improved up to 0.85cm²/Vs and ～10⁶. I–V characteristics of pentacene TFT with OTS treated Al₂O₃/304 SS was also obtained in the bent state with a bending diameter (D) of 24, 45 or 70 mm and it was confirmed that the device performed well both in the linear regime and the saturation regime.     

Natural polyelectrolyte: Major ampullate spider silk for electrolyte organic field-effect transistors

The major ampullate (MA) silk collected from giant wood spiders Nephila pilipes consists of 12% glutamic acid (Glu) and 4% tyrosine (Tyr) acidic amino residues. The MA silk may act as a natural polyelectrolyte for organic field-effect transistors (OFETs). Pentacene and F₁₆CuPc OFETs were fabricated with the MA silk thin film as the gate dielectric. The MA silk thin film with surface roughness of 4 nm and surface energy of 36.1 mJ/m² was formed on glass using a hexafluoroisopropanol (HFIP) organic process. The MA silk gate dielectric in pentacene OFETs may improve the field-effect mobility (μ_FE,sat) value in the saturation regime from 0.11 in vacuum to 4.3 cm² V⁻¹ s⁻¹ in air ambient at ca. 70% RH. The corresponding threshold voltage (V_TH) value reduced from −6 V in vacuum to −0.5 V in air ambient. Similar to other polyelectrolytes, the changes of μ_FE,sat and V_TH may be explained by the generation of electric double layers (EDLs) in the MA silk thin film in air ambient due to water absorption.     

Ultra-thin and graded sliver electrodes for use in transparent pentacene field-effect transistors

The authors report the fabrication of efficient and transparent pentacene field-effect transistors (FETs) using a graded structure of ultra-thin silver (Ag) source and drain (S–D) electrodes. The S–D electrodes were prepared by thermal evaporation with a controlled deposition rate to form Ag layer with a graded structure, leading to a reduced injection barrier and smoothing the contact surface between the electrode and the pentacene channel. The sheet resistance of such Ag electrode was found to be as low as 9 Ω/sq. In addition, a hole-only behavior of device with Ag electrode characterized by current–voltage measurement and conductive atomic-force microscopy shows the injection property of high current flowing as compared with device using Au electrode, resulting in an efficient injection condition existing at the interface of the graded Ag/pentacene. Device characterization indicates the transparent pentacene FET with a graded ultra-thin Ag electrode and organic capping layer of N,N′-di(1-naphthyl)-N,N′-diphenylbenzidine exhibits a high transmission rate of ∼75% in the range of visible light from 400 to 550 nm, a threshold voltage of −6.0 V, an on–off drain current ratio of 8.4 × 10⁵, and a field-effect mobility of 1.71 cm²/V s, thus significantly outperforming pentacene FETs with multilayer oxide electrodes or other transparent thin metal layers.     

Oriented growth of rubrene thin films on aligned pentacene buffer layer and its anisotropic thin-film transistor characteristics

Oriented growth of polycrystalline rubrene thin film on oriented pentacene buffer layer was investigated. The oriented pentacene buffer layer was created by thermal evaporation of pentacene on a rubbed polyvinylalcohol (PVA) surface. The pentacene layer in turn induced the oriented growth of rubrene crystals upon thermal deposition. The structures of successive layers were characterized by using grazing incidence X-ray diffraction (GIXD) and atomic force microscopy. Highly oriented rubrene crystallites with the a-axis aligning along the surface normal and the (0 0 2) plane preferentially oriented 45° away from the rubbing direction were found. In contrast, the rubrene thin film deposited on PVA or rubbed-PVA substrate without a pentacene buffer layer only gave amorphous phases. With the aligned pentacene/rubrene film as the active layer of organic field-effect transistor, anisotropic mobilities were observed. The highest field-effect mobility (0.105 cm²/V s) was observed along the direction 45° away from the rubbing direction and is ∼4 times higher than that for similar device prepared on unrubbed PVA. The direction was consistent with the GIXD observation that a large number of rubrene crystallites are having their [0 0 2] direction aligning in this direction. A favourable C–H⋯π interaction between an oriented pentacene layer and the rubrene layer on the control of molecular orientation in the conduction channel of the OFET is suggested.     

Fully aromatic polyimide gate insulators with low temperature processability for pentacene organic thin-film transistors

This paper demonstrates the effects of the imidization ratio of polyimide gate insulators on the performance of organic thin-film transistors (OTFTs). We report the synthetic results of polyimide films imidized at a temperature of 200 °C along with an easily removed organic base catalyst (1,8-diazabicyclo[5.4.0]undec-7-ene, DBU), and their application in gate insulators of organic thin-film transistors. The degree of imidization increased to almost 100% after a thermal treatment at 200 °C for 40 min in the presence of DBU. The performance of the pentacene OTFT dramatically improved by using low temperature cured polyimide film as the gate insulator.     

Controllable carrier density of pentacene field-effect transistors using polyacrylates as gate dielectrics

We have studied the effect of the chemical structure of dielectrics by evaporating pentacene onto a series of polyacrylates: poly(methylmethacrylate), poly(4-methoxyphenylacrylate), poly(phenylacrylate), and poly(2,2,2-trifluoroethyl methacrylate) in organic thin-film transistors (OTFTs). In top-contact OTFTs, the polyacrylates had a significant effect on field-effect mobilities ranging 0.093 ∼ 0.195 cm² V⁻¹ s⁻¹. This variation neither correlated with the polymer surface morphology nor the observed pentacene crystallite size. This result implies that the PTFMA device generates the local electric field that accumulates holes and significantly shifts the threshold voltage and the turn-on voltage to −8.62 V and 3.5 V, respectively, in comparison with those of PMMA devices.     

Structural and electrical resistivity characteristics of vacuum arc ion deposited zirconium nitride thin films

Zirconium nitride (ZrN) thin films were grown on glass and aluminum substrates using a dual cathodic arc ion deposition technique. The effects of various negative bias voltages and flow ratios of N₂/Ar on the stoichiometric ratio of nitrogen to zirconium (N/Zr), deposition rate, structure, surface morphology and electrical resistivity of the ZrN layer were investigated. Rutherford backscattering spectroscopy measurements indicated a drop in the deposition rate and a slight increase in stoichiometric ratio (N/Zr) with the increase of bias voltage up to −400 V, although the latter still remained slightly less than unity (~0.92). Deposition rate of the film showed an increase with the argon addition. X-ray diffraction patterns depicted mostly polycrystalline nature of the films, with preferential orientation of (2 0 0) planes in the −100 V to −300 V bias voltage range. For 70–50% nitrogen and at a bias voltage of −400 V, the (1 1 1) orientation of ZrN film predominated. The films were smoother at a lower bias of −100 V, while the roughness increased slightly at a higher bias voltage possibly due to (increased) preferential re-sputtering of zirconium-rich clusters/islands. Changes in the resistivity of the films were correlated with stoichiometry, crystallographic orientation and crystalline quality.     

Improving the performance of organic thin-film transistor with a doped interlayer

Top contact organic thin-film transistors (TC OTFTs) based on pentacene are fabricated. For improving the contact characteristics between the organic semiconductor thin-film and gold electrodes, we doped the starburst molecular 4,4′,4″-tris{N,(3-methylpheny)-N-phenylamino}-triphenylamine) (m-MTDATA), which is an excellent hole injection material for the organic light-emitting devices (OLEDs), into the interlayer contact with the electrodes. Compared with conventional TC OTFT, the performances of the organic transistor with the doped interlayer are improved. The field-effect mobility increases from 0.16 to 0.51 cm²/V s, and threshold voltage downshifts from –11 to –2.8 V for the linear region. The on/off current ratio is more than 10⁴ when the gate voltage varies from 0 to –20 V. We ascribe the improvements to the doped interlayer for which the contact resistance is reduced and the hole injection is enhanced.     

Memory effects in hybrid silicon-metallic nanoparticle-organic thin film structures

We report on the electrical behaviour of metal–insulator–semiconductor (MIS) structures fabricated on silicon substrates and using organic thin films as the dielectric layers. These insulating thin films were produced by different methods, including spin-coating (polymethylmethacrylate), thermal evaporation (pentacene) and Langmuir–Blodgett deposition (cadmium arachidate). Gold nanoparticles, deposited at room temperature by chemical self-assembly, were used as charge storage elements. In all cases, the MIS devices containing the nanoparticles exhibited hysteresis in their capacitance versus voltage characteristics, with a memory window depending on the range of the voltage sweep. This hysteresis was attributed to the charging and discharging of the nanoparticles from the gate electrode. A maximum memory window of 2.5 V was achieved by scanning the applied voltage of an Al/pentacene/Au nanoparticle/SiO₂/p-Si structure between 9 and −9 V.     

Effects of thin film processing on pentacene/C60 bilayer solar cell performance

Solar cells based on pentacene/C₆₀ bilayer heterojunctions have been fabricated with a structure of ITO/poly(styrenesulfonate) (PEDOT:PSS)/pentacene (40 nm)/fullerene (C₆₀)(40 nm)/2,9-dimethyl-4,7-diphenyl-1,10-phenanthroline (BCP) (10 nm)/Al. The effect of pentacene crystalline domain size on performance was investigated by controlling the pentacene deposition rate. The devices show improved light-to-electricity conversion efficiencies from 0.49% to 1.12% under an AM 1.5 solar simulator (100 mW/cm²), when the pentacene evaporation rate is in a range of 5 Å/s–0.5 Å/s. Atomic force microscopy (AFM) measurements show that the pentacene films deposited by a slow evaporation rate have larger crystalline domains and a fewer amorphous domains, compared to films obtained by faster evaporation rates. Upon thermal annealing at 200 °C for 1 min, there is merging of pentacene crystalline domains. These changes in film morphology impact the charge separation at the donor/acceptor interface and the hole and electron mobilities, and hence, directly affect the device performance.