A low-phase-noise K-band CMOS VCO

A novel circuit topology for low-phase-noise voltage controlled oscillators (VCOs) is presented in this letter. By employing a PMOS cross-coupled pair with a capacitive feedback, superior circuit performance can be achieved especially at higher frequencies. Based on the proposed architecture, a prototype VCO implemented in a 0.18-/spl mu/m CMOS process is demonstrated for K-band applications. From the measurement results, the VCO exhibits a 510-MHz frequency tuning range at 20GHz. The output power and the phase noise at 1-MHz offset are -3dBm and -111dBc/Hz, respectively. The fabricated circuit consumes a dc power of 32mW from a 1.8-V supply voltage.     

一种应用于低噪声PLL的RF-VCO设计

在PLL电路设计中,压控振荡器设计是电路的关键模块,按类型又主要分为LC震荡器和环形振荡器两种,其性能直接决定了相位噪声、频率稳定度及覆盖范围。文章介绍了一款1.8 GHz的基于交叉耦合对LC结构的低噪声CMOS压控振荡器的设计,并对调谐范围、相位噪声以及电路起振条件等做了分析讨论。该设计采用0.18μm 6层金属CMOS工艺制造,模块面积为0.3 mm2,电路经过Cadence SpectreRF仿真,VCO的输出范围为1 594~2 023 MHz,中心频率1.8 GHz输出时相位噪声为-118 dBc/Hz@600 kHz,1.9 GHz输出时相位噪声为-121 dBc/Hz@600 kHz。结果表明该VCO设计达到了较宽的频率覆盖范围和较低的相位噪声,可以满足低噪声PLL的设计要求。     

A High-Performance CMOS Voltage-Controlled Oscillator for Ultra-Low-Voltage Operations

In this paper, a novel circuit topology of voltage-controlled oscillators (VCOs) suitable for ultra-low-voltage operations is presented. By utilizing the capacitive feedback and the forward-body-bias (FBB) technique, the proposed VCO can operate at reduced supply voltage and power consumption while maintaining remarkable circuit performance in terms of phase noise, tuning range, and output swing. Using a standard 0.18-mum CMOS process, a 5.6-GHz VCO is designed and fabricated for demonstration. Consuming a dc power of 3 mW from a 0.6-V supply voltage, the VCO exhibits a frequency tuning range of 8.1% and a phase noise of -118 dBc/Hz at 1-MHz offset frequency. With an FBB for the cross-coupled transistors, the fabricated circuit can operate at a supply voltage as low as 0.4 V. The measured tuning range and phase noise are 6.4% and -114 dBc/Hz, respectively     

A 20-GHz InP-HBT voltage-controlled oscillator with wide frequencytuning range

This paper presents the design and implementation of a 20-GHz-band differential voltage-controlled oscillator (VCO) using InP heterojunction-bipolar-transistor process technology. Aimed at 20- or 40-Gb/s fiber-optic applications, the design is based on a single-stage feedback amplifier with no intentional L or C. The salient features of the proposed VCO are wide frequency tuning range compared to LC oscillators, and low power consumption and transistor count compared to ring-oscillator counterparts. The implemented VCO has an adjustable frequency range from 13.75 to 21.5 GHz and provides two complementary outputs. Total power consumption at 18.6 GHz is 130 mW, while the phase noise is -90.0 dBc/Hz measured at 1-MHz offset frequency     

An Integrated 5–2.5-GHz Direct-Injection Locked Quadrature LC VCO

This letter presents an integrated direct-injection locked quadrature voltage controlled oscillator (VCO), consisted of a 5-GHz VCO integrated with injection locked LC frequency dividers for low-power quadrature generation. The circuit is implemented using a standard 0.18-mum CMOS process. The differential VCO is a full PMOS Colpitts oscillator, and the frequency divider is performed by adding an injection nMOS between the differential outputs of complementary cross-coupled np-core LC VCO. The measurement results show that at the supply voltage of 1.8-V, the master 5-GHz VCO is tunable from 4.73 to 5.74GHz, and the slave 2.5-GHz VCO is tunable from 2.36 to 2.87GHz. The measured phase noise of master VCO is -118.2dBc/Hz while the locked quadrature output phase noise is -124.4dBc/Hz at 1-MHz offset frequency, which is 6.2dB lower than the master VCO. The core power consumptions are 7.8 and 8.7mW at master and slave VCOs, respectively     

192 GHz push-push VCO in 0.13 /spl mu/m CMOS

A 192 GHz cross-coupled push-push voltage controlled oscillator (VCO) is fabricated using the UMC 0.13 /spl mu/m CMOS logic process. The VCO can be tuned from 191.4 to 192.7 GHz. The VCO provides output power of /spl sim/-20 dBm and phase noise of /spl sim/-100 dBc/Hz at 10 MHz offset, while consuming 11 mA from a 1.5 V supply.     

A Millimeter-Wave CMOS LC-Tank VCO With an Admittance-Transforming Technique

A novel circuit topology suitable for millimeter-wave voltage-controlled oscillators (VCOs) is presented. With the admittance-transforming technique, the proposed VCO can operate at a frequency close to the f_max of the transistors while maintaining remarkable circuit performance in terms of phase noise, tuning range, and output power. Using a standard micrometer CMOS process, a U-band VCO is implemented for demonstration. The fabricated circuit exhibits a frequency tuning range of 1.1 GHz in the vicinity of 50 GHz. The measured output power and phase noise at 1-MHz offset are -11 dBm and -101 dBc/Hz, respectively. Operated at a supply voltage of 1.8 V, the VCO core consumes a DC power of 45 mW.     

Design of 10 GHz eight-phase voltage controlled oscillator in 90 nm CMOS

A novel 10 GHz eight-phase voltage-controlled oscillator(VCO) architecture applied in clock and data recovery(CDR) circuit for 40 Gbit/s optical communications system is proposed.Compared with the traditional eight-phase oscillator,a new ring CL ladder filter structure with four inductors is proposed.The VCO is designed and fabricated in IBM 90nm complementary metal-oxide-semiconductor transistor(CMOS) technology.Measurement results show the tuning range is 9.2 GHz～11.0 GHz and the phase noise of-108.85 dBc/Hz at 1 MHz offset from the carrier frequency of 10 GHz.The chip area of VCO is 500 μm× 685 μm and the power dissipation is 17.4 mW with the 1.2 V supply voltage.     

Theoretical analysis of low phase noise design of CMOS VCO

A theoretical analysis on low phase noise of voltage-controlled oscillators (VCOs) based on complementary cross-coupled LC VCO by 0.35-/spl mu/m complementary metal oxide semiconductor technology is demonstrated. From the procedure of optimization steps, the excess noise factor of the amplifier coming from the active device has been determined. The proposed VCO operates at 2 GHz with phase noise of -116 dBc/Hz at offset frequency 600 kHz. The power consumption is 22.62 mW under 3 V bias with 9.1% frequency tuning. The achievement of low phase noise is also matched with prediction by formula in the frequency domain.     

A V-Band CMOS VCO With an Admittance-Transforming Cross-Coupled Pair

A novel circuit topology suitable for the implementation of CMOS voltage-controlled oscillators (VCOs) at millimeter-wave frequencies is presented in this paper. By employing transmission line segments to transform the admittance of the additional cross-coupled pair, the proposed LC-tank VCO can sustain fundamental oscillation at a frequency close to the $f _{max}$ of the transistors. Using a standard 0.18 $muhbox{m}$ CMOS process, a V-band VCO is realized for demonstration. The fabricated circuit exhibits a frequency tuning range of 670 MHz in the vicinity of 63 GHz. The measured output power and phase noise at 1 MHz offset are $-hbox{15~dBm}$ and $-hbox{89~dBc}/hbox{Hz}$ , respectively. Operated at a 1.8 $~$V supply voltage, the VCO core and the output buffer consume a total DC current of 55 mA.      

A Dual-Band CMOS Voltage-Controlled Oscillator Implemented With Dual-Resonance LC Tank

A new fully integrated, dual-band CMOS voltage controlled oscillator (VCO) is presented. The VCO is composed of n-core cross-coupled Colpitts VCOs and was implemented in 0.18 $mu$m CMOS technology with 0.8 V supply voltage. The circuit allows the VCO to operate at two resonant frequencies with a common LC tank. The VCO has two control inputs, one for continuous control of the output frequency and one for band switching. This VCO is configured with 5 GHz and 12 GHz frequency bands with differential outputs. The dual-band VCO operates in 4.78–5.19 GHz and 12.19–12.61 GHz. The phase noises of the VCO operating at 5.11 and 12.2 GHz are ${-}117.16$ dBc/Hz and ${-}112.15$ dBc/Hz at 1 MHz offset, respectively, while the VCO draws 3.2/2.72 mA and 2.56/2.18 mW consumption at low/high frequency band from a 0.8 V supply.      

Cross-coupled differential oscillator MMICs with low phase-noiseperformance

LC-tank oscillators in the 5~6 GHz frequency range have been designed and implemented in a commercial 0.6 μm GaAs MESFET technology. One is a voltage-controlled oscillator (VCO), and the other is an oscillator without a controlling element. The output frequency range of the VCO is from 5.44 to 6.14 GHz, and the measured phase-noise is -101.67 dBc/Hz at an offset frequency of 600 KHz from the 5.44 GHz carrier. The phase-noise of the 6.44 GHz oscillator is -108 dBc/Hz at an offset frequency of 600 KHz, and the phase-noise curve, in the offset frequency range between 100 KHz and 1 MHz, shows a -20 dB/decade slope. These phase-noise characteristics are comparable to, or better than, those of the reported 5~6 GHz-band CMOS oscillators. To our knowledge, this is the first GaAs MESFET-based oscillator which has a cross-coupled differential topology and a capacitive coupling feedback to suppress the up-conversion of 1/f noise. Also, it is first reported that the GaAs MESFET-based oscillator shows 1/f² phase-noise behavior across the offset frequency range from 100 KHz to 1 MHz     

Millimeter-wave voltage-controlled oscillators in 0.13-/spl mu/m CMOS technology

This paper describes the design of CMOS millimeter-wave voltage controlled oscillators. Varactor, transistor, and inductor designs are optimized to reduce the parasitic capacitances. An investigation of tradeoff between quality factor and tuning range for MOS varactors at 24 GHz has shown that the polysilicon gate lengths between 0.18 and 0.24 /spl mu/m result both good quality factor (>12) and C/sub max//C/sub min/ ratio (/spl sim/3) in the 0.13-/spl mu/m CMOS process used for the study. The components were utilized to realize a VCO operating around 60 GHz with a tuning range of 5.8 GHz. A 99-GHz VCO with a tuning range of 2.5 GHz, phase noise of -102.7 dBc/Hz at 10-MHz offset and power consumption of 7-15mW from a 1.5-V supply and a 105-GHz VCO are also demonstrated. This is the CMOS circuit with the highest fundamental operating frequency. The lumped element approach can be used even for VCOs operating near 100-GHz and it results a smaller circuit area.     

Design and realization of an ultra-low-power low-phase-noise CMOS LC-VCO

A fully integrated cross-coupled LC tank voltage-controlled oscillator(LC-VCO) using transformer feedback is proposed to achieve a low phase noise and ultra-low-power design even at a supply below the threshold voltage. The ultra-low-power VCO is implemented in the mixed-signal and RF 1P6M 0.18-μm CMOS technology of SMIC. The measured phase noise is-125.3 dBc/Hz at an offset frequency of 1 MHz from a carrier of 2.433 GHz,while the VCO core circuit draws only 640μW from a 0.4-V supply.The designed VCO can...     

一款基于65nm CMOS工艺的高效率50GHz 压控振荡器及其电感耦合效应的研究

A 50 GHz cross-coupled voltage controlled oscillator(VCO) considering the coupling effect of inductors based on a 65 nm standard complementary metal oxide semiconductor(CMOS) technology is reported.A pair of inductors has been fabricated,measured and analyzed to characterize the coupling effects of adjacent inductors. The results are then implemented to accurately evaluate the VCO’s LC tank.By optimizing the tank voltage swing and the buffer’s operation region,the VCO achieves a maximum efficiency of 11.4%by generating an average output power of 2.5 dBm while only consuming 19.7 mW(including buffers).The VCO exhibits a phase noise of—87 dBc/Hz at 1 MHz offset,leading to a figure of merit(FoM) of-167.5 dB/Hz and a tuning range of 3.8%(from 48.98 to 50.88 GHz).     

A low-noise, 900-MHz VCO in 0.6-μm CMOS

This paper describes a low-noise, 900-MHz, voltage-controlled oscillator (VCO) fabricated in a 0.6-μm CMOS technology. The VCO consists of four-stage fully differential delay cells performing full switching. It utilizes dual-delay path techniques to achieve high oscillation frequency and obtain a wide tuning range. The VCO operates at 750 MHz to 1.2 GHz, and the tuning range is as large as 50%. The measured results of the phase noise are -101 dBc/Hz at 100-kHz offset and -117 dBc/Hz at 600-kHz offset from the carrier frequency. This value is comparable to that of LC-based integrated oscillators. The oscillator consumes 10 mA from a 3.0-V power supply. A prototype frequency synthesizer with the VCO is also implemented in the same technology, and the measured phase noise of the synthesizer is -113 dSc/Hz at 100-kHz offset     

A 0.35-/spl mu/m CMOS 2-GHz VCO in wafer-level package

This letter presents a complementary metal oxide semiconductor (CMOS) voltage-controlled oscillator (VCO) with a high-Q inductor in a wafer-level package for the LC-resonator. The on-chip inductor is implemented using the redistribution metal layer of the wafer-level package (WLP), and therefore it is called a WLP inductor. Using the thick passivation and copper metallization, the WLP inductor has high quality-factor (Q-factor). A 2-nH inductor exhibits a Q-factor of 8 at 2 GHz. The center frequency of the VCO is 2.16 GHz with a tuning range of 385 MHz (18%). The minimum phase noise is measured to be -120.2 dBc/Hz at an offset frequency of 600 kHz. The dc power consumed by the VCO-core is 1.87 mW with a supply voltage of 1.7 V and a current of 1.1 mA. The output power with a 50-/spl Omega/ load is -12.5/spl plusmn/1.3 dBm throughout the whole tuning range. From the best of our knowledge, compared with recently published 2-GHz-band 0.35 /spl mu/m CMOS VCOs in the literature, the VCO in this work shows the lowest power consumption and the best figure-of-merit.     

A 5.9-GHz voltage-controlled ring oscillator in 0.18-/spl mu/m CMOS

This paper presents the design of three- and nine-stage voltage-controlled ring oscillators that were fabricated in TSMC 0.18-/spl mu/m CMOS technology with oscillation frequencies up to 5.9 GHz. The circuits use a multiple-pass loop architecture and delay stages with cross-coupled FETs to aid in the switching speed and to improve the noise parameters. Measurements show that the oscillators have linear frequency-voltage characteristics over a wide tuning range, with the three- and nine-stage rings resulting in frequency ranges of 5.16-5.93 GHz and 1.1-1.86 GHz, respectively. The measured phase noise of the nine-stage ring oscillator was -105.5 dBc/Hz at a 1-MHz offset from a 1.81-GHz center frequency, whereas the value for the three-stage ring oscillator was simulated to be -99.5 dBc/Hz at a 1-MHz offset from a 5.79-GHz center frequency.     

CMOS低相位噪声压控振荡器的设计

基于65 nm CMOS标准工艺库,设计了一个工作频率在10 GHz的具有低相位噪声的CMOS电感电容型压控振荡器。该压控振荡器选用CMOS互补交叉耦合型电路结构,采用威尔逊型尾电流源负反馈技术来降低相位噪声。仿真结果表明,此压控振荡器工作频率覆盖范围为9.9~11.2 GHz,调谐范围为12.3%,中心频率为10.5 GHz,在频率偏移中心频率1 MHz下的相位噪声为-113.3 dBc/Hz,核心功耗为2.25 mW。     

Time-based frequency band selection method for phase-locked loops

High-performance phase-locked loops (PLLs) often require voltage-controlled oscillators (VCOs) employing both discrete and continuous tuning mechanisms to satisfy a wide frequency range and a low VCO tuning gain simultaneously. An auxiliary circuit is required to facilitate the selection among a group of discrete bands. An agile technique to search for an optimum VCO frequency band is proposed. The search is based on measuring the period difference between a reference and the VCO-divided signals. The VCO band selection circuit is implemented with a 10 GHz PLL in a 0.18 /spl mu/m CMOS process and consumes only an extra 3 mA. The band selection time is less than 4 /spl mu/s.