60 GHz low-noise high-electron-mobility transistors

The noise performance of 0.25 ?m-gate-length high-electron-mobility transistors at frequencies up to 62 GHz is reported. A room-temperature extrinsic transconductance gm of 480 mS/mm and a maximum frequency of oscillation fmax of 135 GHz are obtained for these transistors. At 30 and 40 GHz the devices exhibit minimum noise figures of 1.5 and 1.8 dB with associated gains of 10.0 and 7.5 dB, respectively. A minimum noise figure as low as 2.7 dB with an associated gain of 3.8 dB has also been measured at 62 GHz. This is the best noise performance ever reported for HEMTs at millimetre-wave frequencies. The results clearly demonstrate the potential of short-gate-length high-electron-mobility transistors for very low-noise applications for frequencies at least up to V-band.     

Ultra-low-noise, high-impedance preamp for cryogenic detectors

A preamplifier design is presented which is based on a common-drain JFET input. The midband noise performance is En = 0.42 nV/Hz?, In = 2.8 fA/Hz?. The circuit has considerably less input capacitance than comparably noisy common-source amplifiers. It is particularly useful for preamplification of 0.1 to 10 MHz signals from liquid-helium-cooled radiation detectors.     

An analytic model for high-electron-mobility transistors

A new analytic model is developed for the output I–V characteristics and microwave-signal parameters of High Electron Mobility Transistors (HEMTs). In this model, the empirical formula suggested by Giblin et al. is used to approach the behavior of electron drift velocity vs electric field. The resulting I–V curves are in excellent agreement with experimental data. In order to predict the microwave performance of these devices, this model is also used to calculate the small-signal parameters, transconductance and gate capacitance, which are then used to estimate f_T, the frequency of unity current gain.     

Parasitic source and drain resistance in high-electron-mobility transistors

The parasitic source and drain resistances of a high-electron-mobility transistor were analyzed in terms of a two layer transmission line model. The analysis showed that a highly conductive cap layer can function as an extension of the alloyed contact provided that tunneling between the cap layer and the channel is significant. The tunneling between the cap layer and the channel was analyzed in terms of a thermionic-field emission model in which a one dimensional time-dependent WKB transmission probability for the barrier was considered as well as Maxwell-Boltzman statistics for the tunneling carrier distribution. The GaAs cap, GaAlAs layer and 2-DEG channel can then be treated as a distributed resistance element with a characteristic coupling length. A reduction of the parasitic resistance can be obtained for a device structure with a short characteristic coupling length even if there exists an ideal alloyed contact to the 2-DEG channel. A multilayer cap consisting of an undoped GaAs layer inserted between the n-type GaAs and n-type GaAlAs is also proposed to reduce the barrier height for tunneling between the cap layer and the channel. The multilayer cap structure is predicted to appreciably reduce the parasitic resistance at room temperature and still be effective at 77 K.     

High-frequency admittance of high-electron-mobility transistors (HEMTs)

By solving the wave equation of the high-electron-mobility-transistor by an approximation method, the input admittance Y_gs = g_gs + jωC_gs of the device is evaluated. The input conductance g_gs plays a role in the calculation of the minimum noise figure of the device at high frequencies.     

High-speed frequency dividers using GaAs/GaAlAs high-electron-mobility transistors

Very-high-speed divide-by-four circuits have been fabricated by using modulation-doped GaAs/GaAlAs high-electron-mobility transistors. The circuits consist of two T-connected D-flip-flops and are capable of operating at 3.6 GHz with a power dissipation of 0.46 mW per gate at room temperature, and at 5.2 GHz with a power dissipation of 0.78 mW per gate at 77 K. The speed-power products achieved are the lowest ever reported.     

Role of stress voltage on structural degradation of GaN high-electron-mobility transistors

In GaN high-electron-mobility transistors, electrical degradation due to high-voltage stress is characterized by a critical voltage at which irreversible degradation starts to take place. Separately, cross-sectional TEM analysis has revealed significant crystallographic damage for severely degraded devices. Furthermore, a close correlation between the degree of drain current degradation and material degradation has been reported. However, the role of the critical voltage in physical degradation has not been explored. In this work, we investigate the connection between electrical degradation that occurs around and beyond the critical voltage and the formation of crystallographic defects through detailed electrical and TEM analysis, respectively. We find that a groove in the GaN cap starts to be generated around the critical voltage. At higher voltages, a pit develops that penetrates into the AlGaN barrier. The size of the pit increases with stress voltage. We also observe a good correlation between electrical and material degradation.     

Nonalloyed ohmic contacts for high-electron-mobility transistors based on AlGaN/GaN heterostructures

A microwave field-effect transistor with nonalloyed ohmic contacts is fabricated using the technique of regrowing a heavily doped region under the contact metallization by molecular beam epitaxy through a preliminarily formed dielectric mask. The fabricated field-effect transistor with a gate length of 0.18 µm and a total width of 100 µm has a current–amplification cutoff frequency of 66 GHz and ohmic contact resistivity of 0.15-0.18 Ω mm.     

High density 2DEG in III-V semiconductor heterostructures and high-electron-mobility transistors based on them

Situation in high-electron-mobility transistor (HEMT) technology is discussed. The N-AlGaAs/InGaAs/GaAs pseudomorphic HEMT’s are now considered as most advanced for mmwave monolithic circuits, but metamorphic N-In_xAl_1−x As/In_yGa_1−y As/In_xAl_1−x As HEMT’s grown on GaAs substrates are very promising for the future high-frequency devices. High density 2DEG in HEMT’s is analyzed by means of the Hall effect and photoluminescence measurements. Processing technology of the sub-0.25-μm pseudomorphic HEMT’s, metamorphic HEMT’s and their characteristics are also described. Fiz. Tekh. Poluprovodn. 33, 1064–1065 (September 1999) This article was published in English in the original Russian journal. Reproduced here with stylistic changes by the Translation Editor.     

Noise parameters and light sensitivity of low-noise high-electron-mobility transistors at 300 and 12.5 K

The four noise parameters of cryogenically cooled HEMT's have been investigated. Two different HEMT structures, with and without spacer layer were tested. The noise parameters of both structures were similar at the room temperature, while they were dramatically different at cryogenic temperatures. The minimum noise temperatures measured at 8.4 GHz were 75 ± 5 K at the room temperature and 8.5 ± 1.5 K at the temperature of 12.5 K. The cryogenic performance is the best ever observed for field-effect transistors.     

Carrier multiplication in submicrometre pMOS transistors operated at cryogenic temperatures

The temperature and bias dependence of the carrier multiplication M(I/sub bulk//I/sub drain/) in submicrometre pMOS transistors has been characterised and studied over the temperature range of 30-300 K. In addition, a model which reproduces the bias dependence of M over the measured range of temperature can be extrapolated down to 4.2 K to predict the internal bulk potential and its related 'kink effect'. The agreement between data and the prediction of the model confirms that the gate voltage and temperature dependence of the mean free path plays the key role in determining the carrier multiplication characteristics of submicrometre pMOS transistors, operating in the temperature range of 4.2-300 K.<>     

Proposed size-effect high-electron-mobility transistor

We present a theoretical analysis of a high-electron-mobility transistor that uses the quantum size-effect to increase the energy gap of a thin InSb film that forms the channel of the device. The analysis is based on a considerable amount of available data. The device is predicted to have a cut-off frequency of the order of 439 GHz for a gate length of 0.5 μm. It is predicted to have a very high transconductance of 2.4 S per mm gate width, and a very high power handling capability of 1.4 A per mm gate width at a drain-to-source voltage of only 0.083 V, and it operates at 300 K.     

Ultra-low-noise and wideband-tuned optical receiver synthesis anddesign

A new general optical receiver design method based on the synthesis of optimum noise-matching networks is presented. It is based on the noise figure concept in conjunction with broadband matching theory. The design is accurate because it directly utilizes the active device noise parameters, such as minimum noise figure, noise resistance, and optimum source impedance, which are readily available at microwave frequencies. The analysis has established the general noise-matching requirements of the tuning network that result in the minimum obtainable equivalent input noise current and the fundamental noise limit in tuned receivers. Synthesis procedures are described that can closely satisfy the general noise-matching requirements, which has led to a new low pass filter-type matching network with ultra-broadband characteristics that also approach the fundamental noise limit. The design principles are verified, with an experimental 10 Gb/s PIN-HEMT optical receiver that demonstrates a bandwidth of 6.3 GHz with a gain flatness of ±0.8 dB over the entire frequency range and a measured average noise current of 5 pA/√(Hz)     

Noise effects in bipolar junction transistors at cryogenic temperatures: Part II

In Part II of this investigation, a characterization of the output noise current generator i0of modern planar bipolar junction transistors (BJT's) for common-base configuration with the input ac open circuited is developed and verified at temperatures ranging from 60 to 300 K. It is shown that at low temperatures, for those devices where recombination processes in the emitter-base space-charge region become very pronounced, the resulting noise for these processes shows less than full shot noise. This noise reduction can show up at temperatures slightly below room temperature for such devices. (Generation-recombination effects described in Part I may still become important at temperatures below 110 K.) Also, it is demonstrated that an important parameter to monitor in taking these measurements, at least at low temperatures, is the alpha cutoff frequency fα if the low-frequency theory is to be realized.     

Noise effects in bipolar junction transistors at cryogenic temperatures: Part I

Part I of this investigation involves theoretical and experimental characterization of the noise performance of modern silicon planar bipolar junction transistors (BJT's) above the 1/f noise frequency region in a temperature range of 60-300 K and for several difference bias conditions. At temperatures below approximately 110 K, an excess noise source as measured by the equivalent noise resistance RN, referred to the input of the device, common-base configuration, is revealed. This excess source, resulting from a generation-recombination process within the base region of the device, is shown to have a linear dependence on the base current and base resistance as KIB²rb'b², and an exponential dependence on temperature.     

Ultra-low-noise readout integrated circuit for uncooled microbolometers

A low-noise readout architecture for uncooled microbolometer focal plane arrays is described. A 40times30 uncooled microbolometer focal plane array based on the low-noise ROIC was implemented on silicon using a 0.5 mum CMOS technology. Total output noise voltage is 260 V RMS. Experimental values of voltage responsivities of 3.98 10⁵ V/W on average at 1 Hz modulation frequency have been achieved.     

Temperature dependence of apparent threshold voltage of silicon MOS transistors at cryogenic temperatures

Measurements of apparent threshold voltages for conduction of bothn-p-nandp-n-pMOS-     

Ultra-low-noise indium-phosphide MMIC amplifiers for 85-115 GHz

This paper describes a high-performance indium-phosphide monolithic microwave integrated circuit (MMIC) amplifier, which has been developed for cooled application in ultra-low-noise imaging-array receivers. At 300 K, the four-stage amplifier exhibits more than 15-dB gain and better than 10-dB input and output return loss from 80 to 110 GHz. The room-temperature noise figure is typically 3.2 dB, measured between 90-98 GHz. When cooled to 15 K, the gain increases to more than 18 dB and the noise figure decreases to 0.5 dB. Only one design pass was required to obtain very good agreement between the predicted and measured characteristics of the circuit. The overall amplifier performance is comparable to the best ever reported for MMIC amplifiers in this frequency band     

Extraction of terahertz emission from a grating-coupled high-electron-mobility transistor

In a grating-coupled high-electron-mobility transistor,weak terahertz emission with wavelength around 400μm was observed by using a Fourier-transform spectrometer.The absolute terahertz emission power was extracted from a strong background blackbody emission by using a modulation technique.The power of terahertz emission is proportional to the drain-source current,while the power of blackbody emission has a distinct relation with the electrical power.The dependence on the drain-source bias and the gate voltage suggests that the terahertz emission is induced by accelerated electrons interacting with the grating.