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1.
A single-phase fast transient converter topology with stepping inductance is proposed. The stepping inductance method is implemented by replacing the conventional inductor in a buck converter by two inductors connecting in series. One has large inductance and the other has small inductance. The inductor with small inductance will take over the output inductor during transient load change and speed up dynamic response. In steady state, the large inductance takes over and keeps a substantially small ripple current and minimizes root mean square loss. It is a low cost method applicable to converters with an output inductor. A hardware prototype of a 1.5-V dc-dc buck converter put under a 100-A transient load change has been experimented upon to demonstrate the merit of this approach. It also serves as a voltage regulator module and powers up a modern PC computer system  相似文献   

2.
The slew rate of the inductor current is limited by the inductance value and the voltage across the inductor. In a buck converter, when the controller is saturated, the voltage across the inductor during a step-up load transient is $V_{rm in}-V_{rm out}$, while during a step-down load transient, it is $-V_{rm out}$. Thus, a buck converter with a large conversion ratio offers asymmetrical step-up and step-down transients. Since the rate of fall of the inductor current is much slower than the rate of rise of the inductor current, the step-down transient lasts longer than the step-up transient for the same change in the load current. The step-down slew rate can be increased by reducing the inductance, but it results in higher inductor current ripple, and hence, higher losses in the power converters. In this paper, we present a novel topology for improving the step-down load transients without reducing the inductance value. The scheme operates only during load transients and restores to the normal operating conditions during steady-state operation. It provides reduced voltage overshoots and faster settling times in output voltage during such transients. The proposed scheme is tested on a 1-V/12-A buck converter switching at 1 MHz, and the experimental results are presented.   相似文献   

3.
This paper presents a high efficiency, high switching frequency DC–DC buck converter in AlGaAs/GaAs technology, targeting integrated power amplifier modules for wireless communications. The switch mode, inductor load DC–DC converter adopts an interleaved structure with negatively coupled inductors. Analysis of the effect of negative coupling on the steady state and transient response of the converter is given. The coupling factor is selected to achieve a maximum power efficiency under a given duty cycle with a minimum penalty on the current ripple performance. The DC–DC converter is implemented in 0.5 μm GaAs p-HEMT process and occupies 2 × 2.1 mm2 without the output network. An 8.7 nH filter inductor is implemented in 65 μm thick top copper metal layer, and flip chip bonded to the DC–DC converter board. The integrated inductor achieves a quality factor of 26 at 150 MHz. The proposed converter converts 4.5 V input to 3.3 V output for 1 A load current under 150 MHz switching frequency with a measured power efficiency of 84%, which is one of the highest efficiencies reported to date for similar current/voltage ratings.  相似文献   

4.
This paper proposes a boost converter with coupled inductors and a buck-boost type of active clamp. In the converter, the active-clamp circuit is used to eliminate the voltage spike that is induced by the trapped energy in the leakage inductor of the coupled inductors. The active switch in the converter can still sustain a proper duty ratio even under high step-up applications, reducing voltage and current stresses significantly. Moreover, since both main and auxiliary switches can be turned on with zero-voltage switching, switching loss can be reduced, and conversion efficiency therefore can be improved significantly. A 200 W prototype of the proposed boost converter was built, from which experiment results have shown that efficiency can reach as high as 92% and surge can be suppressed effectively. It is relatively feasible for low-input-voltage applications, such as fuel cell and battery power conversion.  相似文献   

5.
A new ZVS-PWM full-bridge converter   总被引:4,自引:0,他引:4  
A full-bridge converter which employs a coupled inductor to achieve zero-voltage switching of the primary switches in the entire line and load range is described. Because the coupled inductor does not appear as a series inductance in the load current path, it does not cause a loss of duty cycle or severe voltage ringing across the output rectifier. The operation and performance of the proposed converter is verified on a 670 W prototype.  相似文献   

6.
A new three-level soft-switched converter   总被引:1,自引:0,他引:1  
A three-level, constant-frequency, isolated converter which employs a coupled inductor to achieve zero-voltage switching of the primary switches in the entire line and load range is described. Because the coupled inductor does not appear as a series inductance in the load current path, it does not cause a loss of duty cycle or severe voltage ringing across the output rectifiers. The operation and performance of the proposed converter was verified on a 1-kW prototype.  相似文献   

7.
Historically, buck converters have relied on high-Q inductors on the order of 1 to 100 muH to achieve a high efficiency. Unfortunately, on-chip inductors are physically large and have poor series resistances, which result in low-efficiency converters. To mitigate this problem, on-chip magnetic coupling is exploited in the proposed stacked interleaved topology to enable the use of small (2 nH) on-chip inductors in a high-efficiency buck converter. The dramatic decrease in the inductance value is made possible by the unique bridge timing of the stacked design that causes magnetic coupling to boost the converter's efficiency by reducing the current ripple in each inductor. The magnetic coupling is realized by stacking the two inductors on top of one another, which not only lowers the required inductance, but also reduces the chip area consumed by the two inductors. The measured conversion efficiency for the prototype circuit, implemented in a 130-nm CMOS technology, shows more than a 15% efficiency improvement over a linear converter for low output voltages rising to a peak efficiency of 77.9 % for a 0.9 V output. These efficiencies are comparable to converters implemented with higher Q inductors, validating that the proposed techniques enable high-efficiency converters to be realized with small on-chip inductors.  相似文献   

8.
Today's voltage regulator (VR) for the microprocessor requires a current loop to achieve adaptive voltage positioning and phase current sharing. A fundamental limitation, current loop sample hold effect, limits the control bandwidth to be pushed beyond 1/6 of the switching frequency. This paper reveals the limitation of the control bandwidth of a two-phase buck converter using peak current control scheme. The limitation can be overcome by coupling the two output inductors. A new small signal model is proposed to study the sample hold effect in coupled-inductor implementations. The relationship between the coupling coefficient and the sample hold effect is then discussed. Based on these understandings, a strongly coupled two-phase buck converter has double the bandwidth of the noncoupled VR; and this is experimentally verified  相似文献   

9.
This paper analyzes the fundamental limitations of the buck converter for high-frequency, high-step-down dc-dc conversion. Further modification with additional coupled windings in the buck converter yields a novel topology, which significantly improves the efficiency without compromising the transient response. An integrated magnetic structure is proposed for these windings so that the same magnetic cores used in the buck converter can be used here as well. Furthermore, it is easy to implement a lossless clamp circuit to limit the device voltage stress and to recover inductor leakage energy. This new topology is applied for a 12V-to-1.5V/25A voltage regulator module (VRM) design. At a switching frequency of 2MHz, over 80% full-load efficiency is achieved, which is 8% higher than that of the conventional buck converter.  相似文献   

10.
提出了一种应用于48 V-1 V系统的隔离型混合模式降压变换器,利用飞电容和变压器实现高转换比应用下的高转换效率。混合变换器结合了开关电容变换器和开关电感变换器,其中飞电容承担了部分电压降,实现了功率开关管电压应力的降低。由于开关节点处的电压摆幅较小,开关损耗随之减小;通过使用更低压的功率开关管,实现功率开关管导通损耗减小。在此基础上,隔离型混合模式降压变换器通过时序控制可以实现软开关,进而实现功率开关管开关损耗减小,使得整体效率提升。在隔离型混合模式降压变换器中,飞电容还具有隔直电容的作用,可以防止变压器偏磁。在典型应用下,即在48 V输入电压、1 V输出电压、500 kHz开关频率下,峰值效率为94.84%。  相似文献   

11.
An integrated zero-voltage-switching (ZVS) DC–DC converter with continuous input current and high voltage gain is proposed. The proposed converter can operate with soft switching, a continuous inductor current and fixed switching frequency. The voltage stress of the power switches is relatively low compared to the output voltage. Moreover, soft-switching characteristic of the proposed converter reduces switching loss of active power switches and raise the conversion efficiency. The reverse-recovery problem of output rectifiers is also alleviated by controlling the current changing rates of diodes with the use of the leakage inductance of a coupled inductor. The operation and performance of the proposed DC–DC converter were verified on an 115?W experimental prototype operating at 100?kHz.  相似文献   

12.
The design and analysis of a fully integrated multistage interleaved synchronous buck dc-dc converter with on-chip filter inductor and capacitor is presented. The dc-dc converter is designed and fabricated in 0.18 mum SiGe RF BiCMOS process technology and generates 1.5 V-2.0 V programmable output voltage supporting a maximum output current of 200 mA. High switching frequency of 45 MHz, multiphase interleaved operation, and fast hysteretic controller reduce the filter inductor and capacitor sizes by two orders of magnitude compared to state-of-the-art converters and enable a fully integrated converter. The fully integrated interleaved converter does not require off-chip decoupling and filtering and enables direct battery connection for integrated applications. This design is the first reported fully integrated multistage interleaved, zero voltage switching synchronous buck converter with monolithic output filters. The fully integrated buck regulator achieves 64% efficiency while providing an output current of 200 mA.  相似文献   

13.
Four-switch buck–boost (FSBB) converter features low-voltage stress across the power switches and positive output voltage. They have two active power switches and two synchronous rectifiers, so two freedoms, i.e., the duty cycles of the two active switches, are available to regulate the output voltage. This paper proposes a two-edge modulation (TEM), in which the two active switches are trailing-edge and leading-edge modulated, respectively. Thus, the inductor current ripple can be reduced. Furthermore, a 3-mode TEM is derived to reduce the root-mean-square value of the inductor current to reduce the conduction loss. The line range is divided into three regions, and FSBB operates at boost, buck–boost, and buck modes in the lower, medium, and higher input voltage regions, respectively. At buck and boost modes, only two switches are high-frequency switched, so that the total switching loss is reduced. In the buck–boost mode, the inductor current ripple is very low compared with other two modes. Hence, the switching frequency is lowered to reduce the switching loss. The 3-mode TEM can achieve high efficiency over the line range, which is verified by a 48-V (36–75 V) input, 48-V @ 6.25-A output prototype. The measured efficiency is higher than 96.5% over the line range and the efficiency at the nominal input voltage is 97.8%.   相似文献   

14.
The study presents a high-gain closed-loop configuration of switched-coupled-inductor switched-capacitor (SCISC) converter via integrating with a pulse-width-modulation-based (PWM) controller for the goal of step-up DC-DC conversion/regulation. The SCISC power part consists of switched-coupled-inductor booster (SCI booster) and switched-capacitor tripler (SC tripler), and the step-up voltage gain is performed by using appropriate duty ratio D of PWM and turn ratio n of coupled inductor. Although increasing n or raising D makes a higher gain, it often results in the larger weight/volume or magnetic bias/saturation of coupled inductor. Here, the SC tripler can provide for an extra gain to ease these stresses of the coupled inductor. Further, this controller is engaged not merely in doing topological operation and timing, but in enhancing output regulation and/or output robustness (against source/loading variation). The related studies are demonstrated as follows: modelling, steady-state response, voltage conversion ratio value, power efficiency, capacitance/inductance selection, system stability and control design. At the end, the simulation results are obtained to check the design/analysis validity, and the experimental results are verified on the prototype of SCISC to display the effect of the proposed scheme.  相似文献   

15.
This paper introduces a new method and system for parameter extraction and automated controller adjustment, suitable for low power digitally controlled DC-DC switch-mode power supplies (SMPS). The system allows closed-loop calibration throughout regular converter operation. During a short-lasting test phase, SMPS parameters, such as output capacitance and load, are estimated by examining the amplitude and frequency of intentionally introduced limit cycle oscillations in duty ratio control variable as well as from its steady state value. Accordingly, a digital compensator is automatically constructed to provide fast dynamic response and good output voltage regulation. In addition, the load estimation data are used for improving efficiency of a converter having segmented transistors. It is performed through a selection of driving sequence resulting in minimized sum of switching and conduction losses. The effectiveness of the system is demonstrated on an experimental 400 kHz, 9 V-to-3.3 V, 10 W, digitally controlled synchronous buck converter.  相似文献   

16.
A thermoelectric generator (TEG) efficiency booster with buck–boost conversion and power management is proposed as a TEG battery power conditioner suitable for a wide TEG output voltage range. An inverse-coupled inductor is employed in the buck–boost converter, which is used to achieve smooth current with low ripple on both the TEG and battery sides. Furthermore, benefiting from the magnetic flux counteraction of the two windings on the coupled inductor, the core size and power losses of the filter inductor are reduced, which can achieve both high efficiency and high power density. A power management strategy is proposed for this power conditioning system, which involves maximum power point tracking (MPPT), battery voltage control, and battery current control. A control method is employed to ensure smooth switching among different working modes. A modified MPPT control algorithm with improved dynamic and steady-state characteristics is presented and applied to the TEG battery power conditioning system to maximize energy harvesting. A 500-W prototype has been built, and experimental tests carried out on it. The power efficiency of the prototype at full load is higher than 96%, and peak efficiency of 99% is attained.  相似文献   

17.
To ensure the current sharing among the interleaved phases, the peak-current control is widely used in the voltage regulator (VR) applications. Meanwhile, to save the cost and footprint by reducing the output capacitance, high control bandwidths are mandatory. Because of the sample-hold effect in the peak-current loop, there exist stringent challenges to the high-bandwidth designs for VRs. In this paper, the influence from the sample-hold effect is investigated to clarify the difference between the VR and conventional applications. After that, two approaches for higher bandwidth are introduced. To decrease the phase delay due to the sample-hold related double poles, excessive external ramps are inserted to the modulators. To increase the effective sampling frequency, the phase inductor currents are coupled, either by the coupled-inductor structure or through the feedback control. In addition, a small-signal model including the sample-hold effect is derived for the coupled-inductor buck to explain the improvement. High-bandwidth designs are verified by the simulation and experimental results. A bandwidth of one-third switching frequency is demonstrated with a coupled-inductor VR.  相似文献   

18.
A soft-switching bidirectional DC–DC converter is presented herein as a way to improve the conversion efficiency of a photovoltaic (PV) system. Adoption of coupled inductors enables the presented converter not only to provide a high-conversion ratio but also to suppress the transient surge voltage via the release of the energy stored in leakage flux of the coupled inductors, and the cost can kept down consequently. A combined use of a switching mechanism and an auxiliary resonant branch enables the converter to successfully perform zero-voltage switching operations on the main switches and improves the efficiency accordingly. It was testified by experiments that our proposed converter works relatively efficiently in full-load working range. Additionally, the framework of the converter intended for testifying has high-conversion ratio. The results of a test, where a generating system using PV module array coupled with batteries as energy storage device was used as the low-voltage input side, and DC link was used as high-voltage side, demonstrated our proposed converter framework with high-conversion ratio on both high-voltage and low-voltage sides.  相似文献   

19.
An interleaved boost converter with coupled inductors and switched capacitors is proposed in this paper. The switched capacitors are used to realize the inherent voltage-double function that increases the voltage gain and reduces the voltage stress of the switch greatly. Therefore, the low-conduction resistance and low-voltage-rated switches can be applied to improve the efficiency of this topology. Moreover, the load current can automatically be equally shared by each phase as a consequence of the switched capacitors adopted in the output stage. Active clamp circuits are applied for the interleaved two phases to recycle the leakage energy and absorb the voltage spikes caused by the leakage inductance. Both the main and the clamping switches are zero-voltage transition (ZVT) switches during the whole switching transition that reduce the switching losses. The current falling rates of the clamping diodes and output diodes are controlled by the leakage inductance so that the diode reverse-recovery problem is alleviated. The experimental results are shown to verify the effectiveness of the theoretical analysis based on a 48- to- 380-V dc/dc prototype.   相似文献   

20.
《Electronics letters》2008,44(17):1029-1030
A novel zero voltage switching (ZVS) isolated converter is presented. The output voltage doubler is used on the output side to achieve the boost type of voltage conversion ratio. Active-clamping technique is adopted to realise the ZVS turn-on of all switches. The proposed circuit has no large output inductor such that the adopted circuit has a simpler structure, lower cost and no effective duty loss. Finally experimental results based on a 300 W prototype are provided to verify the effectiveness of the proposed converter.  相似文献   

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