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1.
《Microwave and Wireless Components Letters, IEEE》2009,19(12):819-821
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《Microwave and Wireless Components Letters, IEEE》2009,19(11):722-724
3.
采用标准的0.13μm CMOS工艺实现了0.5V电源电压,3GHz LC压控振荡器。为了适应低电压工作,并实现低相位噪声,该压控振荡器采用了NMOS差分对的电压偏置振荡器结构,去除尾电流,以尾电感代替,采用感性压控端,增加升压电路结构使变容管的一端升压,这样控制电压变化范围得到扩展。测试结果显示,当电源电压为0.5V,振荡频率为3.126GHz时,在相位噪声为-113.83dBc/Hz@1MHz,调谐范围为12%,核心电路功耗仅1.765mW,该振荡器的归一化品质因数可达-186.2dB,芯片面积为0.96mm×0.9mm。 相似文献
4.
A subthreshold low power, low phase-noise voltage controlled oscillator (VCO) is demonstrated in a commercial 0.18 mum CMOS process. In subthreshold regime, MOS drain current is dominated by diffusion mechanism resulting in a high ratio of transconductance to drain current and suppressed phase noise. Therefore, low power and low phase noise characteristics are achieved without using nonconventional high passive components. The VCO measures a phase noise of -106 dBc/Hz at 400 kHz offset from 2.63 GHz oscillation frequency with 0.43 mW power dissipation drawn from 0.45 V power supply. Figures of merit for this VCO (power-frequency-normalized of 12 dB and power frequency-tuning-normalized of -10 dB) are among the best reported for CMOS oscillators. 相似文献
5.
采用SMIC 65 nm标准CMOS工艺,设计了一种新型的低功耗电容电感压控振荡器(LC VCO)。采用幅度监测负反馈技术,保证振荡器正常启动并且工作于C类工作状态,最大程度地增加输出摆幅。与常规C类电容电感压控振荡器不同,采用电流复用技术可以在保证性能不变的情况下使VCO的功耗下降50%。后仿真结果表明,在1.2 V电源电压下,该压控振荡器的功耗为1.1 mW,相位噪声为-123 dBc/Hz @1 MHz,FOM为190,振荡频率范围为2.3~2.6 GHz,可调谐范围为12%。 相似文献
6.
Hou J.-A. Chang C.-P. Su J. Liou T.-S. Wong S.-C. Wang Y.-H. 《Microwave and Wireless Components Letters, IEEE》2007,17(1):64-66
A novel voltage controlled oscillation (VCO) topology using 90-m CMOS technology is demonstrated. The common-source PMOS single transistor integrated with an inductor leads to negative resistance for the VCO that minimizes the transistor size and decreases the flicker noise sources. To our knowledge, the topology of the core VCO is the most compact configuration ever reported. The fabricated VCO consumes 6.26mW with a supply voltage of 1 V and has a 1.68times1.41 mm2 chip area, including the ESD protection circuit. At 1.77 GHz, PMOS VCO features an output power in the range of -5.2 dBm, and exhibits a phase noise of -94 dBc/Hz at the offset frequency of 300 kHz and -107 dBc/Hz at 1MHz 相似文献
7.
This paper presents a switched self‐biasing and a tail current‐shaping technique to suppress the 1/f noise from a tail current source in differential cross‐coupled inductance‐capacitance (LC) voltage‐controlled oscillators (VCOs). The proposed LC VCO has an amplitude control characteristic due to the creation of negative feedback for the oscillation waveform amplitude. It is fabricated using a 0.13 µm CMOS process. The measured phase noise is ‐117 dBc/Hz at a 1 MHz offset from a 4.85 GHz carrier frequency, while it draws 6.5 mA from a 0.6 V supply voltage. For frequency tuning, process variation, and temperature change, the amplitude change rate of the oscillation waveform in the proposed VCO is 2.1 to 3.2 times smaller than that of an existing VCO with a fixed bias. The measured amplitude change rate of the oscillation waveform for frequency tuning from 4.55 GHz to 5.04 GHz is 131 pV/Hz. 相似文献
8.
提出了一种低电压超低功耗动态锁存比较器。采用了自适应双重衬底偏压技术,在适当时间将比较器进行顺向衬底偏压与零衬底偏压的切换,以取得功耗延时积(PDP)的优势最大化。为解决比较器不工作时静态功耗较大的问题,提出了一种关断结构。该比较器基于SMIC 180 nm CMOS工艺,在400 mV电源电压下进行了前仿真。前仿真结果表明,电路的平均功耗、响应时间、功耗延时积均显著下降。在时钟频率为14.7 MHz时,响应时间为34 ns,功耗为123 nW。 相似文献
9.
给出了基于0.25μm CMOS工艺的数字电视调谐芯片中宽带低噪声LC VCO的设计,通过对VCO谐振网络的优化设计,显著抑制了flick噪声对相位噪声的影响,使三个波段的VCO的相位噪声有了明显改善,文中重点讨论了中波段VCO谐振网络的设计方法并给出中波段的相位噪声的仿真和测试结果。结果显示在中波段偏移中心频率10k处的相噪能改善5~10dBc,整个中波段相位噪声低于-85dBc/Hz@10kHz,频率覆盖190~530MHz。 相似文献
10.
作为收发器的重要模块,与其他收发器模块相比,压控振荡器(VCO)消耗了大量能源。由于许多射频应用系统采用电池作为能源,如WiFi、蓝牙及物联网等系统,因此,在保持合理的系统性能的前提下,需尽量降低功耗。该文研究了标准VCO结构的性能,并提出了一种新的CMOS VCO电路结构。与传统的CMOS VCO相比,该文提出的CMOS VCO只需较少的外部偏置电流便可产生更高的跨导,因而可以消耗更低的功耗。在1.8 V电压供电下,该文提出的VCO仅消耗了2.9 mW,取得了-124.3 dBc/Hz@1 MHz的相位噪声。 相似文献
11.
《Microwave and Wireless Components Letters, IEEE》2008,18(10):695-697
This letter presents a new quadrature voltage-controlled oscillator (QVCO). The LC-tank QVCO consists of two first-harmonic injection-locked oscillators (ILOs). The outputs of one ILO are injected to the gates of the tail transistors on the other ILO and vice versa so as to force the two ILOs operate in quadrature. The proposed CMOS QVCO has been implemented with the TSMC 0.18 mum CMOS technology and the die area is 0.582 times 0.972 mm2. At the supply voltage of 1.0 V, the total power consumption is 8.0 mW. The free-running frequency of the QVCO is tunable from 5.31 GHz to 5.75 GHz as the tuning voltage is varied from 0.0 V to 1.0 V. The measured phase noise at 1 MHz offset is -120.01 dBc/Hz at the oscillation frequency of 5.31 GHz and the figure of merit (FOM) of the proposed QVCO is about -185.48 dBc/Hz. 相似文献
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提出了一种低压低相位噪声的C类VCO电路。低压条件下,基于振幅反馈环的C类VCO存在振幅小、相位噪声差的问题,可以通过移除尾电流源、增加低通滤波器等方式来改善相位噪声。基于SMIC 0.18 μm CMOS工艺,采用Cadence Spectre EDA软件对VCO进行仿真。结果表明,当载波频率为2.27 GHz时,在1 MHz频偏处VCO的相位噪声为-126 dBc/Hz,在供电电压为0.9 V时,功耗仅为2.5 mW,FOM值为-189 dBc/Hz。 相似文献
14.
超低相位噪声LC压控振荡器的设计 总被引:2,自引:0,他引:2
研制出了超低相位噪声压控振荡器,在保证调谐范围的前提下,采取各种措施有效降低了压控振荡器的相位噪声.设计的压控振荡器采用普通环氧板材,表面贴装工艺,国际标准封装,成本低、人工调试量小,适合规模生产.结果表明该产品的频率为796~857 MHz,调谐带宽61 MHz,调谐电压1.8~4.5 V,调谐灵敏度22.5 MHz/V,相位噪声达到-115 dBc/Hz@10 kHz,产品已达到国际各大同类产品的水平. 相似文献
15.
《Microwave and Wireless Components Letters, IEEE》2009,19(12):816-818
16.
Tawfik S.A. Kursun V. 《Very Large Scale Integration (VLSI) Systems, IEEE Transactions on》2009,17(5):638-645
Employing multiple supply voltages (multi- VDD) is an effective technique for reducing the power consumption without sacrificing speed in an integrated circuit (IC). In order to transfer signals among the circuits operating at different voltage levels specialized voltage interface circuits are required. Two novel multi-threshold voltage (multi-Vth) level converters are proposed in this paper. The new multi-Vth level converters are compared with the previously published circuits for operation at different supply voltages. When the circuits are individually optimized for minimum power consumption, the proposed level converters offer significant power savings of up to 70% as compared to the previously published circuits. Alternatively, when the circuits are individually optimized for minimum propagation delay, the speed is enhanced by up to 78% with the proposed voltage interface circuits in a 0.18- mum TSMC CMOS technology. 相似文献
17.
采用Jazz0.18μm RF CMOS工艺设计并实现应用于MB-OFDM超宽带频率综合器的4.224GHz电感电容正交压控振荡器。通过解析的方法给出了电感电容正交压控振荡器的模型,并推导出简洁的公式解释了相位噪声性能与耦合因子的关系。测试结果显示,核心电路在1.5V电源电压下,消耗6mA电流,频率调谐范围为3.566~4.712GHz;在主频频偏1MHz处的相位噪声为-119.99dBc/Hz,对应的相位噪声的FoM(Figure-of-Merit)为183dB;I、Q两路信号等效的相位误差为2.13°。 相似文献
18.
Jong-Phil Hong Seok-Ju Yun Nam-Jin Oh Sang-Gug Lee 《Microwave and Wireless Components Letters, IEEE》2007,17(4):298-300
This letter presents a backgate coupled quadrature voltage-controlled oscillator (QVCO) which consists of a pair of current reused LC-VCOs. The proposed QVCO is designed for 2-GHz operation based on a 0.18-mum triple-well CMOS technology. Measurements show -102 and -124dBc/Hz at 100-kHz and 1-MHz offset, respectively. Compared to the conventional QVCO, the proposed QVCO dissipates significantly lower power (1.74mA from a 1.25-V supply) while showing good 1/f3 close-in phase noise 相似文献
19.
设计了一种应用于单片CMOS超高频射频识别阅读器中的低功耗、低相位噪声LC VCO。根据超高频射频识别阅读器的系统架构和协议要求,对本振相位噪声要求做出详细讨论;采用LC滤波器和低压差调压器分别对尾电流源噪声和电源噪声进行抑制,提高了VCO相位噪声性能。电路采用IBM 0.18μm RF CMOS工艺实现,电源电压3.3 V时,偏置电流为4.5 mA,中心频率为1.8 GHz,在频偏1 MHz处,相位噪声为-136.25 dBc/Hz,调谐范围为30%。 相似文献
20.
介绍了一种适用于UHF RFID(Radio Frequency Identification)阅读器的低相位噪声压控振荡器(VCO)电路.通过在传统的VCO电路中加入抑制电源噪声的regulator并在共模端加入平衡滤波电路对尾电流源的二次谐波分量进行抑制来降低1/f3区域的相位噪声,同时选取合适的电感值及其Q值使得VCO在1/f2区域也能获得较佳的相位噪声性能.同时,文中给出了本设计中使用的低噪声基准源电路.整个电路采用UMC0.18 μm MM/RF CMOS工艺实现,仿真与测试结果显示所提出的VCO结构和传统VCO相比几乎在所有区域内对相噪声均有5 dB的改善.本设计使用的电源电压为3.3 V,VCO中心频率为1.8 GHz,调谐范围约为11%,频偏1MHz处相位噪声约为-127 dBc/Hz,总电流约为7.2 mA. 相似文献