Conformal aluminum oxide coating of high aspect ratio structures using metalorganic chemical vapor deposition

The metalorganic chemical vapor deposition of aluminum oxide has been studied over a wide process parameter range. Electrical properties of as-grown and annealed layers have been investigated using planar aluminum/aluminum oxide/silicon capacitors. The best processing conditions resulted in a leakage current of 10 nA/cm² at an equivalent oxide thickness of 3.6 nm. In addition, the film conformality was evaluated on silicon trench structures with aspect ratios of up to 60. Excellent step coverage of over 90% (thickness at trench bottom to thickness at trench middle) was achieved at temperatures below 400 °C and a pressure of 100 Pa. After annealing the electrical properties of these layers, analyzed on planar test structures, were comparable to the results obtained at higher deposition temperature.     

Surface modification of high aspect ratio structures with fluoropolymer coatings using chemical vapor deposition

Initiated chemical vapor deposition (iCVD) was used to coat the internal surfaces of high aspect ratio capillary pore membranes and silicon trenches with poly(1H,1H,2H,2H-perfluorodecyl acrylate) (PPFDA). The presence of the fluoropolymer coating along the pore walls of the membranes was confirmed using X-ray photoelectron microscopy, electron microprobe analysis, and contact angle measurements. The results of this study demonstrate that the iCVD process can be used to conformally coat high aspect ratio microstructures (up to 80:1) with organic polymers.     

On the photoluminescence of multilayer arrays of silicon rich oxide with high silicon content prepared by low pressure chemical vapor deposition

The photoluminescence emission of multilayer structures composed of layers of silicon rich oxide with high silicon content and layers of silicon rich oxide with low silicon content obtained by low pressure chemical vapor deposition is here presented. Different parameters for the preparation of the multilayers have been varied such as the Si concentration and the thicknesses of the layers. Additionally, the samples were oxidized at different temperatures. For all samples the photoluminescence seems to have the same origin: defects in the oxide matrix and defects at the interfaces between the Si nanocrystals. The structural and compositional properties of the multilayer structures are discussed.     

A systematic study of DRIE process for high aspect ratio microstructuring

Various MEMS devices like Accelerometers, Resonators, RF- Filters, Micropumps, Microvalves, Microdispensers and Microthrusters are produced by removing the bulk of the substrate materials. Fabrications of such Microsystems requires the ability to engineer precise three-dimensional structures in the silicon substrate. Fabrication of MEMS faces multiple technological challenges before it can become a commercially viable technology. One key fabrication process required is the deep silicon etching for forming high aspect ratio structures. There is an increasing interest in the use of dry plasma etching for this application because of its anisotropic etching behavior, high etch speed, good uniformity and profile control, high aspect ratio capabilities without having any undesired secondary effects i.e. RIE lags, Loading, microloading, loosing of anisotropic nature of etching as aspect ratio increases, micro-grass and even etch stalling. Developing a DRIE micro-machining process requires a thorough understanding of all plasma parameters, which can affect a silicon etching process and their use to suppress the secondary effects. In this paper our intention is to investigate the influence of etching gas flow, etching gas pressure, passivation gas pressure, ICP coil power, Platen power and etch and passivation time sequence on etch rate and side wall profile. Parameter ramping is a powerful technique used to achieve the requirements of high aspect ratio microstructures (HARMS) for MEMS applications by having high etch rate with good profile/CD control. The results presented here can be used to rationally vary processing parameters in order to meet the microstructural requirements for a particular application.     

Multiscale analysis of silicon carbide-chemical vapor deposition process

A kinetic study, which was performed by using multi-scale (a macro and a micro-scale) analysis, is presented in order to determine the reaction mechanism of the chemical vapor deposition (CVD) of silicon carbide (SiC) from CH3SiCl3 (MTS)/H2 gaseous mixture. The multi-scale analysis provides two well-defined reaction fields, corresponding to the flat substrates placed in a hot wall reactor and micro trenches on the substrate surface, with centimeter and submicron characteristic length scales, respectively. The microcavity method is a micro-scale analysis used to study the relative contributions of gas-phase and surface reactions to the SiC growth, and to determine the sticking probability of growth species in CVD reaction systems. From the macro-scale analysis, activation energy of the growth rate was estimated to be 43.0 kcal/mol at the up-stream part and the sticking probability was estimated to be 9.5 x 10(-7) at 1273 K and 6.8 x 10(-6) at 1373 K. On the other hand, we examined a sticking probability (eta) and the reaction mechanism by using the microcavity method. From the micro-scale analysis, we found that at least two growth species, a stable intermediate 1 (eta 1, = 1.3 x 10(-3) at 1273 K and 4.5 x 10(-3) at 1373 K) and a highly active intermediate 2 (eta 2 = 2.0 x 10(-1) at 1273 K and 5.4 x 10(-1) at 1373 K), are formed as byproducts of the gas-phase reaction. Activation energy of the sticking probability was 43.9 kcal/mol in the case of the intermediate 1 and 34.5 kcal/mol in the case of the intermediate 2. We could also confirm that the source precursor, MTS, was not the film growth species. Another analytical model based on Monte Carlo simulations correlates the film profile in the microcavity to the sticking probability of the deposition species. The combination of these two analysis techniques presents an overall picture of the reaction scheme.     

Hot-wire chemical vapor deposition for epitaxial silicon growth on large-grained polycrystalline silicon templates

We investigate low-temperature epitaxial growth of thin silicon films by HWCVD on Si [1 0 0] substrates and polycrystalline template layers formed by selective nucleation and solid phase epitaxy (SNSPE). We have grown 300-nm thick epitaxial layers at 300 °C on silicon [1 0 0] substrates using a high H₂:SiH₄ ratio of 70:1. Transmission electron microscopy confirms that the films are epitaxial with a periodic array of stacking faults and are highly twinned after approximately 240 nm of growth. Evidence is also presented for epitaxial growth on polycrystalline SNSPE templates under the same growth conditions.     

Synthesis of silicon carbide nanotubes by chemical vapor deposition

Silicon carbide nanotubes (SiCNTs) were directly synthesized by chemical vapor deposition (CVD) in the paper. Methyltrichlorosilane (MTS) was selected as the SiC gaseous source and, ferrocence and thiophene as the catalyst and the cocatalyst, respectively. The influences of reaction temperature, contents of catalyst and cocatalyst, and content of gaseous source on the morphologies of the products were investigated, respectively. The products were identified by high-resolution transmission electron microscopy (HRTEM), scanning electron microscopy (SEM), X-ray diffraction (XRD), and energy-dispersive X-ray (EDX), respectively. The synthesis of SiCNTs by CVD suggested a condition-dependent process. Novel SiCNTs, with 20 approximately 80 nm in outer diameter and 15 approximately 35 nm in inner diameter, respectively, were observed. The wall structure similar to that of carbon nanotubes was not found for the SiCNTs.     

Optimization of silicon nanocrystals growth process by low pressure chemical vapor deposition for non-volatile memory application

The processes of silicon nanocrystals (Si-NCs) growth on both SiO₂ and Si₃N₄ substrates by low pressure chemical vapor deposition have been systematically investigated. A two-step process was adopted for Si-NCs growth: nucleation at a high temperature (580-600 °C) and growth at a low temperature (550 °C). By adjusting the pre-deposition waiting time and deposition time, the density, size and uniformity can be effectively controlled. Compared to the growth of Si-NCs on SiO₂, the coalescence speed of Si-NCs on Si₃N₄ is faster. Uniform Si-NCs with a high density of 1.02 × 10¹² cm^− 2 and 1.14 × 10¹² cm^− 2 have been obtained on SiO₂ and Si₃N₄, respectively. Finally, a Si-NCs-based memory structure with a 2.1 V memory window was demonstrated.     

Hot-wire chemical vapor deposition of epitaxial film crystal silicon for photovoltaics

We have demonstrated that hot-wire chemical vapor deposition (HWCVD) is an excellent technique to produce high-quality epitaxial silicon at high rates, at substrate temperatures from 620 to 800 °C. Fast, scalable, inexpensive epitaxy of high-quality crystalline Si (c-Si) in this temperature range is a key element in creating cost-competitive film Si PV devices on crystalline seed layers on inexpensive substrates such as display glass and metal foil. We have improved both the quality and rate of our HWCVD Si epitaxy in this display-glass-compatible T range. We understand factors critical to high-quality epitaxial growth and obtain dislocation densities down to 6 × 10⁴ cm⁻² by techniques that reduce the surface oxygen contamination at the moment growth is initiated. We have also developed and validated a model of the HWCVD silicon growth rate, based on fundamentals of reaction chemistry and ideal gas physics. This model enables us to predict growth rates and calculate the sticking coefficient of the Si radicals contributing to film formation between 300 and 800 °C. We obtain efficiencies up to 6.7% with a 2.5-micron absorber layer grown on heavily-doped ‘dead’ Si wafers although these cells still lack hydrogenation and light trapping. Open-circuit voltages up to 0.57 V are obtained on 2-μm cells. Efficient film crystal silicon photovoltaics will require dislocation spacing more than 6 times the cell thickness, or else effective H passivation of the dislocations.     

A comparison of microcrystalline silicon prepared by plasma-enhanced chemical vapor deposition and hot-wire chemical vapor deposition: electronic and device properties

The optoelectronic properties of undoped μc-Si : H have been investigated, with emphasis on the states close to the edges of the band gap. The usefulness of the constant photocurrent method (CPM) for the determination of the absorption coefficient, α(E), is critically described. Combined with carefully evaluated photothermal deflection spectroscopy data, CPM spectra yield valuable information on the transport and dynamics of photo-generated carriers. By comparing photoluminescence and Raman spectra on high-quality samples prepared by plasma-enhanced and hot-wire chemical vapor deposition, with different silane concentrations in the gas stream, a correlation between the microstructure and photoluminescence energy is obtained. It is proposed that the density of band tail states is reduced with increasing silane concentration, leading to an increase in the photoluminescence energy and in the open-circuit voltages of solar cells.     

Carbonized tantalum catalysts for catalytic chemical vapor deposition of silicon films

Catalytic chemical vapor deposition (Cat-CVD) has been demonstrated as a promising way to prepare device-quality silicon films. However, catalyst ageing due to Si contamination is an urgency to be solved for the practical application of the technique. In this study, the effect of carbonization of tantalum catalyst on its structure and performance was investigated. The carbonized Ta catalyst has a TaC surface layer which is preserved over the temperature range between 1450 and 1750 °C and no Si contamination occurs on the catalyst after long-term use. Si film prepared using the carbonized Ta catalyst has a similar crystal structure to that prepared by uncarbonized Ta catalyst. Formation of the TaC surface layer can alleviate the ageing problem of the catalyst, which shows great potential as a stable catalyst for Cat-CVD of Si films.     

Transient stages in the chemical vapor deposition of silicon carbide

Transient CVD experiments were simulated by varying continuously the deposition temperature or the initial gas flow rates (Q(MTS) or Q(H2)). Their consequences on the physicochemical properties of the coatings have been first examined. The adhesion of SiC/SiC bilayers containing these "transient interphases" (phi(Tr)) was investigated by scratch testing. For transient stages resulting from a decrease of Q(MTS) or T, free silicon can be co-deposited in proportions depending on alpha = Q(H2)/Q(MTS), T and P. This phenomenon is related to the high reactivity of the Si bearing species and is activated by high T and P and low a values. In this case, the continuous covalent bonding through the Si-rich interphases preserves the adhesion between the two SiC layers. Transient stages resulting from a decrease of Q(H2) lead first to larger and columnar SiC grains and finally to the deposition of anisotropic carbon, due to the formation of unsaturated hydrocarbons in the gas phase. The interphases with the highest carbon concentrations and thicknesses lead to delamination and local chipping of the outer SiC layer. The poor shear strength of these continuous and anisotropic layers is detrimental to the adherence of the bilayers.     

Fabrication of high aspect ratio silicon micro-tips for field emission devices

The evolution of higher order {221} and {331} crystal planes during corner undercutting in the anisotropic etching of (100) silicon is discussed, and the occurrence of highly vertical (72.5°) {311} planes unique to KOH etches are demonstrated. Using a combined etching technique, very high aspect ratio micro-tips are formed and their distinct advantages for vacuum microelectronics and field-emission devices (FED) are described. This revised version was published online in November 2006 with corrections to the Cover Date.     

Modified method of plasma-enhanced chemical vapor deposition of nanocrystalline silicon

A modified plasma-enhanced chemical vapor deposition technology is developed for nanocrystalline Si which combines the standard rf glow discharge method and the hollowcathode discharge method in a single process cycle. The volume fraction of nanocrystallites varied monotonically along the layer, whereas their size remained constant. The electrical and optical characteristics of these films were investigated. Pis’ma Zh. Tekh. Fiz. 24, 26–30 (October 12, 1998)     

Hot-wire chemical vapor deposition of silicon nanoparticles on fused silica

Silicon nanoparticles on fused silica have potential as recombination centers in infrared detectors due quantum confinement effects that result in a size dependent band gap. Growth on fused silica was realized by etching in HF, annealing under vacuum at 700-750 °C, and cooling to ambient temperature before ramping to the growth temperature of 600 °C. Silicon particles could not be grown in a thermal chemical vapor deposition (CVD) process with adequate size uniformity and density. Seeding fused silica with Si adatoms in a hot-wire chemical vapor deposition (HWCVD) process at a disilane pressure of 1.1 × 10^− 5 Pa followed by thermal CVD at a disilane pressure of 1.3 × 10^− 2 Pa, or direct HWCVD at a disilane pressure of 2.1 × 10^− 5 Pa led to acceptable size uniformity and density. Dangling bonds at the surface of the as-grown nanoparticle were passivated using atomic H formed by cracking H₂ over the HWCVD filament.     

Ultrafast deposition of silicon nitride and semiconductor silicon thin films by hot wire chemical vapor deposition

The technology of Hot Wire Chemical Vapor Deposition (HWCVD) or Catalytic Chemical Vapor Deposition (Cat-CVD) has made great progress during the last couple of years. This review discusses examples of significant progress. Specifically, silicon nitride deposition by HWCVD (HW-SiN_x) is highlighted, as well as thin film silicon single junction and multijunction junction solar cells. The application of HW-SiN_x at a deposition rate of 3 nm/s to polycrystalline Si wafer solar cells has led to cells with 15.7% efficiency and preliminary tests of our transparent and dense material obtained at record high deposition rates of 7.3 nm/s yielded 14.9% efficiency. We also present recent progress on Hot-Wire deposited thin film solar cells. The cell efficiency reached for (nanocrystalline) nc-Si:H n-i-p solar cells on textured Ag/ZnO presently is 8.6%. Such cells, used in triple junction cells together with Hot-Wire deposited proto-Si:H and plasma-deposited SiGe:H, have reached 10.9% efficiency. Further, in our research on utilizing the HWCVD technology for roll-to-roll production of flexible thin film solar cells we recently achieved experimental laboratory scale tandem modules with HWCVD active layers with initial efficiencies of 7.4% at an aperture area of 25 cm².     

Introduction of zirconium oxide in a hardmask concept for highly selective patterning of scaled high aspect ratio trenches in silicon

The fabrication of high aspect ratio silicon trenches (critical dimension < 100 nm, aspect ratio > 10:1) by dry etch processing has proven to be a challenge mainly due to limited etch selectivity of conventional hardmask materials to Si. Moreover, for future technology nodes the hardmask thickness will be limited by the thickness of the photoresist. This work focuses on a concept to enable the usage of very thin resist layers (< 100 nm) for patterning of silicon trenches by the integration of an unconventional hardmask stack consisting of SiO₂ and ZrO₂. Deposition of such material films has been investigated, as well as e-beam lithography exposure and finally pattern transfer by dry etching. Using this hardmask stack and 100 nm thin resist, the fabrication of 35 nm wide trenches with an aspect ratio of ~ 20:1 is demonstrated revealing a very high selectivity (> 100:1) of the ZrO₂ layer to Si during the deep silicon etch. A silicon etch rate > 1.5 μm/min was achieved. The ZrO₂ layer itself provides the main selectivity improvements of the final hardmask stack.     

Fluidized bed chemical vapor deposition of silicon on carbon nanotubes for Li-ion batteries

Silicon was deposited on balls of entangled multi-walled carbon nanotubes (CNT) with a mean diameter of several hundreds of microns, by Fluidized Bed Chemical Vapor Deposition from silane (SiH4). The weight total percentage of deposited silicon was between 30 and 70%, to test their efficacy in Li-ion battery anodes. TEM and SEM imaging revealed that silicon deposits were of the form of nanoparticles uniformly dispersed on the whole CNT surface. The diameter of these nanoparticles increases with the deposited silicon percentage from 18 to 36 nm whereas their density remains constant at 5 10(22) nanoparticles/g of CNT. This indicates a low affinity of chemical species born from silane pyrolysis with the CNT surface for nucleation. The increase of the silicon nanoparticles diameter leads to the decrease of the specific surface area and the porous volume of the balls, probably due to the filling of the pores of the CNT network by silicon. A slight increase of the mean diameter of the balls was observed for the two highest silicon percentages, certainly due to the ability of the CNT network to be deformed under the mechanical stress induced by the silicon nanoparticles growth.     

Hot-wire chemical vapor deposition of high hydrogen content silicon nitride for solar cell passivation and anti-reflection coating applications

The stoichiometry and hydrogen content of hot-wire (HW)-grown silicon nitride was examined as a function of SiH₄/NH₃ flow ratio. The effect of post-deposition hydrogenation treatment on overall film hydrogen content was determined. The hydrogen release properties in Si-rich and N-rich nitride layers were characterized by annealing treatments. Defect hydrogenation was studied using Fourier transform infrared spectroscopy on platinum-diffused silicon substrates. HW nitride layers were deposited onto diffused emitter String Ribbon silicon substrates, producing cells with comparable short circuit current density, open circuit voltage, fill-factor, and efficiency to those fabricated using plasma chemical vapor deposition nitride layers.