Marked graphs and hamiltonian graphs

In this paper we present an algorithm using a sign incidence matrix to enumerate all the subsets of places of a marked graph which are both siphon and trap, whose input transitions equal the output transitions and where both of them equal the set of all transitions. An iterative procedure to find a set of places in a marked graph whose removal ensures the resulting marked graph does not have a subset of places which are both siphon and trap, is given. This iterative procedure employs a siphon-trap matrix. As an application, using the algorithm given earlier, we have obtained all Hamiltonian circuits of a given directed graph. We have also found the minimal feedback edge set of a given directed graph. A characterization for Hamiltonian graphs is obtained in terms of siphons and traps.     

A unified domination approach for reliability analysis of networkswith arbitrary logic in vertices

The concept of a probabilistic graph G has been used as a universal model for network reliability. Most of the literature on this subject concentrates on computing various reliability measures (such as k-terminal reliability or all-terminal reliability) which are the probability that vertices of G can communicate with other specified vertices. Primarily, this paper provides a common theoretical framework for addressing k-terminal reliability problems. To this end, it extends the model admitting vertex functions of G to be arbitrary monotone Boolean functions: in this case G is called a monotone (S,t)-graph. In such graphs the signal passability across a node is carried out in accordance with collections of signals delivered on the node inputs from other ones, the collections are subjected to some logic principle realized by a Boolean function. Monotone (S,t)-graphs include all known classes of directed multi-terminal network reliability models. The main result of this paper is the reliability expression for computing the probability of an acyclic monotone (S,t)-graph G being operational. The expression uses the local domination parameters introduced here. That reduces the system level of consideration to the element level, providing a unifying understanding of the combinatorial nature of some results based on the domination theory and developed earlier for ordinary networks     

The L(2,1)-labeling and operations of graphs

Motivated by a variation of the channel assignment problem, a graph labeling analogous to the graph vertex coloring has been presented and is called an L(2,1)-labeling. More precisely, an L(2,1)-labeling of a graph G is a function f from the vertex set V(G) to the set of all nonnegative integers such that |f(x)-f(y)| /spl ges/ 2 if d(x,y)=1 and |f(x)-f(y)| /spl ges/ 1 if d(x,y) = 2. The L(2,1)-labeling number /spl lambda/(G) of G is the smallest number k such that G has an L(2,1)-labeling with max{f(v):v/spl isin/V(G)}=k. A conjecture states that /spl lambda/(G) /spl les/ /spl Delta//sup 2/ for any simple graph with the maximum degree /spl Delta//spl ges/2. This paper considers the graphs formed by the Cartesian product and the composition of two graphs. The new graph satisfies the conjecture above in both cases(with minor exceptions).     

A New Algorithm for the Reliability Analysis of Multi-Terminal Networks

In a probabilistic network, source-to-multiple-terminal reliability (SMT reliability) is the probability that a specified vertex can reach every other vertex. This paper derives a new topological formula for the SMT reliability of probabilistic networks. The formula generates only non-cancelling terms. The non-cancelling terms in the reliability expression correspond one-to-one with the acyclic t-subgraphs of the network. An acyclic t-subgraph is an acyclic graph in which every link is in at least one spanning rooted tree of the graph. The sign to be associated with each term is easily computed by counting the vertices and links in the corresponding subgraph. Overall reliability is the probability that every vertex can reach every other vertex in the network. For an undirected network, it is shown the SMT reliability is equal to the overall reliability. The formula is general and applies to networks containing directed or undirected links. Furthermore link failures in the network can be s-dependent. An algorithm is presented for generating all acyclic t-subgraphs and computing the reliability of the network. The reliability expression is obtained in symbolic factored form.     

一种计算Ad hoc网络K-终端可靠性的线性时间算法

研究计算Ad hoe网络K-终端可靠性的线性时间算法,可以快速计算Ad hoe网络K-终端可靠性。为了计算Ad hoe网络分级结构尽终端可靠性,可以采用无向概率图表示Ad hoe网络的分级结构。每个簇头由已知失效率的结点表示,并且当且仅当两个簇相邻时,两个结点间的互连由边表示。这个概率图的链路完全可靠,并且已知结点的失效率。此图的K-终端可靠性为给定K-结点集是互连的概率。文中提出了基于合适区间图计算尽终端可靠性的一种线性时间算法。本算法可用来计算Ad hoe网络的K-终端可靠性。其时间复杂度为O（｜V｜＋｜E｜）。     

Enumeration of pathsets of reliability graphs by repeated indexing

Two algorithms have been proposed for the enumeration of pathsets of complex reliability graphs. In algorithm-1, the indices of the connection matrix and higher order row vectors are repeatedly made and subsequently used in each step of matrix operation for the enumeration of pathsets of reliability graphs. In algorithm-2, the indices of the connection matrices are made and used subsequently, each time after every node removal step. In both algorithms, multiplications that are 100% useless are eliminated, thereby saving a substantial amount of CPU time. Both the algorithms have been elucidated by suitable example illustrations. To justify the effectiveness of these algorithms, they have been implemented in computer programs which enumerate pathsets much faster in comparison to existing algorithms.     

有向图上k步可达查询处理

给定一个有向图,一个k步可达查询u→?kv用来回答在该图中是否存在一条从顶点u到顶点v且长度不大于k的有向路径。k步可达查询是一种基本的图操作并在过去十年间被广泛地研究。已有的k步可达查询算法仍存在许多弊端,例如不可达查询效率低,索引规模大和索引构建时间长等。本文针对上述问题提出了2种优化方法,分别是基于互逆拓扑序号以及基于等价顶点的图压缩方法.前者提高了不可达查询的效率,后者减少了索引规模和索引构建时间。实验结果表明,本文提出的方法可以有效地处理k步可达查询,并支持大规模数据的处理。     

穿墙雷达中基于最小生成树的建筑物内部结构重构技术

本文旨在通过穿墙雷达图像对建筑物内部结构进行重构,提出了一种利用图理论中的最小生成树(Minimum Spanning Tree,MST)对建筑物结构进行重构的方法.文中基于建筑物内部墙-墙-地板构成的三面角给出了建筑物布局图模型,并定义了节点集合和边集合,随后给出了图当中任意两个节点之间所连边的权重定义.最后,利用MST方法对建筑物内部结构进行重构,仿真结果和暗室测量结果验证了该方法的有效性.     

Identifying and locating-dominating codes: NP-completeness results for directed graphs

Let G=(V, A) be a directed, asymmetric graph and C a subset of vertices, and let B/sub r//sup -/(v) denote the set of all vertices x such that there exists a directed path from x to v with at most r arcs. If the sets B/sub r//sup -/(v) /spl cap/ C, v /spl isin/ V (respectively, v /spl isin/ V/spl bsol/C), are all nonempty and different, we call C an r-identifying code (respectively, an r-locating-dominating code) of G. In other words, if C is an r-identifying code, then one can uniquely identify a vertex v /spl isin/ V only by knowing which codewords belong to B/sub r//sup -/(v), and if C is r-locating-dominating, the same is true for the vertices v in V/spl bsol/C. We prove that, given a directed, asymmetric graph G and an integer k, the decision problem of the existence of an r-identifying code, or of an r-locating-dominating code, of size at most k in G, is NP-complete for any r/spl ges/1 and remains so even when restricted to strongly connected, directed, asymmetric, bipartite graphs or to directed, asymmetric, bipartite graphs without directed cycles.     

Graph theory for FPGA minimum configurations

A traditional bottom-up modeling method for minimum configuration numbers is adopted for the study of FPGA minimum configurations.This method is limited if a large number of LUTs and multiplexers are presented. Since graph theory has been extensively applied to circuit analysis and test,this paper focuses on the modeling FPGA configurations.In our study,an internal logic block and interconnections of an FPGA are considered as a vertex and an edge connecting two vertices in the graph,respectively.A top-down modeling method is proposed in the paper to achieve minimum configuration numbers for CLB and IOB.Based on the proposed modeling approach and exhaustive analysis,the minimum configuration numbers for CLB and IOB are five and three,respectively.     

Graph-theoretic construction of low-density parity-check codes

This article presents a graph-theoretic method for constructing low-density parity-check (LDPC) codes from connected graphs without the requirement of large girth. This method is based on finding a set of paths in a connected graph, which satisfies the constraint that any two paths in the set are either disjoint or cross each other at one and only one vertex. Two trellis-based algorithms for finding these paths are devised. Good LDPC codes of practical lengths are constructed and they perform well with iterative decoding.     

An optimal algorithm for cycle breaking in directed graphs

This paper describes an exact algorithm for the identification of a minimal feedback vertex set in digital circuits. The proposed algorithm makes use of graph reduction and efficient graph partitioning methods based on local properties of digital circuits. It has been implemented and applied to ISCAS-89 benchmark circuits. Previously, non-optimum solutions were found. In other cases, the optimality of the solution could not be established for all circuits. By using the proposed algorithm we obtained the optimum results for all the circuits in a relatively short CPU time.Supported in part by the Technion fund for the promotion of research.     

Automatic DC operating point computation and design plan generation for analog IPs

DC operating point computation is inescapable for both knowledge-based and simulation-based analog synthesis. In this perspective, this article presents the automatic computation of DC operating point and the?generation of suitable design plans for analog IPs. The analog IP is built as a hierarchy of subcircuits inside our dedicated framework CAIRO+. Leaf subcircuits are known as devices and higher-level subcircuits are known as modules. Each subcircuit is represented by a dependency graph. The?dependency graph expresses electrical dependencies of circuit parameters on a selected set of design parameters. The dependency graph of the analog IP is constructed, in a hierarchical bottom-up approach, by merging graphs of children devices and modules. The graph is converted to a directed acyclic graph (DAG) by detecting and removing existing directed cycles. The resulting DAG is the design plan for the analog IP. Upon construction, the DAG is executed, in a top-down approach, to compute the DC operating point and the dimensions of the transistors. The computed DC operating point is compared to a DC simulation to ensure its correctness. The proposed methodology has been successfully applied to size and bias two analog IPs: a single-ended two-stage operational amplifier and a?differential cascode current-mode integrator. The results prove the efficiency and accuracy of the proposed methodology.     

Analysis of Heuristic Graph Partitioning Methods for the Assignment of Packet Control Units in GERAN

Over the last few years, graph partitioning has been recognized as a suitable technique for optimizing cellular network structure. For example, in a recent paper, the authors proposed a classical graph partitioning algorithm to optimize the assignment of cells to Packet Control Units (PCUs) in GSM-EDGE Radio Access Network. Based on this approach, the quality of packet data services in a live environment was increased by reducing the number of cell re-selections between different PCUs. To learn more about the potential of graph partitioning in cellular networks, in this paper, a more sophisticated, yet computationally efficient, partitioning algorithm is proposed for the same problem. The new method combines multi-level refinement and adaptive multi-start techniques with algorithms to ensure the connectivity between cells under the same PCU. Performance assessment is based on an extensive set of graphs constructed with data taken from a live network. During the tests, the new method is compared with classical graph partitioning approaches. Results show that the proposed method outperforms classical approaches in terms of solution quality at the expense of a slight increase in computing time, while providing solutions that are easier to check by the network operator.     

On the capacity of uniform hypergraphs

The capacity of uniform hypergraphs can be defined as a natural generalization of the Shannon capacity of graphs. Corresponding to every uniform hypergraph there is a discrete memoryless channel in which the zero error capacity, in the case of the smallest list size for which it is positive, equals the capacity of the hypergraph, and vice versa. Also, the problem of perfect hashing can be considered as a hypergraph capacity problem. Upper bounds are derived for the capacity of uniform hypergraphs, using a technique developed earlier for perfect hashing based on the concepts of graph entropy and hypergraph entropy. These are subadditive functionals on probabilistic graphs and hypergraphs (i.e. graphs and hypergraphs within a probability distribution given on their vertex sets). A modified version of this technique is given, replacing graph entropy by another subadditive functional on probabilistic graphs. This functional can be considered as a probabilistic refinement of Lovasz's ∂-functional     

Use of Demorgan's theorem in system reliability studies

A method of obtaining a minimized system reliability or unreliability expression using Demorgan's theorem is presented. Some formulae based on this theorem are provided, from which the minimized expression of system unreliability can be obtained by knowledge of pathsets. At the same time, this expression can also provide minimum cutsets of the system easily. On the other hand, one can obtain the minimum pathsets of a system without much difficulty, if the minimum cutsets are known.     

An extension of the channel-assignment problem: L(2, 1)-labelings of generalized Petersen graphs

The channel-assignment problem involves assigning frequencies represented by nonnegative integers to radio transmitters such that transmitters in close proximity receive frequencies that are sufficiently far apart to avoid interference. In one of its variations, the problem is commonly quantified as follows: transmitters separated by the smallest unit distance must be assigned frequencies that are at least two apart and transmitters separated by twice the smallest unit distance must be assigned frequencies that are at least one apart. Naturally, this channel-assignment problem can be modeled with vertex labelings of graphs. An L(2, 1)-labeling of a graph G is a function f from the vertex set V(G) to the nonnegative integers such that |f(x)-f(y)|/spl ges/2 if d(x,y)=1 and |f(x)-f(y)|/spl ges/1 if d(x,y)=2. The /spl lambda/-number of G, denoted /spl lambda/(G), is the smallest number k such that G has an L(2, 1)-labeling using integers from {0,1,...,k}. A long-standing conjecture by Griggs and Yeh stating that /spl lambda/(G) can not exceed the square of the maximum degree of vertices in G has motivated the study of the /spl lambda/-numbers of particular classes of graphs. This paper provides upper bounds for the /spl lambda/-numbers of generalized Petersen graphs of orders 6, 7, and 8. The results for orders 7 and 8 establish two cases in a conjecture by Georges and Mauro, while the result for order 6 improves the best known upper bound. Furthermore, this paper provides exact values for the /spl lambda/-numbers of all generalized Petersen graphs of order 6.     

On a new class of codes for identifying vertices in graphs

We investigate a new class of codes for the optimal covering of vertices in an undirected graph G such that any vertex in G can be uniquely identified by examining the vertices that cover it. We define a ball of radius t centered on a vertex υ to be the set of vertices in G that are at distance at most t from υ. The vertex υ is then said to cover itself and every other vertex in the ball with center υ. Our formal problem statement is as follows: given an undirected graph G and an integer t⩾1, find a (minimal) set C of vertices such that every vertex in G belongs to a unique set of balls of radius t centered at the vertices in C. The set of vertices thus obtained constitutes a code for vertex identification. We first develop topology-independent bounds on the size of C. We then develop methods for constructing C for several specific topologies such as binary cubes, nonbinary cubes, and trees. We also describe the identification of sets of vertices using covering codes that uniquely identify single vertices. We develop methods for constructing optimal topologies that yield identifying codes with a minimum number of codewords. Finally, we describe an application of the theory developed in this paper to fault diagnosis of multiprocessor systems     

A New Algorithm for Symbolic System Reliability Analysis

This paper presents a new algorithm for symbolic system reliability analysis. The method is applicable to system graphs with unreliable branches or nodes. Each branch is directed or undirected. Element probabilities need not be equal, but their failures are assumed to be s-independent. The new method makes no attempt to generate mutually exclusive events from the set of paths or cutsets but uses a technique to reduce greatly the number of terms in the reliability expression. Actual programming results show that the new method can efficiently handle systems having fewer than 20 paths or cutsets between the input-output node pair.     

关于生成有向图的全部有向回路的回路向量空间法

本文提出一个由有向图的(1)有向回路基集或(2)定向回路基集,通过线性组合,生成全部有向回路的算法。文中证明了一条点数边数相等原则。根据此原则,得到一个识别有向回路的简单方法,从而使算法的计算时间与对应的无向图算法基本相同。