InP/GaAs异质外延及异变InGaAs光探测器制备

借助超薄低温InP缓冲层,在GaAs衬底上生长出了高质量的InP外延层,在InP外延层中插入了15周期In0.93Ga0.07P/InP应变层超晶格(SLS),进一步阻断了失配位错穿透到晶体表面,提高了外延层的晶体质量,这样2.5 μm厚InP外延层的双晶X射线衍射(DCXRD)ω扫描半高全宽(FWHM)值降低至219 arcsec,该InP外延层的室温光荧光(PL)谱线宽度仅为42 meV.在此基础上,只利用超薄低温InP缓冲层技术就在半绝缘GaAs衬底上成功地制备出了长波长异变In0.53Ga0.47As PIN光电探测器,器件的台面面积为50 μm×50 μm,In0.53Ga0.47As吸收层厚度为300 nm,在3 V反偏压下器件的3 dB带宽达到了6 GHz,在1 550 nm波长处器件的响应度达到了0.12 A/W,对应的外量子效率为9.6%.     

InP基PIN型探测器中接触层掺杂对In_(0.53)Ga_(0.47)As材料光致发光特性的影响

利用MOCVD在InP衬底上制备InP/In0.53Ga0.47As/InP双异质结PIN型材料,通过对本征层In0.53Ga0.47As材料的光致荧光谱研究,发现PIN结构中两侧InP材料的掺杂特性对中间In0.53Ga0.47As材料的光致发光特性有明显的影响。本文通过对两侧InP材料的变掺杂处理,实现了In0.53Ga0.47As材料光致发光特性的有效提高。     

Ⅴ/Ⅲ比对InGaAs/InP的LPMOCVD生长的影响

介绍了利用LPMOCVD技术在InP衬底上生长In0.53Ga0.47As材料,获得表面平整、光亮的In0.53Ga0.47As外延层.研究了Ⅴ/Ⅲ比对表面形貌、结晶质量、电学质量的影响.在Ⅴ/Ⅲ比较低时,表面粗糙,要获得镜面状的表面形貌,Ⅴ/Ⅲ比必须大于40.Ⅴ/Ⅲ比对外延层结晶质量有影响.迁移率和本征载流子浓度随着Ⅴ/Ⅲ比的增加而增大.     

InP材料体系RTD的研制

报道了InP衬底AlAs /In0.53Ga0.47As/AlAs结构共振隧穿二极管(RTD)的研制过程.衬底片选用(001)半绝缘InP单晶片,结构材料使用分子束外延(MBE)技术制备,并用PL谱对外延片进行测试,器件采用台面结构.测得RTD器件室温下的峰谷电流比(PVCR)为7.4,峰值电流密度(Jp)为1.06×105A/cm-2,是国内首例成功的InP材料体系RTD.     

InP衬底AlAs/In0.53Ga0.47As RTD的研制

报道了InP衬底AlAs/In0.53Ga0.47As/AlAs两垒一阱结构共振隧穿二极管(RTD)器件的研制.结构材料由分子束外延制备,衬底片为(001)半绝缘InP单晶片,器件制作选用台面结构.测得室温下的峰值电流密度为1.06×105 A/cm2,峰-谷电流比为7.4,是国内报道的首例InP材料体系RTD器件.     

InP衬底AlAs/In0.53Ga0.47As RTD的研制

报道了InP衬底AlAs/In0.53Ga0.47As/AlAs两垒一阱结构共振隧穿二极管(RTD)器件的研制.结构材料由分子束外延制备,衬底片为(001)半绝缘InP单晶片,器件制作选用台面结构.测得室温下的峰值电流密度为1.06×105 A/cm2,峰-谷电流比为7.4,是国内报道的首例InP材料体系RTD器件.     

InP衬底上Ga_(0.47)In_(0.53)As/InP液相外延生长

用液相外廷获得了与InP晶格匹配的Ga_(0.47),In_(0.53)As单晶外延层.本文叙述在(100)和(111)InP衬底上Ga_(0.47)In_(0.53)As/InP液相外延生长方法.用常规滑动舟工艺生长的这种外延层,其表面光亮,Ga的组分x=0.46～0.48,晶格失配率小于2.77×10~(-4),禁带宽度E_g=0.74～0.75eV.使用这种Ga_(0.47)In_(0.53)As/InP/InP(衬底)材料研制的长波长光电探测器,在波长为0.9～1.7μm范围内测出了光谱响应曲线,在1.55μm处呈现峰值.     

共振隧穿弱光探测器的分子束外延生长条件优化

对一种共振隧穿弱光探测器的分子束外延生长条件进行了研究。对探测器结构进行设计,研究了不同Al束流和不同生长温度下In0.52Al0.48As材料的生长质量,结合X射线衍射及原子力显微镜测试结果确定了In0.52Al0.48As材料的最佳生长条件。研究了不同Ga束流下In0.53Ga0.47As材料的生长质量,并采用一种衬底变温的生长方法解决了恒温生长较厚In0.53Ga0.47As外延层时表面容易出现点状突起的问题,获得了平整的In0.53Ga0.47As外延表面。分别采用恒温和变温的生长方法制备了探测器样品,并对其电流-电压特性及光响应进行了测试,测试结果表明,采用变温生长方法制备的探测器样品具有更高的峰值电流和光响应。     

基于InP衬底的晶格失配In0.68Ga0.32As的MOCVD生长及其特性研究

采用MOCVD生长技术在InP衬底上成功实现了晶格失配的3μm In0.68 Ga0.32As薄膜生长.通过As组分的改变,利用张应变和压应变交替补偿的InAsxP1-x应变缓冲层结构来释放由于晶格失配所产生的应力,在InP衬底上得到了与In0.68Ga0.32 As晶格匹配的InAsxP1-x“虚拟”衬底,通过对缓冲层厚度的优化,使应力能够在“虚拟”衬底上完全豫弛.通过原子力显微镜(AFM)、高分辨XRD、透射电镜(TEM)和光致发光(PL)等测试分析表明,这种释放应力的方法能够有效提高In0.68 Ga0.32 As外延层的晶体质量.     

In_(0.53)Ga_(0.47)As的液相外延生长

用液相外延的方法在(100)取向的InP衬底上生长了晶格匹配的In_(0.53)Ga_(0.47)s.采用普通的原材料,经过适当的处理工艺,已经获得室温载流子密度为(5-10)×10~(15)cm~(-3),电子迁移率高达9450cm~2/V·s的In_(0.53)Ga_(0.47)As外延层.     

High-gain In0.53Ga0.47As:Fe photoconductive detectors

Photoconductive detectors were fabricated on semi-insulating liquid phase epitaxial In0.53Ga0.47As/InP doped with Fe for the first time. Their performance characteristics have been compared with identical devices made from Zn-doped p-In0.53Ga0.47As/InP. Internal optical gains up to 10 were measured in the Fe-doped devices. The bias and intensity-dependent gain characteristics of these devices are discussed.     

Monolithically integrated In0.53Ga0.47As-PIN/InP-MISFET photoreceiver

In0.53Ga0.47As PIN photodiode and InP MISFET were monolithically integrated on an Fe-doped semi-insulating InP substrate. Photoreceiver sensitivities were measured at 100 Mbit/s NRZ pseudorandom signals.     

High-mobility Ga0.47In0.53As thin epitaxial layers grown by MBE, very closely lattice-matched to InP

Thin epitaxial layers (< 1.5 ?m) of Ga0.47In0.53As were grown by molecular beam epitaxy, very closely lattice-matched to InP, despite a nonrotating substrate holder. Hall mobilities were measured as a function of temperature in the dark and on illumination. At low temperature, the peak mobility of undoped layers lies between 35000 and 40000 cm2V?1s?1 in the dark and increases up to 45000 cm2V?1s?1 when measured in the light. Preliminary results obtained on slightly Sn-doped layers are also reported.     

Reduction of 1/f noise in multiplexed linear In/sub 0.53/Ga/sub 0.47/As detector arrays via epitaxial doping

A significant (2-5*) reduction in 1/f noise was observed in In/sub 0.53/Ga/sub 0.47/As photodetector arrays read out by a PMOS multiplexer, when the epitaxial InP cap layer doping was changed from undoped to sulfur-doped n type of about 3*10/sup 16/ cm/sup -3/. A further decrease was observed when the InP buffer layer was also changed from undoped to sulfur-doped n type of about 5*10/sup 17/ cm/sup -3/. Data was presented for the variation of 1/f noise, within a temperature range of 18 degrees C to -40 degrees C. Surface states at the InP cap/SiN interface appears to be the primary source of 1/f noise, with the bulk states at the n/sup -/In/sub 0.53/Ga/sub 0.47/As buffer hetero-interface as a secondary source. Increased n-type doping in the high-bandgap InP cap and buffer layers may reduce electron trapping, and thus 1/f noise. The measured noise spectrum of InGaAs photodetectors varies as f/sup y/ with y being approximately -0.45 for device structures with doped and undoped InP can layers. For a doped InP buffer layer, this value of y is -0.3.<>     

InP基功率HEMT结构材料分子束外延生长研究

从 3个层面研究了分子束外延 Al0 .48In0 .52 As/ Ga0 .47In0 .53As/ In P功率 HEMT结构材料生长技术。首先 ,通过观察生长过程的高能电子衍射 (RHEED)图谱 ,确立了 Ga0 .47In0 .53As/ In P结构表面层的 MBE RHEED衍射工艺相图 ,据此生长的单层 Si-doped Ga0 .47In0 .53As(40 0 nm) / In P室温迁移率可达 6960 cm2 / V· s及电子浓度 1 .3 3 E1 7cm- 3。其次 ,经过优化结构参数 ,低噪声 Al0 .48In0 .52 As/ Ga0 .47In0 .53As/ In P HEMT结构材料的 Hall参数达到μ30 0 K≥ 1 0 0 0 0 cm2 / V· s、2 DEG≥ 2 .5 E1 2 cm- 2 。最后 ,在此基础之上 ,降低 spacer的厚度、在 Ga0 .47In0 .53As沟道内插入 Si平面掺杂层并增加势垒层的掺杂浓度获得了功率 Al0 .48In0 .52 As/ Ga0 .47In0 .53As/ In PHEMT结构材料 ,其 Hall参数达到μ30 0 K≥ 80 0 0 cm2 / V· s、2 DEG≥ 4 .0 E1 2 cm- 2 。     

InP MESFET with In0.53Ga0.47As/InP heterostructure contacts

Source and drain contacts for an InP MESFET were prepared by an Au/Ni/In0.53Ga0.47As/InP layered structure, without a metal alloying process. A highly conductive In0.53Ga0.47As layer grown on an InP active layer reduced the gate-source resistance. A maximum DC transconductance of 16 mS has been obtained for an InP MESFET with 1.2×190 ?m gate dimensions and a pinch-off voltage of ?0.7 V.     

Electron mobility in degenerate tellurium doped In0.53Ga0.47As LPE layers

Tellurium doped In0.53Ga0.47As epitaxial layers have been grown by LPE in the range n=1018?4×1019 cm?3; the distribution coefficient of tellurium was found to be 0.1. These layers exhibit a two to three times higher mobility than InP or GaAs doped to the same level. Theoretically calculated values of mobility taking account of the degenerate and nonparabolic conduction band conditions are compared with the experimental data.     

Threshold voltage of submicron Ga/sub 0.47/In/sub 0.53/As HIGFETs

Presents threshold voltage data for Al/sub 0.48/In/sub 0.52/As/Ga/sub 0.47/In/sub 0.53/As/InP heterostructure insulated gate FETs (HIGFETs) with gate lengths from 1.2 mu m to 0.4 mu m. The refractory-gate, self-aligned fabrication process was applied to MBE-grown structures with 300 AA Ga/sub 0.47/In/sub 0.53/As channels and semi-insulating superlattice buffers to achieve sharp pinchoff with excellent threshold uniformity. HIGFETs with L/sub g/=1.2 mu m showed a threshold voltage of -0.076+or-0.019 V, making them well-suited to application in direct-coupled FET logic (DCFL) circuits.<>     

Evidence of trapping in device-quality liquid-phase-epitaxial In1?xGaxAsyP1?y

Traps have been identified in epitaxial n- and p-type In1?xGaxAsyP1?y for the first time. The activation energy, capture cross-section and density of several electron traps in the quaternary composition range from InP to In0.53Ga0.47As have been determined. An electron trap similar in some characteristics to the 0.83 eV electron trap present dominantly in bulk and v.p.e. GaAs was observed in an n-type In0.71Ga0.29As0.45P0.55(Eg=0.95 eV) layer. Hole traps were not observed.