Low passband sensitivity digital filters: A generalized viewpoint and synthesis procedures

The concepts of losslessness and maximum available power are basic to the low-sensitivity properties of doubly terminated lossless networks of the continuous-time domain. Based on similar concepts, we develop a new theory for low-sensitivity discrete-time filter structures. The mathematical setup for the development is the bounded-real property of transfer functions and matrices. Starting from this property, we derive procedures for the synthesis of any stable digital filter transfer function by means of a low-sensitivity structure. Most of the structures generated by this approach are interconnections of a basic building block called digital "two-pair," and each two-pair is characterized by a lossless bounded-real (LBR) transfer matrix. The theory and synthesis procedures also cover special cases such as wave digital filters, which are derived from continuous-time networks, and digital lattice structures, which are closely related to unit elements of distributed network theory.     

A design philosophy for microelectronic active-RC filters

A design philosophy for microelectronically realizable active-RC filters is presented and illustrated by means of microelectronic filter examples in the frequency range from approximately 75 Hz to about 110 kHz. The design is by simulation of low-sensitivity resistively terminated inductor-capacitor filters (LCR filters). Based on an analysis of the effect of nonideal components in the active-RC filters, functional adjustment methods are developed which lead in practice to near-ideal nominal response characteristics, in many cases better than those of practical LCR filters. By matching the design process to a carefully chosen well-established manufacturing technology, the cost of the microelectronic active-RC filters is attractively low. Many of these filters in microelectronic form are in production in the U.K.     

Signal-processor-based digital filters having low sensitivity

New low-sensitivity second-order digital-filter structures are proposed which are suited for implementation on an integrated signal processor with an on-chip fast multiplier. The inherent parallelism in such a processor is utilised to design very low sensitivity digital filters without any remarkable decrease in the overall throughput.     

Functional Properties and Frequency Characteristics of Low-Sensitive RC Filters Based on Micropower Operational Amplifiers

Russian Microelectronics - The main designs of low-sensitivity multiloop active RC filters (ARCFs) based on micropower operational amplifiers (OAs) for preliminary sensor signal processing in...     

Noise performance of low-sensitivity active filters

The noise limitations of some important low-sensitivity RC-active filter realizations are derived; the inherent rms noise (noise from essential network resistors) that exists at the output terminals of a bandpass active filter is determined for two-integrator loop and positive impedance converter filter realizations. Output noise spectral density and total rms output noise are determined for the two-integrator loop section. The noise contributed by the essential circuit resistors and the operational amplifiers is taken into account and it is shown that exact calculation of output noise may be obtained in terms of Q factor and impedance level. The results are used to obtain the theoretical noise limitations of these low-sensitivity active filters. It is found that the deterioration in signal-to-noise ratio (SNR), due to the internal filter noise, is independent of Q factor for high Q realizations.     

CMOS switched-current ladder filters

The design and implementation of switched-current (SI) ladder filters is described. The basic current-mode circuits, including the SI differential integrator/summer are developed. The SI integrator/summer is shown to be directly analogous to the switched-capacitor (SC) integrator/summer; thus, all the synthesis techniques developed for the design of SC filters can be used to synthesize SI filters. Signal flowgraph synthesis of SI ladder filters is presented. The nonideal characteristics of SI ladder filters that limit their accuracy are evaluated. Clock-feedthrough and device mismatch induced errors are more severe in the present SI circuit configurations than in SC circuits. A standard digital 2-μm n-well CMOS process has been used to implement two high-order ladder filters. Simulations accurately predict the measured results of the first integrated SI filters. The area and power dissipation are comparable to those obtained with the switched-capacitor technique     

A new approach for the realization of voltage-mode second-order universal filters using current conveyors

In this work two different types of topologies are derived for realization any second-order filter characteristic by choosing properly, the admittances of passive elements. These topologies use two second-generation current conveyors (CCIIs). One of the topologies involves different types of CCIIs whereas the other uses the same type of CCIIs together with a unity gain voltage buffer. The buffer used provides not only low output impedance but also facilitates cascading of the filter circuits thus obtained. It is possible to derive many different filters realizing any second-order transfer function by the use of the proposed topologies. Moreover, the produced filters have low-sensitivity performance and permit orthogonal controlling of both the quality factor and the natural angular frequency.     

A new simple method for analysing of thermal noise in switched-capacitor filters

Thermal noise is one of the most important challenges in analogue integrated circuits design. This problem is more crucial in switched-capacitor (SC) filters due to the aliasing effect of wide-band thermal noise. In this article, a new simple method is proposed for estimating the power spectrum density of output thermal noise in SC filters, which have acceptable accuracy and short running time. In the proposed method, first using HSPICE simulator, accurate value of accumulated sampled noise on sampler capacitors in each clock state is achieved. Next, using difference equations of the SC filter, frequency response of the SC filter is shaped by time domain analysis. Based on the proposed method, a SC low-pass filter and a second-order SC band-pass filter are analysed. The results are validated by comparing to the previously measured data.     

Fully differential bilinear integrator for SC filters

A fully differential bilinear SC integrator, which can be used for SC filter realisations, is proposed. It is parasitic-insensitive and particularly useful in SC filters simulating analogue ladder networks. The design of these filters is different from the commonly used ones, and leads to filters with better sensitivity properties than earlier versions. Realisation of a third-order highpass filter, bilinearly transformed from the continuous-time to the discrete-time domain, is shown as an example.     

单一单位增益放大器的Q增强SC滤波器

本文阐述了采用单位增益放大器的SC滤波器的设计方法。基于无源Q增强技术,由Sallew Key有源RC电路导出了一系列Q增强的二阶SC低通、高通和带通滤波器。设计表明,本文提出的Q增强SC电路比文献给出的电路需要小得多的电容分散度。本文考察了这些电路灵敏度和有限GB对SC电路的影响。用分立元件做了实验,实验结果与理论计算相吻合。     

CAD tools for the synthesis and layout of SC filters and networks

This paper describes two programs for the synthesis and layout generation of SC filters and networks. The first part of the paper describes a technology-independent synthesis and optimization program for SC filters. The program allows for the exact synthesis of cascaded SC biquad and SC ladder filters. Two performance measures related to sensitivity and noise are employed to estimate the performance of the synthesized circuits and to select optimum realizations. The same measures are used in a novel capacitance assignment procedure. The second part of the paper describes a flexible SC layout generator, which can be adapted to various design rules and floorplans by means of a technology file. Area efficient layout is generated by placing individual circuit elements rather than building blocks. Crosstalk between conductors is minimized by a router that distinguishes between different kinds of nodes.1. The scaling of the biquad circuit is dependent on the position of the biquad in the cascade.2. This may not seem to be overly important, since high-pass-type filters do not occur that often in practical applications. If one considers, however, that SCSYN is to be used as a general filter synthesis program, thenevery filter must be automatically realizable. In such an environment, a CAD program that can design all but one type of filter is either quite useless or very limited indeed.3. Note that an SC filter, in contrast to a digital filter, may contain delay-free loops.     

Integrated VIS SC filter with lattice reference structure

Symmetric VIS SC filters simulating reference filters in classical lattice configuration can be realised with less hardware. A fifth-order PCM lowpass with only three operational amplifiers has been designed and integrated in standard CMOS Si-gate technology. VIS SC lattice filters show excellent passband-sensitivity properties. Owing to the higher stopband sensitivity with respect to element tolerances, stopband attenuation requirements in excess of about 35?40 dB can be satisfied only by cascading lower-order SC lattice filters.     

Offset-compensated switched-capacitor leapfrog filters

Offset-compensated SC leapfrog filters can be realised as shown in the letter. The filters are parasitic-insensitive and the switches are controlled by a 3-phase clock. A 5th-order lowpass filter is given as an example.     

A reduced capacitor spread algorithm for elliptic bandpass SC filters

A modification of a well-known algorithm for simulating elliptic LC ladder filters by switched-capacitor (SC) technique is presented, The filter terminations were realized without damped integrators. The modification was proven useful in reducing the capacitance spread and total capacitance in high-Q bandpass SC filters: improvements by factors of five and six were obtained in the design of sixth- and tenth-order bandpass filters, respectively. A chip, including four sixth-order bandpass filters in the audio range, was designed and found to function properly.     

New switched capacitor ladder filter with reduced number of amplifiers

A new simple method for designing switched capacitor ladder filters with a reduced number of amplifiers is described. The main building blocks in this design method are SC immittance convertors and SC current sources.     

Some Prominent Characteristics of the Modified Elliptic Low-Pass Function

A modified elliptic low-pass filter function with progressively diminishing ripples in both the passband and the stopband is proposed and analyzed. The modified elliptic function is realizable by the passive doubly-terminated ladder network for the order n even or odd, thus lending themselves amenable to high-quality low-sensitivity active RC or switched capacitor filters through the simulation techniques. Besides the passive ladder network realization, the modified elliptic function has improved characteristics both in the frequency domain and the time domain as compared with the classical elliptic function. In addition, the modified function exhibits better magnitude sensitivity properties than the classical function.     

基于信号流图的开关电流滤波器设计

开关电流（SI）是有望取代开关电容（SC）的一种新型的取样数据技术，鉴于SC技术发展的成熟性及其与SI技术的紧密联系，即SC和SI滤波电路具有互易性，可采用信号流图转置的方法，将SC综合法直接用于SI滤波器设计，而无须提出新的设计方法。本文以二阶巴特沃思开关电容带通滤皮器为例给出了该方法的具体应用。     

Noise-cancelling switched-capacitor (SC) filtering technique

A method of reducing the 1/f noise in SC filters is shown using an initialising technique. This technique also removes the input offset of the operational amplifier, and thus gives an offset-free SC building block. Experimental results for a first-order lowpass filter illustrating the above are presented.     

Biquad alternatives for high-frequency switched-capacitor filters

Biquad sections are the basic building block of practical switched-capacitor (SC) filters. The authors focus on the amenability of various biquad options for high-frequency operation. A comparison on the basis of analysis and a recent nonideal SC network simulation tool are confirmed by results from a VLSI 1.25-/spl mu/m CMOS test chip. A differencing-input SC biquad is shown to have a significant performance advantage over other circuits.     

Losslessness and stability of LDI ladders and filters

The stability of digital ladder filters close in form, via the lossless discrete integrator (LDI) transformation, to doubly terminatedLC Cauer ladder low-pass filters is studied. The LDI transformation does not necessarily map stable analogue into stable digital filters. Necessary and sufficient conditions for these digital filter to be lossless and for a corresponding doubly terminated filter to be stable are given. LDIs are often used in the design of switched capacitor (SC) filters. For this case we provide a threshold sampling rate above which the SC LDI filter retains the stability of the analogue filter. In spite of the stability problem with the LDI mapping, it has been observed that when applied to simulate analogue filters the resulting filter is stable. It can now be argued that, in these cases, other factors in the determination of the sampling rate leads typically to a choice that is also sufficiently above the threshold rate for stability. The theory described is also useful to derive more general digital filters and to perform the design of stable LDI filters exclusively in the Z-plane without reference to analogue prototypes.This work was partly supported by the U.S.-Israel Binational Science Foundation under Grant No. 88-425.