Series resonant ZCS‐PFM DC‐DC power converter with high‐frequency high‐voltage transformer link for high‐power magnetron drive

This paper presents a single lossless inductive snubber‐assisted ZCS‐PFM series resonant DC‐DC power converter with a high‐frequency high‐voltage transformer link for industrial‐use high‐power magnetron drive. The current flowing through the active power switches rises gradually at a turned‐on transient state with the aid of a single lossless snubber inductor, and ZCS turn‐on commutation based on overlapping current can be achieved via the wide range pulse frequency modulation control scheme. The high‐frequency high‐voltage transformer primary side resonant current always becomes continuous operation mode, by electromagnetic loose coupling design of the high‐frequency high‐voltage transformer and the magnetizing inductance of the high‐frequency high‐voltage transformer. As a result, this high‐voltage power converter circuit for the magnetron can achieve a complete zero current soft switching under the condition of broad width gate voltage signals. Furthermore, this high‐voltage DC‐DC power converter circuit can regulate the output power from zero to full over audible frequency range via the two resonant frequency circuit design. Its operating performances are evaluated and discussed on the basis of the power loss analysis simulation and the experimental results from a practical point of view. © 2005 Wiley Periodicals, Inc. Electr Eng Jpn, 153(3): 79–87, 2005; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.20126     

A novel efficiency‐enhancement topology: GaN high‐electron mobility transistors with waveform‐modulation structure composed of Schottky diodes

To improve the power‐added efficiency (PAE) of the gallium nitride (GaN) high‐electron mobility transistor (HEMT) in radio frequency applications, this paper studies the relationship between the nonlinearity of the gate capacitance and the PAE of the GaN HEMTs. The theoretical analysis and simulation results demonstrate that the nonlinearity of the gate capacitance modulates the signal phase at the GaN HEMT input and increases the average drain current, leading to increased power consumption and reduced PAE. Then, an efficiency‐enhancement topology for GaN HEMTs that employs the waveform‐modulation effect of Schottky diodes to reduce power consumption and improve efficiency is presented. The efficiency‐enhancement topology for a 4 × 100‐μm GaN HEMT with waveform‐modulation diodes is then fabricated. Results of load‐pull test demonstrate that the novel topology can increase the PAE of the 4 × 100‐μm GaN HEMT by more than 5% at 8 GHz. The novel efficiency‐enhancement topology for GaN HEMTs proposed in this paper will be suitable for applications that demand high‐efficiency GaN HEMTs or circuits.     

Control schemes and transient characteristics of a high‐speed phase shifter for power flow control in power transmission systems

In recent years, attention has been paid to the concept of FACTS (Flexible AC Transmission Systems), along with significant progress in power electronic technology. A high‐speed phase shifter, which is one of the most promising devices in the FACTS concept, has the potential of power flow control and/or voltage stability in power transmission systems. In this paper, theory and experiment reveal that conventional high‐speed phase shifters may cause power swings in a transient state as a result of coupling between instantaneous active and reactive power control loops. Thus, two new control schemes for a high‐speed phase shifter are proposed to achieve both power flow control and power swing damping. The second proposed control scheme is based on the control scheme of an already proposed series active filter. Simulated and experimental results agree well with analytical results, not only in steady states but also in transient states. © 1999 Scripta Technica, Electr Eng Jpn, 128(2): 74–82, 1999     

Development of a high‐speed laser interferometer using an acousto‐optic deflector

An acousto‐optic laser deflector was used as a shutter for high‐speed imaging of laser interference fringes using an ordinary CCD camera. The exposure duration was set by the pulse width of the high‐frequency signal applied to the acousto‐optic deflector. Changes in laser interference fringes due to an impulse discharge in air were obtained at an exposure duration of 4 µs. By applying a sequence of high‐frequency signals with different frequency, the beam was deflected to four different angles at different times, allowing four interference images to be captured on a single video frame. This was used for time‐resolved imaging of the interference fringe pattern. © 2004 Wiley Periodicals, Inc. Electr Eng Jpn, 148(2): 76–83, 2004; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.20011     

A low‐power technique for high‐resolution dynamic comparators

A low‐power technique for high‐resolution comparators is introduced. In this technique, p‐type metal‐oxide‐semiconductor field‐effect transistors are employed as the input of the latch of the comparator just like the input of the preamplifier. The latch and preamplifier stages are activated in a special pattern using an inverter‐based controller. Unlike the conventional comparator, the preamplification delay can be set to an optimum low value even if after the preamplification, the output voltages is less than n‐channel metal‐oxide semiconductor voltage threshold. As a result, the proposed comparator reduces the power consumption significantly and enhances the speed. The speed and power benefits of the proposed comparator were verified using analytical derivations, PVT corners, and post layout simulations. The results confirm that the introduced technique reduces the power consumption by 60%, also, provides 57% better comparison speed for an input common mode voltage (V_cm) range of 0‐Vdd/2.     

A novel strategy for a high‐power utility interactive inverter with a series active filter

High‐power utility interactive inverters used for large‐capacity energy storage systems are composed of multiple connected inverters, in order to realize high efficiency and high performance of the harmonic elimination characteristic simultaneously. Some disadvantages of multiple connected inverters, such as harmonic current flowing from an inverter unit to the other one, and increase of the number of inverter units, cannot be overcome easily. This paper presents a novel strategy for a high‐power utility interactive inverter, which is composed of a large power with low‐switching‐frequency PWM inverter (high‐power PWM inverter), an LC passive filter, and a series active filter (series AF). Because harmonic components contained in the utility line current are absorbed by the series AF, the switching frequency of the PWM inverter can be selected to about 1 kHz. In addition because the power capacity and the output voltage of the series AF can be suppressed lower than 10% of the power capacity and the output voltage of PWM inverter, low‐voltage and high‐speed power devices can be applied to the series AF. Consequently, high power, high efficiency, and high harmonics elimination performance can be realized without increasing the number of inverter units. © 2002 Wiley Periodicals, Inc. Electr Eng Jpn, 141(2): 57–66, 2002; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.10048     

Development of diode‐pumped solid‐state laser HALNA for fusion reactor driver

The diode‐pumped slab laser for inertial fusion energy driver has been demonstrated, which produces the 1053‐nm output energy of 10 J at 10 Hz. The glass slab laser amplifier has been pumped by quasi‐CW 290‐kW AlGaAs laser‐diode arrays at 803 nm. The optical system can compensate for thermal effects by use of zigzag optical propagation, image‐relayed telescope, and 45^° Faraday rotator. The output energy of 10.6 J at 1 Hz with the optical‐to‐optical conversion efficiency of 19.9% has been successfully obtained. Also, the 10‐Hz operation has been performed with an output energy of 5.1 J. © 2006 Wiley Periodicals, Inc. Electr Eng Jpn, 155(2): 27–35, 2006; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.20288     

Characteristics comparison of high‐frequency multilevel inverter connected with filter inverters

This paper presents a characteristics comparison of a high‐frequency multilevel inverter connected with small‐ capacity filter inverters. In general, PWM inverters require a low‐pass filter in order to reduce switching harmonics. However, in the high‐frequency systems such as class D power amplifiers, the cutoff frequency of the low‐pass filter must be set at high frequency. Thus, harmonic distortion of the output voltage is enlarged to a harmful level. Increasing the number of output voltage levels is effective in reducing the harmonic distortion of the output voltage and the low‐pass filter size. The proposed systems consist of a five‐level inverter and several cascade‐connected low‐voltage full bridge inverters without any external DC power sources for filtering the output voltage. The five‐level inverter generates a stepwise waveform with five‐level voltage, and the low‐voltage filter inverter superimposes harmonic components to compensate for the voltage waveform distortion. Therefore, the proposed system can reduce its total switching loss and can increase the number of the output voltage levels. In this paper, the effectiveness of the proposed systems is verified through several experiments. © 2007 Wiley Periodicals, Inc. Electr Eng Jpn, 161(3): 58–65, 2007; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.20373     

A 0.1 to 2.7‐GHz SOI SP8T antenna switch adopting body self‐adapting bias technique for low‐loss high‐power applications

A low‐loss high‐power single‐pole 8‐throw antenna switch adopting body self‐adapting bias technique in a 0.18‐μm thick‐film partially depleted silicon‐on‐insulator complementary metal‐oxide‐semiconductor process is implemented for multimode multiband cellular applications. A topology with symmetric port design is developed. We employ the body‐contacted field‐effect transistor to handle high power level and obtain low harmonic distortion. However, the conventional bias method for body‐contacted field‐effect transistor leads to poor insertion loss (IL), serious imbalanced voltage division, and large die size. Therefore, a new body self‐adapting bias scheme is adopted to improve the IL and power handling capability with die area reward by removing the employment of extra biasing resistor and voltage supply at the body. The presented silicon‐on‐insulator antenna switch utilizing the new body bias strategy reveals similar harmonic performance as a conventional switch version, thanks to the analogous DC bias to the gate and body, while it exhibits effectively lower IL, imbalanced voltage division, and die area. The measured IL and 0.1‐dB compression point (P_?0.1dB), at 1.9/2.7 GHz, are roughly 0.52/0.82 dB and 39.2/36.9 dBm, respectively. The overall IL and P_?0.1dB are apparently improved by approximately 0.05 to 0.13 dB and 0.5 to 0.8 dBm compared with the conventional version.     

Efficiency improvement of high‐frequency inverter for wireless power transfer system using series compensator

This paper proposes a wireless power transfer system using a series compensator GCSC (gate‐controlled series capacitor) as a primary side capacitor. The GCSC is a circuit module that functions as a series variable capacitor by controlling semiconductor switches. The advantage of applying the GCSC to the primary side capacitor is that it provides controllability of the output power factor for a high‐frequency inverter. Therefore, optimum operation of the high‐frequency inverter can be achieved irrespective of the coil parameters by controlling the output power factor. Experimental results with a 1 kW laboratory prototype confirmed that the proposed system can achieve optimum operation and high efficiencies of the high‐frequency inverter.     

Autonomous decentralized system for torque control of high‐power permanent magnet synchronous motor

An autonomous decentralized system (ADS) for the control of a high‐power permanent magnet synchronous motor (PMSM) presented in this paper. The system decentralizes a centralized control system into several autonomous subsystems. Thus the power supply and power electronic devices of the control system can be replaced by smaller ones, thereby obtaining better fault tolerance of the system. The subsystems are connected only through the data field, which, in this paper consists of feedback elements and communication modules. This structure enables the autonomous controllability and autonomous coordinability of the system. The mathematical model of the PMSM with decentralized stator coils is proposed. This model takes into account the self‐ and mutual inductance of the coil, as well as the effect of the stator slot‐pitch angle. In addition, an autonomous algorithm for the torque control of the PMSM with decentralized stator coils is proposed, and the fault‐tolerance design is developed. Experimental results of the torque control and fault‐tolerance control confirm the validity of the proposed system. © 2012 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

Active‐terminated transmitter and receiver circuits for high‐speed low‐swing duobinary signaling

In this work, we propose transmitter and receiver circuits for high‐speed, low‐swing duobinary signaling over active‐terminated chip‐to‐chip interconnect. In active‐termination scheme port impedance of transmitter and receiver is matched with characteristic impedance of the interconnect. Elimination of the passive terminators helps in reducing the transmitted signal level without degrading the 0signal detectability of the receiver. High‐speed current‐mode receiver and transmitter circuits are designed, so that the input port impedance of the receiver and the output port impedance of the transmitter are matched with characteristic impedance of the link. These Tx–Rx pair is used to validate the proposed active‐termination scheme. We also propose a duobinary precoder architecture suitable for high‐speed operation and a low‐power broadband equalizer topology for compensating the lossy long interconnect. The duobinary transmitter and receiver circuits are implemented in 1.8 V, 0.18 µm Digital CMOS technology. The designed high‐speed duobinary Tx/Rx circuits work up to 8 Gb/s speed while transmitting the data over 29.5 in. FR4 PCB trace for a targeted bit error rate (BER) of 10^?15. The power consumed in the transmitter and receiver circuits is 42.9 mW at 8 Gb/s. Copyright © 2010 John Wiley & Sons, Ltd.     

A single‐stage high power‐factor bridgeless AC‐LED driver for lighting applications

An alternating‐current light‐emitting diode (AC‐LED) driver is implemented between the grid and lamp to eliminate the disadvantages of a directly grid‐tied AC‐LED lamp. In order to highlight the benefits of AC‐LED technology, a single‐stage converter with few components is adopted. A high power‐factor single‐stage bridgeless AC/AC converter is proposed with higher efficiency, greater power factor, less harmonics to pass IEC 61000‐3‐2 class C, and better regulation of output current. The brightness and flicker frequency issues caused by a low‐frequency sinusoidal input are surpassed by the implementation of a high‐frequency square‐wave output current. In addition, the characteristics of the proposed circuit are discussed and analyzed in order to design the AC‐LED driver. Finally, some simulation and experimental results are shown to verify this proposed scheme. Copyright © 2012 John Wiley & Sons, Ltd.     

High‐voltage power amplifier for flexible paper speaker applications

This letter presents a high‐voltage power amplifier for driving flexible paper speaker. Simple circuit complexity and high signal quality can be achieved. The operating principles and design considerations of the studied paper speaker power amplifier are analyzed and discussed. A laboratory prototype is built and tested. The experimental results are shown to verify the studied scheme. Copyright © 2012 John Wiley & Sons, Ltd.     

Visualization of high‐speed phenomena using an acousto‐optic laser deflector

An acousto‐optic laser deflector was used for visualization of high‐speed phenomena, such as shock waves and density perturbations accompanying an impulse discharge, or shock waves generated by laser‐induced breakdown in air. Using a continuous wave laser as the light source, shadowgraphs of shock waves and density perturbations were obtained at shutter speeds down to 1µs. Results showed that shock waves propagated at a speed of 417 m/s in the case of an impulse discharge, and 485 m/s in the case of laser‐induced breakdown. Prebreakdown phenomena such as leaders progressing from the high‐voltage electrode were also visualized. Compared to conventional high‐speed imaging techniques, this method is useful when using a laser light source, since the acousto‐optic crystal can accommodate high‐intensity laser light. © 2005 Wiley Periodicals, Inc. Electr Eng Jpn, 154(3): 9–15, 2006; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.20279     

Implementation and design of high‐power fast charger for lithium‐ion battery pack

The high‐power fast charger (HPFC) incorporating a power stage with a controlling loop is presented in this paper. A power stage is composed of an inter‐leaved boost power factor correction and a DC‐DC full‐bridge phase‐shifted (FBPS) converter, and that the HPFC can supply a constant‐voltage (CV) or a constant‐current (CC) power to charge a secondary lithium‐ion battery pack. In addition, the ripple current can be reduced due to the DC‐DC FBPS converter combines with the current‐doubler rectifier at HPFC's output side. Also, the controlling loop is equipped with a voltage compensator and a current compensator, and this design is for the sake of HPFC, which can either operate in CV or CC output mode. Moreover, the shut‐down situation will be prevented by proposed bi‐phase charging controller, when the charging current is adjusted from the fist CC level to the second CC level. Analysis and design considerations of the proposed circuits are presented in details. Experimental results agree well with the theoretical predictions and confirm the validity of the proposed approach. Copyright © 2013 John Wiley & Sons, Ltd.     

New SRAM design using body bias technique for low‐power and high‐speed applications

In this paper, a new SRAM cell with body‐bias actively controlled by a control circuit and word line is introduced to realize low‐power and high‐speed applications. The cell uses two word lines, which vary between positive and negative voltage levels to control the body bias of cell's transistors. In this design, using a peripheral control circuit with the least possible number of transistors, the access time is decreased and also a trade‐off between static and dynamic power consumption is provided. Compared to a conventional SRAM cell, the proposed cell reduces the static power consumption by 82% and improves the read performance by 40% and the write performance by 27%. Copyright © 2013 John Wiley & Sons, Ltd.     

An accurate power delivery system (PDS) design methodology for high‐speed digital systems

The trend in high‐speed digital circuits is to increase speed and density and to operate at lower voltage. This fast increase in the switching speed combined with the decrease of the operating voltage causes the allowable absolute voltage variations to decrease, which makes the PDS design a more challenging task than ever. Moreover, the complex 3D nature of the modern PDS causes it to be more sensitive to capacitors' placement as well as capacitance value. In this paper, we introduce an efficient complete solution for the design of high‐speed digital PDS. This solution (a) takes the effects of the decoupling capacitor placement into consideration through a 3D electromagnetic simulation of the PDS, (b) defines a more‐realistic PDS design target, and (c) presents a clear capacitor value selection methodology. Finally, we applied our methodology to an industrial test case, compared its results with that of industrial design, and showed its advantages. Copyright © 2010 John Wiley & Sons, Ltd.     

A new efficient SC integrator scheme for high‐speed low‐power applications

A new solution to implement efficient switched‐capacitor (SC) integrators is presented. In the proposed scheme, voltage buffers are opportunely introduced in order to prevent direct connection between the output and the capacitive feedback network of the circuit that characterizes classical SC integrator topologies during the charge transfer phase. Design guidelines to optimize the settling performances of the proposed circuit are also given. To demonstrate the possible advantages of the new solution, the proposed integrator is designed in a commercial 0.35?µm CMOS technology. It is shown that compared with classical SC integrator topologies, the proposed configuration allows a significant improvement of the integrator speed to be achieved for a given power budget. Copyright © 2010 John Wiley & Sons, Ltd.     

A power decoupling control method for an isolated single‐phase AC‐to‐DC converter based on a high‐frequency cycloconverter

This paper proposes a new power decoupling method for a high‐frequency cycloconverter which converts the single‐phase line‐frequency ac input to the high‐frequency ac output directly. The cycloconverter consists of two half‐bridge inverters, two input filter capacitors, and a series‐resonant circuit. The proposed power decoupling method stores the input power ripple at double the line frequency in the filter capacitors. Therefore, the proposed method achieves a unity power factor in ac input and a constant current amplitude in the high‐frequency output without any additional switching device or energy storage element. This paper theoretically discusses the principle and operating performance of the proposed power decoupling method, and the viability is confirmed by using an experimental isolated ac‐to‐dc converter based on the high‐frequency cycloconverter. As a result, the proposed power decoupling method effectively improved the displacement power factor in the line current to more than 0.99 and reduced the output voltage ripple to 4% without any electrolytic capacitor.