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A physics-based compact model for the thermal impedance of vertical bipolar transistors, fabricated with full dielectric isolation, is presented. The model compares favorably to both three dimensional (3-D) ANSYS(R) transient simulations and measurements. Using the software package Thermal Impedance Pre-Processor (TIPP), a multiple-pole circuit can be fitted to the thermal impedance model. The thermal equivalent circuit is used in conjunction with a modified version of SPICE to give efficient electrothermal simulations in the dc and transient regimes  相似文献   

4.
A physics-based model for time dependent dielectric breakdown has been developed, and is presented along with test data obtained by NIST on oxides provided by National Semiconductor. Testing included fields from 5.4 MV/cm to 12.7 MV/cm, and temperatures ranging from 60 °C to 400 °C. The physics, mathematical model, and test data, all confirm a linear, rather than an inverse field dependence. The primary influence on oxide breakdown was determined to be due to the dipole interaction energy of the field with the orientation of the molecular dipoles in the dielectric. The resultant failure mechanism is shown to be the formation and coalescence of vacancy defects, similar to that proposed by Dumin et al.  相似文献   

5.
A simple MOS model that is suitable for hand calculations, but which includes the effect of normal and tangential electric fields on carrier mobility, is described. This device model is derived from semiphysical models for the field dependence of carrier mobility to accurately predict the effect of reduced dimensions. Fitting parameters for n-channel transistors were extracted. The model is used to examine the effect of reduced mobility at high electric fields on logic switching speed and device transconductance.  相似文献   

6.
The Berkeley short-channel IGFET model (BSIM), an accurate and computationally efficient MOS transistor model, and its associated characterization facility for advanced integrated-circuit design are described. Both the strong-inversion and weak-inversion components of the drain current expression are included. In order to speed up the circuit-simulation execution time, the dependence of the drain current on the substrate bias has been modeled with a numerical approximation. This approximation also simplifies the transistor terminal-charge expressions. The charge model was derived from its drain-current counterpart to preserve consistency of device physics. Charge conservation is guaranteed in this model.  相似文献   

7.
A two-dimensional self consistent MOS transistor model accounting for the avalanche effect is described. The classical semiconductor equations—Poisson's equation and the two carrier equations—are solved with the finite difference method. The pair production rate is evaluated at any mesh point and dominates the inhomogeneity term of the carrier continuity equations in case of avalanche. Calculated and measured current-voltage characteristics are in good agreement and thus support our model. For a 3 μm device the electrical potential, the carrier densities, and the generation rates are shown in quasi three-dimensional plots from which the avalanche generation in the pinch-off region becomes apparent. Furthermore, hole storage close to the interface is seen to take place in the channel up to the vicinity of the source region. The corresponding barrier lowering leads to increased electron injection from the source and enhanced avalanche. The barrier lowering is supported by the influence of the parasitic bulk resistance.  相似文献   

8.
Designers need accurate models to estimate 1/f noise in MOS transistors as a function of their size, bias point, and technology. Conventional models present limitations; they usually do not consistently represent the series-parallel associations of transistors and may not provide adequate results for all the operating regions, particularly moderate inversion. In this brief, we present a consistent, physics-based, one-equation-all-regions model for flicker noise developed with the aid of a one-equation-all-regions dc model of the MOS transistor.  相似文献   

9.
《Microelectronics Journal》2007,38(8-9):894-899
In the first part of this paper, we present simulations of single-electron transistor (SET) output characteristic using Maple. Typical SET IV characteristics and charge energies curves are presented by developing Maple programs. In the second part of this work, we develop a new model without considering quantum effects using the superposition theorem, transfer function and Laplace transformer. Finally, we propose a new bloc using SIMPLORER 7.0 simulator to modulate quantum effects in the SET island. This model is based on a parallel analog–digital converter.  相似文献   

10.
A lateral p-n-p compact model, suitable for computer-aided circuit design purposes, is introduced. In this formulation, called MODELLA, the equivalent circuit topology, analytical equations, and model parameters are derived directly from the physics and structure of the lateral p-n-p. MODELLA incorporates current crowding effects, substrate effects, and a bias-dependent output conductance and it uses the approach to lateral p-n-p high injection modeling whereby the main currents and charges are independently related to bias-dependent minority-carrier concentrations. Model-specific aspects of the parameter determination strategy are discussed; the Ning-Tang resistance determination method, for example, is shown to be highly suitable for lateral p-n-p devices. The effectiveness of this strategy and the improved performance of this physics-based formulation become evident in comparisons between MODELLA and the standard SPICE Gummel-Poon model using measured device characteristics  相似文献   

11.
High-voltage double diffused metal-oxide semiconductor transistors (DMOST's) have been fabricated with drain-source breakdown voltage greater than 200 V. This paper describes an experimental and theoretical study of the current-voltage behavior of these devices leading to a two-component MOS field effect transistor (MOSFET)-resistor model appropriate for computer-aided circuit design. The effects of velocity saturation, mobility reduction, and nonuniform impurity concentration in the channel, and of spreading resistance in the drift region are considered. Parameter extraction for experimentally characterizing these effects is described. Comparison of experimental and theoretical results shows that the model accurately predicts the device I/V characteristics. The range of validity of the model is limited primarily by high current saturation effects.  相似文献   

12.
A new charge-control relation is derived for heterojunction bipolar transistors. The relation is valid for arbitrary doping density profiles and for all levels of injection in the base. It is applicable to both single- and double-heterojunction transistors. The model is an improvement over another recently proposed charge-control model that was valid only for constant doping density and low injection in the base. Large- and small-signal equivalent circuit models are also presented for heterojunction bipolar transistors. Comparisons with numerical and experimental data show excellent agreement  相似文献   

13.
An approach to the application of the charge pumping technique is proposed as a tool for the measurement of interface trap energy distributions in small area MOS transistors. The new approach is spectroscopic in nature, i.e., only one energy window is defined, and forced to move through the bandgap by changing the sample temperature. This method has the advantages of addressing a larger part of the bandgap as compared to the classical approach, of reducing the complication in the processing of the data, and of yielding information about the hole and electron capture cross sections separately. Experiments performed on both n-channel and p-channel MOS transistors reveal that, in the temperature (energy) range studied, the interface-trap distribution is slowly varying with energy and that the trap capture cross section is nearly constant over energy and temperature  相似文献   

14.
A new five-parameter MOS transistor mismatch model is introduced capable of predicting transistor mismatch with very high accuracy for ohmic and saturation regions, including short-channel transistors. The new model is based on splitting the contribution of the mobility degradation parameter mismatch Δ&thetas; into two components, and modulating them as the transistor transitions from ohmic to saturation regions. The model is tested for a wide range of transistor sizes (30), and shows excellent precision, never reported before for such a wide range of transistor sizes, including short-channel transistors  相似文献   

15.
A model for current gain and cutoff frequency falloff at high currents for bipolar transistors is proposed. The model is based on considering that the vertical and lateral base widening occur simultaneously for a typical bipolar transistor. The results of this model successfully fit Pisces-2B simulation results  相似文献   

16.
《Solid-state electronics》1987,30(7):723-728
An accurate analytic evaluation of emitter injection into an arbitrarily doped emitter (including a polysilicon-contacted emitter) is presented taking into account position-dependent quantities such as bandgap narrowing, Auger recombination and mobility. Two newly defined dimensionless parameters are introduced that are very useful for emitter design. These parameters are proposed to replace the conventional emitter Gummel number which becomes less useful when appreciable recombination takes place in the emitter. Universal emitter design curves are presented for devices made in silicon, GaAs and InGaAsP or in any other semiconductor for which a newly introduced lifetime model holds good. Numerical simulations show the accuracy and usefulness of the analytical model developed.  相似文献   

17.
A quantitative understanding of MOS-transistor speed has been slow to emerge because of the absence of a commonly agreed-upon figure of merit for MOS-transistor speed and a lack of familiarity among designers with MOS-amplifier topologies. It is suggested that these problems can be addressed through the use of the unity-gain current frequency (f T) as a figure of merit for MOS transistors, the use of fT in the prediction of amplifier bandwidth, and a wider familiarity among designers with practical examples of MOS wideband amplifiers. The use of fT as a figure of merit is discussed, and the achievable amplifier bandwidths are determined. Increasing the fT of an MOS device by making the gm larger or the Cg smaller, or both, is discussed. Wideband CMOS amplifiers are considered  相似文献   

18.
A comprehensive physics-based three-dimensional (3-D) model for distributed feedback (DFB) lasers is developed and presented. The model considers self-consistently optical confinement, carrier transport and heat transfer over the two-dimensional (2-D) cross section. It also accounts for the longitudinal spatial hole-burning effect along the laser cavity. A rigorous optical gain model is incorporated into the 3-D model. A number of novel techniques are used in implementation of the model for efficient simulation of de and ac performance. The simulator runs efficiently on a personal computer and can be incorporated as part of the computer-aided engineering tools for the design and analysis of DFB lasers  相似文献   

19.
A physics-based MOSFET noise model for circuit simulators   总被引:5,自引:0,他引:5  
Discussed is a physics-based MOSFET noise model that can accurately predict the noise characteristics over the linear, saturation, and subthreshold operating regions but which is simple enough to be implemented in any general-purpose circuit simulator. Expressions for the flicker noise power are derived on the basis of a theory that incorporates both the oxide-trap-induced carrier number and correlated surface mobility fluctuation mechanisms. The model is applicable to long-channel, as well as submicron n- and p-channel MOSFETs fabricated by different technologies, and all the model parameters can be easily extracted from routine I-V and noise measurements  相似文献   

20.
Design equations for the Metal-Oxide-Semiconductor Field Effect Transistor are developed. Approximate solutions for static characteristics, transconductance, and frequency cutoff are presented for the case of a very high resistivity substrate. Specific sets of static characteristics from computer calculations are presented graphically to illustrate the effects of oxide thickness and various substrate resistivities.  相似文献   

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