Electrical properties of low-dielectric-constant films prepared by PECVD in O2/CH4/HMDSO

Low-dielectric constant (low-k) films have been prepared by plasma-enhanced chemical vapor deposition (PECVD) from hexamethyldisiloxane (HMDSO) mixed with oxygen or methane. The films are analyzed by ellipsometry, infrared absorption spectroscopy while their electrical properties are deduced from C–V, I–V and R–f measurements performed on Al/insulator/Si structures. For an oxygen and methane fraction equal to 50% and 22%, respectively, the dielectric constant and losses are decreased compared with those of the film prepared in a pure HMDSO plasma. The effect of adding 22% of CH₄ in HMDSO plasma increases the Si–CH₃ bonds containing in the polymer film and as the constant of methyl groups in the film increased the dielectric constant of the film decreases. For this film, the dielectric constant is 2.8, the dielectric losses at 1 kHz are equal to 2×10⁻³, the leakage current density measured for an electric field of 1 MV/cm is 3×10⁻⁹ A/cm² and the breakdown field is close to 5 MV/cm.     

Investigation of TiO2 on AlGaAs prepared by liquid phase deposition and its application

The study explored titanium dioxide (TiO₂) on aluminum gallium arsenide (AlGaAs) prepared by liquid phase deposition (LPD) at 40 °C. The leakage current density was about 8.4 × 10^?6 A/cm² at 1 MV/cm. The interface trap density (D_it) and the flat-band voltage shift (ΔV_FB) were 2.3 × 10¹² cm^?2 eV^?1 and 1.2 V, respectively. After rapid thermal annealing (RTA) in the ambient N₂ at 350 °C for 1 min, the leakage current density, D_it, and ΔV_FB were improved to 2.4 × 10^?6 A/cm² at 1 MV/cm, 7.3 × 10¹¹ cm^?2 eV^?1, and 1.0 V, respectively. Finally, the study demonstrates the application to the AlGaAs/InGaAs metal–oxide–semiconductor pseudomorphic high-electron-mobility transistor (MOS-PHEMT). The results indicate the potential of the proposed device with a LPD-TiO₂ gate oxide for power application.     

On the current conduction mechanisms of CeO2/La2O3 stacked gate dielectric

It was found that the electrical properties of CeO₂/La₂O₃ stack are much better than a single layer La₂O₃ film. A thin CeO₂ capping layer can effectively suppress the oxygen vacancy formation in the La₂O₃ film. This work further investigates the current conduction mechanisms of the CeO₂ (1 nm thick)/La₂O₃ (4 nm thick) stack. Results show that this thin stacked dielectric film still has a large leakage current density; the typical 1−V leakage can exceed 1 mA/cm² at room temperature. The large leakage current should be due to both the oxide defect centers as well as the film structure. Results show that at low electric field (<0.2 MV/cm), the thermionic emission induced current conduction in this stacked structure is quite pronounced as a result of interface barrier lowering due to the capping CeO₂ film which has a higher k value than that of the La₂O₃ film. At higher electric fields, the current conduction is governed by Poole–Frenkel (PF) emission via defect centers with an effective energy level of 0.119 eV. The temperature dependent current–voltage characteristics further indicate that the dielectric defects may be regenerated as a result of the change of the thermal equilibrium of the redox reaction in CeO₂ film at high temperature and the drift of oxygen under the applied electric field.     

TiSiOx gate dielectrics produced by reactive sputtering for high performance InGaZnO thin film transistors

High dielectric constant TiSiOx thin films are produced by reactive sputtering under different oxygen partial pressure ratio (P_O2) from 15% to 30%. All the TiSiOx films show an excellent transmittance value of almost 95%. The TiSiOx film has a low leakage current density by optimizing oxygen partial pressure, and the leakage current density of TiSiOx film under P_O2 of 20% is 4.88×10⁻⁷ A/cm² at electrical field strength of 2 MV/cm. Meanwhile, their associated InGaZnO thin-film transistors (IGZO-TFTs) with different P_O2 TiSiOx thin films as gate insulators are fabricated. IGZO-TFTs under P_O2 of 20% shows an optimized electrical performance, and the threshold voltage, sub-threshold swing, field effect mobility and I_on/I_off ratio of this device are 2.22 V, 0.33 V/decade, 29.3 cm²/V s and 5.03×10⁷, respectively. Moreover, the density of states (DOS) is calculated by temperature-dependent field-effect measurement. The enhancements of electrical performance and temperature stability are attributed to better active/insulator interface and smaller DOS.     

Ultra-thin polymer gate dielectrics for top-gate polymer field-effect transistors

We have demonstrated top-gate polymer field-effect transistors (FETs) with ultra-thin (30–50 nm), room-temperature crosslinkable polymer gate dielectrics based on blending an insulating base polymer such as poly(methyl methacrylate) with an organosilane crosslinking agent, 1,6-bis(trichlorosilyl)hexane. The top-gate polymer transistors with thin gate dielectrics were operated at gate voltages less than ?8 V with a relatively high dielectric breakdown strength (>3 MV/cm) and a low leakage current (10–100 nA/mm² at 2 MV/cm). The yield of thin gate dielectrics in top-gate polymer FETs is correlated with the roughness of underlying semiconducting polymer film. High mobilities of 0.1–0.2 cm²/V s and on and off state current ratios of 10⁴ were achieved with the high performance semiconducting polymer, poly(2,5-bis(3-alkylthiophen-2yl)thieno[3,2-b]thiophene.     

Mechanical stress field assisted charge de-trapping in carbon doped oxides

Leakage current and dielectric breakdown effects are conventionally studied under electrical fields alone, with little regard for mechanical stresses. In this letter, we demonstrate that mechanical stress can influence the reliability of dielectrics even at lower field strengths. We applied tensile stress (up to 8 MPa) to a 33% porous, 504 nm thick carbon doped oxide thin film and measured the leakage current at constant electrical fields (up to 2.5 MV/cm). The observed increase in leakage current at relatively low electric fields suggests that mechanical stress assists in trap/defect mediated conduction by reducing the energy barrier potential to de-trap charges in the dielectric.     

Electron mobility of rare earth complexes measured by transient electroluminescence method

Electron mobility of gadolinium/europium (dibenzoylmethanato)₃(bathophenanthroline) (Gd/Eu(DBM)₃ bath) was measured by transient electroluminescence (EL) method. Although electron mobility of the two complexes were expected to be same, the value of mobility (1.2 × 10⁻⁴ cm²/Vs at electric field of 1 MV/cm) of Eu(DBM)₃ bath complex was bigger than that (8 × 10⁻⁵ cm²/Vs at electric field of 1 MV/cm) of Gd(DBM)₃ bath complex. It was found to be related to the different luminescent mechanisms of active materials and recombination zones in the devices. According to this, penetration length of hole injected into electron transport layer of Eu(DBM)₃ bath was estimated.     

Self-aligned inversion n-channel In0.2Ga0.8As/GaAs metal–oxide–semiconductor field-effect-transistors with TiN gate and Ga2O3(Gd2O3) dielectric

A self-aligned process for fabricating inversion n-channel metal–oxide–semiconductor field-effect-transistors (MOSFET’s) of strained In_0.2Ga_0.8As on GaAs using TiN as gate metal and Ga₂O₃(Gd₂O₃) as high κ gate dielectric has been developed. A MOSFET with a 4 μm gate length and a 100 μm gate width exhibits a drain current of 1.5 mA/mm at V_g = 4 V and V_d = 2 V, a low gate leakage of <10^?7 A/cm² at 1 MV/cm, an extrinsic transconductance of 1.7 mS/mm at V_g = 3 V, V_d = 2 V, and an on/off ratio of ～10⁵ in drain current. For comparison, a TiN/Ga₂O₃(Gd₂O₃)/In_0.2Ga_0.8As MOS diode after rapid thermal annealing (RTA) to high temperatures of 750 °C exhibits excellent electrical and structural performances: a low leakage current density of 10^?8–10^?9 A/cm², well-behaved capacitance–voltage (C–V) characteristics giving a high dielectric constant of ～16 and a low interfacial density of state of ～(2～6) × 10¹¹ cm^?2 eV^?1, and an atomically sharp smooth Ga₂O₃(Gd₂O₃)/In_0.2Ga_0.8As interface.     

Organic field-effect transistors based on low-temperature processable transparent polymer dielectrics with low leakage current

A solution-based transparent polymer was investigated as the gate dielectric for organic field-effect transistors (OFETs). Organic thin films (400 nm) are readily fabricated by spin-coating a polyhydrazide solution under ambient conditions on the ITO substrates, followed by annealing at a low temperature (120 °C). The smooth transparent dielectrics exhibited excellent insulating properties with very low leakage current densities of ～10^?8 A/cm². High performance OFETs with evaporated pentacene as organic semiconductor function at a low operate voltage (?15 V). The mobility could reach as high as 0.7 cm²/Vs and on/off current ratio up to 10⁴. Solution-processed TIPS-pentacene OFETs also work well with this polymer dielectric.     

Structural and electrical properties of radio frequency magnetron sputtered tantalum oxide films: Influence of post-deposition annealing

The as-deposited and annealed radio frequency reactive magnetron sputtered tantalum oxide (Ta₂O₅) films were characterized by studying the chemical binding configuration, structural and electrical properties. X-ray photoelectron spectroscopy and X-ray diffraction analysis of the films elucidate that the film annealed at 673 K was stoichiometric with orthorhombic β-phase Ta₂O₅. The dielectric constant values of the tantalum oxide capacitors with the sandwich structure of Al/Ta₂O₅/Si were in the range from 14 to 26 depending on the post-deposition annealing temperature. The leakage current density was <20 nA cm^?2 at the gate bias voltage of 0.04 MV/cm for the annealed films. The electrical conduction mechanism observed in the films was Poole–Frenkel.     

Characterization of MIS structures and thin film transistors using RF-sputtered HfO2/HIZO layers

MIS structures using HfO₂ and HIZO layers, both deposited by room temperature RF magnetron sputtering are fabricated for TFTs application and characterized using capacitance-voltage. The relative dielectric constant obtained at 1 kHz was 11, the charge carrier concentration of the HIZO was in the range of (2–3) × 10¹⁸ cm^− 3 and the interface trap density at flat band was smaller than 2 × 10¹² cm^− 2. The critical electric field of the HfO₂ layer was higher than 5 × 10⁵ V/cm, with a current density in the operating voltage range below 4 × 10^− 8 A/cm². The hysteresis and bias stress behavior of RF-sputtered HfO₂/HIZO MIS structures is presented. Fabricated HfO₂/HIZO TFTs worked in the operation voltage range below 8 V.     

Challenges and performance limitations of high-k and oxynitride gate dielectrics for 90/65 nm CMOS technology

For low power applications, the increase of gate leakage current, caused by direct tunneling in ultra-thin oxide films, is the crucial factor eliminating conventional SiO₂-based gate dielectrics in sub-90 nm CMOS technology development. Recently, promising performance has been demonstrated for poly-Si/high-k and poly-Si/SiON gate stacks in addressing gate leakage requirements for low power applications. However, the use of poly-Si gate electrodes on high-k created additional issues such as channel mobility and reliability degradations, as well as Fermi level pinning of the effective gate work function. Therefore, oxynitride gate dielectrics are being proposed as an intermediate solution toward the sub-65/45 nm nodes. Apparently, an enhanced SiON gate dielectric stack was developed and reported to achieve high dielectric constant and good interfacial properties. The purpose of this paper is to provide a comprehensive review some of the device performance and limitation that high-k and oxynitride as dielectric materials are facing for sub-65/45 nm node.     

Organic thin film transistors with double insulator layers

We have investigated a double-layer structured gate dielectric for the organic thin films transistor (OTFT) with the purpose of improving the performance of the SiO₂ gate insulator. A 50 nm PMMA layer was coated on top of the SiO₂ gate insulator as organic insulator layer. The results demonstrated that using inorganic/organic compound insulator as the gate dielectric layers is an effective method to fabricate OTFTs with improved electric characteristics and decreased leakage current. Electrical parameters such as carrier mobility and on/off ratio by field effect measurement have been calculated. OTFT based on highly doped Si substrate with a field-effect mobility of 0.004 cm²/V s and on/off ratio of 10⁴ have been obtained.     

Photo-patternable polyimide gate insulator with fluorine groups for improving performance of 2,7-didecyl[1]benzothieno[3,2-b][1]benzothiopene (C10-BTBT) thin-film transistors

Surface properties of gate insulators strongly affect the device performance of organic thin-film transistors (OTFTs). To improve the performance of OTFTs, we have developed photo-sensitive polyimide gate insulator with fluorine groups. The polyimide gate insulator film could be easily patterned by selective UV exposure without any photoinitiator. The polyimide gate insulator film, fabricated at 130 °C, has a dielectric constant of 2.8 at 10 kHz, and leakage current density of <1.6 × 10^?10 A/cm² while biased from 0 to 90 V. To investigate the potential of the polyimide with fluorine groups as a gate insulator, we fabricated C₁₀-BTBT TFTs. The field-effect mobility and the on/off current ratio of the TFTs were measured to be 0.76 ± 0.09 cm²/V s and >10⁶, respectively.     

Dry growth of n-octylphosphonic acid monolayer for low-voltage organic thin-film transistors

Dry method for monolayer deposition of n-octylphosphonic acid (C₈PA) on the surface of aluminium oxide (AlO_x) is presented. Vacuum thermal evaporation is employed to deposit initial thickness corresponding to several C₈PA monolayers, followed by a thermal desorption of the physisorbed C₈PA molecules. AlO_x functionalized with such C₈PA monolayer exhibits leakage current density of ～10^?7 A/cm² at 3 V, electric breakdown field of ～6 MV/cm, and a root-mean-square surface roughness of 0.36 nm. The performance of low-voltage pentacene thin-film transistors that implement this dry AlO_x/C₈PA gate dielectric depends on C₈PA desorption time. When the desorption time rises from 25 to 210 min, the field-effect mobility increases from ～0.02 to ～0.04 cm²/V s, threshold voltage rises from ～?1.2 to ～?1.4 V, sub-threshold slope decreases from ～120 to ～80 mV/decade, off-current decreases from ～5 × 10^?12 to ～1 × 10^?12 A, on/off current ratio rises from ～3.8 × 10⁴ to ～2.5 × 10⁵, and the transistor hysteresis decreases from 61 to 26 mV. These results collectively support a two stage model of the desorption process where the removal of the physisorbed C₈PA molecules is followed by the annealing of the defect sites in the remaining C₈PA monolayer.     

Constant current stress of lightly Al-doped Ta2O5

The response of lightly Al-doped Ta₂O₅ stacked films (6 nm) to constant current stress (CCS) under gate injection (current stress in the range of 1 to 30 mA/cm² and stressing time of 50–400 s) has been investigated. The stress creates positive oxide charge, which is assigned to oxygen vacancies but it does not affect the dielectric constant of the films. The most sensitive parameter to the stress is the leakage current. Different degradation mechanisms control the stress-induced leakage current (SILC) in dependence on both the stress conditions and the applied measurement voltage. The origin of SILC is not the same as that in pure and Ti- or Hf-containing Ta₂O₅. The well known charge trapping in pre-existing traps operates only at low level stress resulting in small SILC at accumulation. The new trap generation plays a key role in the SILC degradation and is the dominant mechanism controlling the SILC in lightly Al-doped Ta₂O₅ layers.     

Improved interfacial quality of GaAs metal-oxide-semiconductor device with NH3-plasma treated yittrium-oxynitride as interfacial passivation layer

The interfacial and electrical properties of GaAs metal-oxide-semiconductor capacitors with yittrium-oxynitride interfacial passivation layer treated by N₂ −/NH₃-plasma are investigated, showing that lower interface-state density (1.24 × 10¹² cm^− 2 eV^− 1 near midgap), smaller gate leakage current density (1.34 × 10^− 5 A/cm² at V_fb + 1 V), smaller capacitance equivalent thickness (1.43 nm), and larger equivalent dielectric constant (24.5) can be achieved for the sample with NH₃-plasma treatment than the samples with N₂ −/no-plasma treatment. The mechanisms lie in the fact that NH₃-plasma can provide not only N atoms, but H atoms and NH radicals to effectively passivate the high-k/GaAs interface, thus less pinning the Femi level at high-k/GaAs interface.     

Characteristics of ZnOV2O5MnO2Nb2O5Er2O3 semiconducting varistors with sintering processing

The effects of sintering temperature on the microstructure, electrical properties, and dielectric characteristics of ZnOV₂O₅MnO₂Nb₂O₅Er₂O₃ semiconducting varistors have been studied. With increase in sintering temperature the average grain size increased (4.5–9.5 μm) and the density decreased (5.56–5.45 g/cm³). The breakdown field decreased with an increase in the sintering temperature (6214–982 V/cm). The samples sintered at 900 °C exhibited remarkably high nonlinear coefficient (50). The donor concentration increased with an increase in the sintering temperature (0.60×10¹⁸–1.04×10¹⁸ cm^?3) and the barrier height exhibited the maximum value (1.15 eV) at 900 °C. As the sintering temperature increased, the apparent dielectric constant increased by more than four-fold.     

Charge trapping in ultrathin Gd2O3 high-k dielectric

Charge trapping in ultrathin high-k Gd₂O₃ dielectric leading to appearance of hysteresis in C-V curves is studied by capacitance-voltage and current-voltage techniques. It was shown that the large leakage current at a negative gate voltage causes the generation of the positive charge in the dielectric layer, resulting in the respective shift of the C-V curve. The capture cross-section of the hole traps is around 2 × 10⁻²⁰ cm². The distribution of the interface states was measured by conductance technique showing the concentration up to 7.5 × 10¹² eV⁻¹ cm⁻² near the valence band edge.     

Exploration on the P(VP-co-VAc) copolymer based gel polymer electrolytes doped with quaternary ammonium iodide salt for DSSC applications: Electrochemical behaviors and photovoltaic performances

Gel polymer electrolytes (GPEs) consisting of poly(1-vinylpyrrolidone-co-vinyl acetate) P(VP-co-VAc) with the different tetrapropylammonium iodide (TPAI) salt concentration are prepared. The dielectric and electric dispersion behaviors of the GPEs are studied by dielectric relaxation spectroscopy at room temperature. The dielectric studies imply that dielectric constant (ε′) and dielectric loss (ε″) values decrease with increase in frequency at lower frequency region whereas frequency independent behavior is observed in the high frequency region. The trend of the dispersion part of the electric modulus shows a shift towards higher region of frequency indicating shorter relaxation time with an increase in TPAI concentration. The GPE samples were observed to obey Arrhenius behavior and the highest ionic conductivity obtained is 1.60 × 10⁻³ S cm⁻¹ at room temperature. The GPE samples are then fabricated into dye sensitized solar cells for photovoltaic studies. Highest efficiency of 3.07% is obtained with short circuit current density of 6.86 mA cm⁻², open circuit voltage of 727 mV and fill factor of 62%.