一种实用的开关电源EMI滤波器的设计方法

根据CISPER EN550022标准提出了一种实用的开关电源EMI滤波器设计方法.它基于线上共模噪声和差模噪声原理,用一种特殊的分离器将电磁干扰噪声分离成共模噪声和差模噪声.传导发射是根据CISPER EN550022标准,通过线性阻抗稳定网络和接收机进行测试.通过分析噪声源的阻抗特性,确定了滤波器的结构.利用MathCAD进行仿真,根据CISPER EN550022标准实施实验,验证了该设计方法的可行性.     

基于EMI滤波器的逆变器传导电磁干扰的抑制

由于干扰源和负载阻抗对EMI滤波器的滤波效果有很大影响,根据PWM逆变器的传导干扰源和负载阻抗的特点,在已有的EMI滤波器结构选取原则的基础上,提出了一种设计EMI滤波器的方法,使得EMI噪声到达LISN时,经过了最大限度的衰减,给出了共模和差模干扰的设计实例,实验结果表明,该方法简单、有效.     

基于合成扼流圈的开关电源EMI滤波器设计

为改善传统EMI滤波器的滤波性能,分析并采用了合成扼流圈来替代传统分立扼流圈,并根据滤波器阻抗失配原理,通过分析LISN网络与噪声源的阻抗特性,分别对共差模等效电路进行分析与设计,提出了基于合成扼流圈的开关电源EMI滤波器设计方法.试验结果证明,此方法是有效的,并已成功地应用在燃料电池轿车用DC/DC变换器的控制电路板设计中.     

通过改变噪声源阻抗抑制高频共模噪声

开关电源的电磁干扰噪声源阻抗在电磁兼容性设计中是个非常重要的参数。通常差模噪声相对容易识别和抑制,但要掌握共模噪声的特征仍然是比较困难的,因而共模噪声需要引起更多的关注。本文根据一种简单的共模噪声源模型,提出了通过控制共模噪声源阻抗,抑制功率变流器的高频共模噪声。实验和电磁干扰噪声测试结果证实了这种共模噪声抑制方法的有效性。     

一种简单的通信电源EMI滤波器的分析与设计

介绍一种简单新颖的通信电源EMI滤波器设计方法。通过测试EMI噪声源的最大和最小差模源阻抗和共模源阻抗,计算出差模和共模噪声源的大小,并以此为依据设计EMI滤波器。该方法无需考虑电源的拓扑结构和控制算法,改善了传统滤波器过于复杂和基于理想化模型的设计方法。最后通过对800W样机实验验证了所介绍的滤波器设计方法的正确性和可行性。     

降低电机逆变系统电磁污染的软开关技术研究

分析了传统的硬开关PWM逆变传动系统中传导电磁干扰的产生源和传播路径.为了减少传导电磁干扰,应用一种新型的直流环节并联谐振软开关逆变器,阐述了软开关逆变器的工作原理及其特点.采用线阻抗稳定网络.分别在硬开关和软开关的条件下,对一台60kW的IGBT交流逆变系统的EMI传导噪声进行了测量,并对硬开关和软开关逆变器的EMI噪声频谱进行了对比.     

LNA characterization methodologies

Joint characterization of low‐noise amplifiers regarding stochastic and deterministic parameters based on output power measurement for a set of known input termination impedances is considered. As an advantage of this method, both noise parameters and the input impedance can be obtained for narrow and broad band applications without special equipment. This method is mathematically developed and practically verified by simulations and measurements. With the knowledge of at least four real‐valued stochastic, and three real‐valued deterministic parameters, the amplifier is characterized, and the noise figure, gain, and input reflection can be calculated as function of the matching network. Two different ways of processing measured data will be shown. Advantages of the proposed method compared with established methods are as follows:

• No special equipment (e.g., network analyzer, calibrated noise source, noise figure meter, slide screw tuner,…) is needed, just a tunable power meter with known noise bandwidth.
• The four real‐valued noise parameters can be obtained with four terminating impedances only.
• With three additional terminating impedances, the input impedance of the low‐noise amplifiers can be obtained.
• With every additional terminating impedance, the accuracy of the measurement is improved.
• Outliers are detected and eliminated.

Copyright © 2016 John Wiley & Sons, Ltd.     

用于开关电源的EMI滤波器设计

给出了用转移矩阵【A】参数法分析电源EMI滤波器插入损耗的具体方法,介绍了电源EMI滤波器的几种基本结构。通过分析LISN网络和EMI噪声的特性,分别对共差模等效电路进行分析与设计。结合所要通过的EMC标准计算所需的插入损耗,选择合适的元器件构造电源EMI滤波器,最后通过试验验证了设计方法的正确性。     

基于噪声源阻抗估测的单相并网逆变器传导电磁干扰滤波器的设计

随着半导体材料技术的不断发展,应用在逆变器系统中的电力开关管的开关频率可以达到十几、几十乃至几百kHz,从而在开关管处产生很大的di/dt和du/dt,因此与逆变系统各部分之间或者系统与地之间的寄生电感和电容耦合产生共模或差模干扰。干扰噪声主要是以传导的形式流通于系统中,对逆变系统的控制部分和周围设备的正常工作产生极大影响。基于噪声源的阻抗特性,通过可操作性较强的实验方法,测出源阻抗的数据来设计电磁干扰滤波器的各个参数,可使滤波器的设计更加有效,加快其设计进程,节省工程上EMI滤波器的整改时间。最后的仿真和实验中传导电磁干扰得到了有效抑制,验证了该方法的可行性和有效性。     

具有高阻接地故障辨识能力的和阻抗继电器

为构建应对单相高阻接地故障的后备保护,通过对线路两端测量阻抗信息的整合与分析,发现其测量值之和在区内故障时和区外故障时有较大差别,进而提出一种采集测量阻抗稳态值、判据具有自适应性且专门应对单相高阻接地故障的和阻抗继电器。仿真与分析表明该继电器能够反映高阻接地故障,受系统运行方式变化影响小,能够确保不误动,线路非全相运行时仍可靠工作,对数据同步性要求极低,反映高阻故障能力远优于纵联距离保护和纵联差动保护,能够有效补充现有主保护。     

开关电源传导干扰的诊断

诊断开关电源传导干扰的主要性质,分别测量共模干扰和差模干扰,是正确设计电源ＥＭＩ滤波器的第一步。介绍了共模干扰和差模干扰测量的三种方法,并讨论、比较了三种方法各自的优缺点。     

基于阻抗约束的谐波溯源方法

提出一种基于阻抗约束的公共连接点(PCC)主谐波源溯源方法。根据系统侧阻抗和用户侧阻抗固有特征,结合PCC处谐波电压电流测量信息,采用相量投影法判断系统侧的主谐波源,利用严格不等式制约判断用户侧的主谐波源。对于两侧阻抗性质不同的更复杂情况,采用几何学余弦定理和严格不等式追溯主谐波源,并从谐波源幅值大小和矢量关系加以验证。利用置信区间去除异常测量数据,对多场景实测数据进行谐波溯源分析,结果表明了文中方法的有效性。     

低成本高性能的共模和差模噪声分离技术

为了正确设计滤波器的参数，必须将共模和差模信号从线性阻抗稳定网络所测得的混合信号中分离出来。该文提出一种软硬件结合的低成本高性能的噪声分离技术，该技术共模信号是通过3个电阻组成的差模抑制网络分离出来的，差模信号则是根据共模和差模的定义，由软件方法计算得到的。文中对使用该方法可能存在的误差进行了估算。以1台600W 的直流电机系统产生的传导干扰为例，用此方法分离出共模和差模噪声信号，并根据分离结果设计了滤波器参数，最后给出系统接入此滤波器后传导干扰的频谱图。测量结果表明该系统的传导干扰发射在整个频段内均不超标，从而也证明了分离方法的有效性和实用性。     

Research of Impedance Characteristics for Medium-Voltage Power Networks

The general method to investigate the impedance characteristics with a network analyzer is discussed. The common properties of the impedance are studied based on two-months observation of two 10-kV medium-voltage power networks. Meanwhile, the difference of the impedance measured at the headside and tailside of a feeder, the impedance characteristic impacted by the operating mode of the power system, the time variance of the impedance, and the characteristic obtained from a different coupling mode are also studied carefully. The results show that the characteristic impedance is in correlation with the power system structure and its configurations, and its value is about several tenths of ohms. The input impedance varies scarcely with the time. The capacitor group connected to the bus has no influence on the input impedance. And the input impedances in common mode and differential mode are both symmetric. The impedance value in differential-mode coupling is higher than that in common-mode coupling     

A common‐gate common‐source low noise amplifier based RF front end with selective input impedance matching for blocker‐resilient receivers

This paper presents an integrated wideband radio frequency front end with improved blocker resilience achieved through selective voltage attenuation at both input and output nodes of the low noise amplifier (LNA). The architecture differs from traditional LNA architectures where blockers are only attenuated at LNA output node. The proposed dual attenuation is attained by designing a low intrinsic input impedance common‐gate common‐source LNA with capacitive feedback, together with an N‐path filtering load. The capacitive feedback across the LNA ensures that the selective N‐path filtering profile at the LNA output is transferred to the LNA input nodes creating a selective input impedance. Consequently, the achieved front‐end input impedance is low at blocker frequencies and matched to the source impedance at the desired frequencies, creating the desired voltage attenuation for blockers. Further, a detailed theoretical analysis of proposed architecture is presented, which leads to clear design guidelines. Evaluated in a 28‐nm fully depleted silicon‐on‐insulator complementary metal oxide semiconductor (CMOS) process, front end is designed for wideband operation from 0.7 to 2.7 GHz. It consumes 11‐mA current from a 1‐V supply (excluding local oscillator (LO) buffering) and possesses a maximum noise figure of 5.1 dB. The front end demonstrates an out‐of‐band blocker compression point of ?1.5 dBm and out‐of‐band IIP3 of +14 dBm at a 100‐MHz offset from LO frequency. In comparison with a traditional common‐gate common‐source LNA‐based front end with wideband input impedance matching, the proposed front end achieves 3.5‐dB improvement in the blocker compression point at a 100‐MHz offset from LO.     

三相PWM变换器传导干扰的预测分析

为了预测整流-逆变-感应电机系统的传导干扰,建立系统的共模和差模等效电路.等效电路由干扰源和耦合通道构成,用干扰源的数学模型代替电力电子器件开关时的非线性环节,对整流桥产生的共模和差模干扰采用傅里叶变换得出共模和差模干扰源的表达式,对逆变桥产生的共模和差模干扰采用双重傅里叶积分法得出干扰源的表达式,根据共模和差模传播路...     

±800 kV向家坝—上海特高压直流输电工程谐波阻抗等值研究

谐波阻抗等值在很大程度上决定了换流站交流滤波器的配置方案，直接影响换流站的平面布置、占地、投资等技术经济指标。在完善发电机、变压器、滤波器、线路等电气元件阻抗频率模型的基础上，采用NIMSCAN阻抗频率扫描程序对向家坝—上海±800 kV特高压直流输电工程进行了谐波阻抗等值计算。对两端电网典型运行方式及开断方式进行了优化，等值中考虑的最严重运行方式为N&;#61485;2方式，并对3、5、7次及高次特征谐波进行分区统计处理。采用详细的元件阻抗频率模型和分区统计可显著减小各次谐波阻抗、进而优化滤波器设计并简化滤波器配置方案。     

观音岩电站送出直流工程系统谐波阻抗特性研究

观音岩电站送出直流工程是南方电网异步联网工程的重要组成部分。相对于其他直流工程,该直流的特点主要有:1送受端换流站可能存在的运行方式较多;2受端换流站送出线路加装串补,且最终串补度尚未确定。针对观音岩电站送出直流工程的特点,采用NIMSCAN程序对该直流工程送受端换流站的系统谐波阻抗特性进行了研究。对于送端换流站,比较了联网运行方式和孤岛运行方式下的系统等值谐波阻抗特性;对于受端换流站,按照送电方向的不同对系统的谐波阻抗进行分别计算。最后,分析了换流站出线串补的串补度变化对系统谐波阻抗参数的影响。     

Low‐Noise Fully Differential Amplifiers Using JFET‐CMOS Integration Technology for Smart Sensors

In this paper, CMOS‐based low‐noise amplifiers with JFET‐CMOS technology for high‐resolution sensor interface circuits are presented. A differential difference amplifier (DDA) configuration is employed to realize differential signal amplification with very high input impedance, which is required for the front‐end circuit in many sensor applications. Low‐noise JFET devices are used as input pair of the input differential stages or source‐grounded output load devices, which are dominant in the total noise floor of DDA circuits. A fully differential amplifier circuit with pure CMOS DDA and three types of JFET‐CMOS DDAs were fabricated and their noise performances were compared. The results show that the total noise floor of the JFET‐CMOS amplifier was much lower compared to that of the pure CMOS configuration. The noise‐reduction effect of JFET replacement depends on the circuit configuration. The noise reduction effect by JFET device was maximum of about − 18 dB at 2.5 Hz. JFET‐CMOS technology is very effective in improving the signal‐to‐noise ratio (SNR) of a sensor interface circuit with CMOS‐based sensing systems. © 2008 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

全桥DC/DC变流器模块阻抗特性研究

模块阻抗特性的研究对于电力电子系统稳定性的判定具有重要的作用.本文详细分析了一种典型的全桥DC/DC变流器模块的输入输出阻抗特性,该模块采用电压模式控制方式,并且主要工作在CCM方式下.文中介绍和分析了系统环路增益对改善模块闭环阻抗特性的作用.实验表明,文中所提出的阻抗分析流程对其他类型电源模块的阻抗特性研究,具有很好的参考价值.