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1.
《International Journal of Circuit Theory and Applications》2017,45(12):2017-2033
When a local oscillator signal generation system is based on an LC oscillator and a frequency multiplier, the question of determining the optimal multiplication factor is a key issue. In this paper, the problem is addressed in order to minimize the 1/f 2 phase noise within a tuning range constraint. The analysis, with a practical graphical representation, reveals the oscillator phase noise dependence on the oscillating frequency in the transition from two different regimes, named the inductor‐limited quality factor and the capacitor‐limited quality factor. The results obtained enable the evaluation of the phase noise performance of systems based on a sub‐harmonic and super‐harmonic oscillators and how they compare with an oscillator in the fundamental mode. Crucial questions like the phase noise improvement that these systems can achieve are analytically answered. A design methodology is thus proposed and verified through measurements on a frequency source at 31 GHz, composed by a sub‐harmonic voltage‐controlled oscillator followed by an injection‐locked frequency tripler, dedicated to backhauling applications, designed on a BiCMOS process technology. The tuning range is 10%, and the phase noise at a 1‐MHz offset is −112 dBc/Hz. Copyright © 2017 John Wiley & Sons, Ltd. 相似文献
2.
Paolo Maffezzoni Dario D'Amore 《International Journal of Circuit Theory and Applications》2012,40(10):999-1018
This paper presents an original time‐domain analysis of the phase‐diffusion process, which occurs in oscillators due to the presence of white and colored noise sources. It is shown that the method supplies realistic quantitative predictions of phase‐noise and jitter and provides useful design‐oriented closed‐form expressions of such phenomena. Analytical expressions and numerical simulations are verified through measurements performed on a relaxation oscillator whose behavior is perturbed by externally controlled noise sources. Copyright © 2011 John Wiley & Sons, Ltd. 相似文献
3.
Hengameh Azizi Soolmaz Abbasalizadeh Hossein Miar-Naimi 《International Journal of Circuit Theory and Applications》2020,48(5):639-657
This paper analyzes the thermally induced phase noise and the up-conversion of flicker noise into phase noise of source injection coupled quadrature oscillator (SIC-QOSC), for the first time. Furthermore, this paper provides a complete analysis for the injection current of the SIC-QOSC and extracts the closed-form expressions for it for the first time, too. These expressions lead to obtaining the harmonics of the injection current as well as the oscillation amplitude, which is necessary for the phase noise analysis. To evaluate the extracted equations, this paper compares the calculated results with appropriate simulations. Comparisons confirm the accuracy of the proposed injection current expressions and the phase noise formulas. Using the closed-form equations of phase noise, designers can understand the SIC-QOSC's design tradeoffs and design the oscillator for given phase noise. 相似文献
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5.
Soolmaz Abbasalizadeh Mohsen Javadi Hossein Miar-Naimi 《International Journal of Circuit Theory and Applications》2019,47(10):1568-1584
This paper analyzes the thermally induced phase noise and the up-conversion of flicker noise into phase noise of rotary traveling-wave oscillator (RTWO). Based on the analyses, this paper extracts the closed-form formulas for the thermal and flicker phase noise of the RTWO. This paper compares the theoretical results with appropriate simulations to evaluate the accuracy of the derived closed-form formulas. Comparisons confirm the accuracy of the extracted phase noise formulas. By using the presented straightforward approach along with accurate phase noise formulas, the designers can understand the RTWO ' s design tradeoffs. Also, they can design the RTWO for a specific phase noise without needing lengthy simulations. 相似文献
6.
F. Plessas 《International Journal of Circuit Theory and Applications》2011,39(4):397-410
A superharmonic voltage‐controlled injection‐locked frequency divider, implemented using a modified Colpitts oscillator operating at 2.5, 5 and 10 GHz and a cross‐coupled LC oscillator operating at 1.25, 2.5 and 5 GHz, is demonstrated. The proposed triple‐band operation is achieved by employing a novel technique that uses pin‐diodes and negative power supply. The discrete dividers, built with low noise hetero‐junction FETs and high‐frequency SiGe BJTs, are described theoretically while their functionality is proven experimentally. Additionally, a short phase noise analysis, which is missing in the literature, is given. Phase noise, frequency range of operation, and locking range measurement results are presented. Finally, post‐layout simulation results of a 5 GHz fully differential injection‐locked frequency divider, implemented in a 0.25µm SiGe process are provided. Copyright © 2010 John Wiley & Sons, Ltd. 相似文献
7.
Svetozar S. Broussev Nikolay T. Tchamov 《International Journal of Circuit Theory and Applications》2013,41(4):347-368
This paper presents a comprehensive comparison between complementary metal‐oxide‐semiconductor (CMOS) LC‐oscillator topologies often used in GHz‐range transceivers. The comparison utilizes the time‐varying root‐locus (TVRL) method to add new insights into the operation of different oscillators. The paper focuses on the treatment of the TVRL trajectories obtained for different oscillators and establishes links between the trajectories and physical phenomena in oscillators. The evaluation of the root trajectories shows the advantages of the TVRL method for comparing oscillator topologies, which is also extended towards the analysis of voltage‐controlled oscillators. The necessary circuit simplifications required in closed‐form root‐locus analysis are avoided by the TVRL, which allows precise oscillator comparison and reveals details on the topology specifics. The derived conclusions have been verified by the Cadence Spectre‐RF simulator on 130‐nm CMOS process. Copyright © 2011 John Wiley & Sons, Ltd. 相似文献
8.
Luis Bica Oliveira Ahmed Allam Igor M. Filanovsky Jorge R. Fernandes Chris J. M. Verhoeven Manuel M. Silva 《International Journal of Circuit Theory and Applications》2010,38(7):681-688
Relaxation RC‐oscillators are notorious for their poor phase‐noise performance. However, there are reasons to expect a phase‐noise reduction in quadrature oscillators obtained by cross‐coupling two relaxation oscillators. We present measurements on 5 GHz oscillators, which show that in RC‐oscillators the coupling reduces both the phase‐noise and quadrature error, whereas in LC‐oscillators the coupling reduces the quadrature error, but increases the phase‐noise. A comparison using standard figures of merit indicates that quadrature RC‐oscillators may be a viable alternative to LC‐oscillators when area and cost are to be minimized. Copyright © 2009 John Wiley & Sons, Ltd. 相似文献
9.
Hojat Ghonoodi Hossein Miar‐Naimi 《International Journal of Circuit Theory and Applications》2014,42(11):1123-1138
This paper presents a novel approach to study the phase error in source injection coupled quadrature oscillators (QOs). Like other LC QOs, the mismatches between LC tanks are the main source of phase error in this oscillator. The QO is analyzed where the phase error and oscillation frequency are derived in terms of circuit parameters. The proposed analysis shows that the output phase error is a function of injection current and the current of source equivalent capacitor. As a result, it is shown that increasing of tail current and LC tank quality factor decreases the phase error. Derived equations show that the phase error can be cancelled and even controlled by adjusting bias currents. To evaluate the proposed analysis and consequent designed QO, a 5.5 GHz CMOS QO is designed and simulated using the practical 0.18 µm TSMC CMOS technology. The experiments show good agreement between analytical equations and simulation results. Copyright © 2013 John Wiley & Sons, Ltd. 相似文献
10.
为精确检测纳伏级微弱正弦信号的频率和幅值,构建了基于锁相环和Duffing振子的微弱信号混合检测系统。首先通过锁定输入锁相环的待测信号,完成信号频率的检测;然后利用锁相环输出的已知频率信号作为混沌系统的内置策动力信号,将输入到混沌系统的待测信号用Duffing振子进行幅值检测。仿真结果表明,混合系统可同时完成纳伏级微弱正弦信号的频率和幅值的检测,检测信号的最低信噪比为-22.23dB,且操作简单,工作量小,易于实现。 相似文献
11.
Omar Al‐Kharji Al‐Ali Nader Anani Saleh Al‐Araji Mahmoud Al‐Qutayri 《IEEJ Transactions on Electrical and Electronic Engineering》2014,9(1):15-23
This paper presents the design, analysis, simulation, and implementation of the architecture of a new nonuniform‐type digital phase‐locked loop (DPLL). The proposed loop uses a composite phase detector (CPD), which consists of a sample‐and‐hold unit and an arctan block. The CPD improves the system linearity and results in a wider lock range. In addition, the loop has an adaptive controller block, which can be used to minimize the overall system sensitivity to variations in the power of the input signal. Furthermore, the controller has a tuning mechanism that gives the designer the flexibility to customize the loop parameters to suit a particular application. These performance parameters include lock range, acquisition time, phase noise or jitter, and signal‐to‐noise ratio enhancement. The simulation results show that the proposed loop provides flexibility to optimize the major conflicting system parameters. A prototype of the proposed system was implemented using a field‐programmable gate array (FPGA), and the practical results concur with those obtained by simulation using MATLAB/Simulink. © 2013 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc. 相似文献
12.
Gang Li Chunfeng Zhang Naijia Liu Changsheng Liu 《IEEJ Transactions on Electrical and Electronic Engineering》2020,15(8):1160-1168
In the frequency domain semi‐airborne electromagnetic detection method, the receiving signal from the coil sensor contains a quantity of noise. In order to improve signal‐to‐noise ratio (SNR), a novel data processing method based on orthogonal phase‐locked amplification is proposed in this paper. By using GPS second‐pulse technology, the proposed method has good real‐time performance and high SNR. The amplitude and phase of the receiving signals can be easily resolved by simple arithmetical operation and stored in real time, which avoids the large error in the short‐term window signal. The proposed method can provide higher resolution in subsurface anomaly and better noise suppression capability. The measured results show that the proposed method amplitude error is less than 3%, and the phase error is less than 0.6° under the condition of double white noise. Noise suppression capability is 10 times of the existing system and resolution is up to 25 times. The smaller anomaly can be reflected more accurately. © 2020 Institute of Electrical Engineers of Japan. Published by Wiley Periodicals LLC. 相似文献
13.
S. M. Rezaul Hasan 《Electrical Engineering (Archiv fur Elektrotechnik)》2007,89(7):569-576
A novel 16-bit CMOS digitally controlled oscillator (DCO) is described. This CMOS DCO design is based on a delay programmable
differential latch and a novel digital control scheme which yields improved phase noise characteristics. Simulations of a
4-stage CMOS DCO using the 0.5 μm Agilent CMOS process parameters achieved a controllable frequency range of 750 MHz–1.6 GHz
with a monotone tuning range of around 1 GHz. Monte Carlo simulations indicate that the time-period jitter due to random supply
voltage fluctuations is under 250 ps for worst-case considerations. Also, phase noise was found to be in the range of −175 dBc
at a frequency of 600 KHz from the carrier at 1.5 GHz (for digital control word of 1512 H) after numerous iterations of Monte
Carlo simulations. FFT analysis indicate a total harmonic distortion (THD) of around − 57 dB for the DCO output signal. This
CMOS design would thus provide considerable performance enhancement in digital PLL applications. 相似文献
14.
Erik Pankratz Edgar Sánchez‐Sinencio 《International Journal of Circuit Theory and Applications》2014,42(9):871-938
This tutorial distills the salient phase‐noise analysis concepts and key equations developed over the last 75 years relevant to integrated circuit oscillators. Oscillator phase and amplitude fluctuations have been studied since at least 1938 when Berstein solved the Fokker–Planck equations for the phase/amplitude distributions of a resonant oscillator. The principal contribution of this work is the organized, unified presentation of eclectic phase‐noise analysis techniques, facilitating their application to integrated circuit oscillator design. Furthermore, we demonstrate that all these methods boil down to obtaining three things: (1) noise modulation function; (2) noise transfer function; and (3) current‐controlled oscillator gain. For each method, this paper provides a short background explanation of the technique, a step‐by‐step procedure of how to apply the method to hand calculation/computer simulation, and a worked example to demonstrate how to analyze a practical oscillator circuit with that method. This survey article chiefly deals with phase‐noise analysis methods, so to restrict its scope, we limit our discussion to the following: (1) analyzing integrated circuit metal–oxide–semiconductor/bipolar junction transistor‐based LC, delay, and ring oscillator topologies; (2) considering a few oscillator harmonics in our analysis; (3) analyzing thermal/flicker intrinsic device‐noise sources rather than environmental/parametric noise/wander; (4) providing mainly qualitative amplitude‐noise discussions; and (5) omitting measurement methods/phase‐noise reduction techniques. Copyright © 2013 John Wiley & Sons, Ltd. 相似文献
15.
F. Plessas A. Papalambrou G. Kalivas 《International Journal of Circuit Theory and Applications》2009,37(3):497-502
Subharmonic injection‐locking and self‐oscillating mixing functions of a modified Colpitts oscillator operating at 1 GHz are reported. The injection‐locking circuit, using a GaAs FET, is described theoretically and experimentally. Phase noise, power consumption and conversion gain measurements indicate that the proposed design is attractive for low‐cost, low‐power consumption front‐ends. Copyright © 2008 John Wiley & Sons, Ltd. 相似文献
16.
返波管振荡器由于具有带宽宽、输出频率连续可调、输出功率较大等优点在毫米波频段的信号源中得到了很多应用。如何利用频率合成技术把毫米波返波管振荡器的输出锁定在高频率稳定度的参考上,在毫米波频段提供宽带高频率稳定度的信号是返波管振荡器应用中的技术难点。本文针对返波管振荡器的特性,讨论了实现毫米波返波管振荡器锁相的技术方法,完成了某毫米波信号源的设计,取得了很好的效果。 相似文献
17.
参考信号发生器是频率合成系统的重要组成部分,是实现低噪声频率合成的基础。本文介绍了产生低相位噪声参考信号常用的技术方法,重点讨论了如何基于锁相环频率合成法实现极低相位噪声参考发生器的设计。最后基于本文讨论的技术方法,设计出了一种具有极低相位噪声的参考信号发生器,并给出了实验结果。该参考信号发生器应用于某高纯微波信号源中,取得了很好的效果。 相似文献
18.
Sajad Jahanbakht Forouhar Farzaneh 《International Journal of Circuit Theory and Applications》2015,43(11):1581-1596
Recent phase noise analysis techniques of oscillators mainly rely on solving a stochastic differential equation governing the phase noise process. This equation has been solved in the literature using a number of mathematical tools from probability theory like deriving the Fokker–Planck equation governing the phase noise probability density function. Here, a completely different approach for solving this equation in presence of white noise sources is introduced that is based on the Ito calculus for stochastic differential equations. Time‐domain analytical expressions for the correlation of the noisy variables of the oscillator are derived that in asymptotically large times give the steady‐state stochastic correlations as well as the power spectral densities of the variables. The validity of the new approach is verified by comparing its results against extensive Monte‐Carlo simulations. This approach is applied to an oscillator with a dielectric resonator at 4.127 GHz, and a very good agreement between its results with those of the Monte‐Carlo simulations and the previous approaches is observed. Copyright © 2014 John Wiley & Sons, Ltd. 相似文献
19.
Marco Guermandi Eleonora Franchi Antonio Gnudi 《International Journal of Circuit Theory and Applications》2011,39(12):1257-1273
In this paper, we discuss three different models for the simulation of integer‐N charge‐pump phase‐locked loops (PLLs), namely the continuous‐time s‐domain and discrete time z‐domain approximations and the exact semi‐analytical time‐domain model. The limitations of the two approximated models are analyzed in terms of error in the computed settling time as a function of loop parameters, deriving practical conditions under which the different models are reliable for fast settling PLLs up to fourth order. Besides, output spectral purity analysis methods based upon the time‐domain model are introduced and the results are compared with those obtained by means of the s‐domain model in terms of phase noise and reference spur estimation. As a case study, we use the three models to analyze a fast switching PLL to be integrated in a frequency synthesizer for WiMedia MB‐OFDM UWB systems. Copyright © 2010 John Wiley & Sons, Ltd. 相似文献
20.
Abumoslem Jannesari Mahmoud Kamarei 《International Journal of Circuit Theory and Applications》2008,36(7):757-768
A new method to decrease the phase noise of the sinusoidal oscillators is proposed. The proposed method is based on using a dynamic transistor biasing in a typical oscillator topology. This method uses the oscillator impulse sensitivity function (ISF) shaping to reduce the sensitivity of the oscillator to the transistor noise and as a result reducing the oscillator phase noise. A 1.8 GHz, 1.8 V designed oscillator based on the proposed method shows a phase noise of ?130.3dBc/Hz at 1 MHz offset frequency, thereby showing about 6 dB phase noise decreasing in comparison with the typical constant bias topology. This result is obtained from the simulation based on 0.18u CMOS technology and on‐chip spiral inductor with a quality factor equal to 8. Copyright © 2007 John Wiley & Sons, Ltd. 相似文献