Pseudomorphic high electron mobility transistor monolithic microwave integrated circuits reliability study

Accelerated high temperature RF life testing was used to investigate the reliability of two-stage GaAs monolithic microwave integrated circuit (MMIC) power amplifiers based on 0.25 μm pseudomorphic high electron mobility transistor technology. Life testing was performed at elevated baseplate temperatures with MMICs operating at typical d.c. bias conditions and large signal RF drive levels of two dB compression. The resulting failure distribution was log normal and the estimated median life time extrapolated to a channel temperature of 140°C was 2.3×10⁶ h with an activation energy of 1.1 eV.     

A traveling-wave high electron mobility transistor

A traveling-wave high electron mobility transistor (THEMT) is proposed. The device is unique in that it includes an integral distributed load resistor and uses a HEMT as the active device. A rigorous analysis of the device is carried out, using a small-signal equivalent circuit model for an incremental section of the device. Losses and reflected waves are not neglected, as has been done in other work. Treating the device as a four-port network, closed-form expressions for S-parameters are derived. Theoretical calculations, using equivalent circuit parameter values for a HEMT reported in the literature, show that the proposed device is capable of exponential increase in gain with device width. Power gain of more than 10 dB at 50 GHz and remarkably flat response in the frequency range 10-100 GHz are shown to be achievable for a 1-mm-wide device     

高电子迁移率晶体管新结构

介绍了通过插入ＩｎＡｓ层到ＩｎＧａＡｓ沟道中，改善了ＩｎＡｌＡｓ／ＩｎＧａＡｓ高电子迁移率晶体管（ＨＥＭＴ）的性质，合适的ＩｎＡｓ层厚度和准确的插入位置会使在３００Ｋ时此结构的ＨＥＭＴ比普通结构的ＨＥＭＴ的迁移率和电子速度分别提高３０％和１５％。     

Quarter-micron gate length microwave high electron mobility transistor

Quarter-micron gate length high electron mobility transistors have been fabricated using an electron-beam direct-writing technique. A maximum stable gain of 10 dB at 18 GHz has been measured at room temperature. A room-temperature cutoff frequency fT as high as 45 GHz has also been obtained.     

A microwave power double-heterojunction high electron mobility transistor

A microwave power high electron mobility transistor (HEMT) has been developed and tested in theK-band frequency range. The HEMT has a unique configuration of a selectively low-doped (AlGa)As/GaAs/(AlGa)As double heterojunction resulting in both capability of high-current density and high gate breakdown voltage. The structure showed electron mobility of 6800 cm²/V.s and two-dimensional (2-D) electron density as high as 1.2 × 10¹²cm^-2at room temperature. An output power of 660 mW (550 mW/mm) with 3.2-dB gain and 19.3-percent power added efficiency was achieved at 20 GHz with 1-µm gate length and 1.2-mm gate periphery. A similar device with 2.4-mm gate width produced an output power of 1 W with 3-dB gain and 15.5-percent efficiency. These results offer microwave high power capability in a double-heterojunction HEMT (DH-HEMT).     

Two-dimensional numerical analysis of the high electron mobility transistor

We develop a two-dimensional model for the high electron mobility transistor (HEMT) including conduction outside the quantum well. The model uses the continuity and power balance moment equations for both inside and outside the well, with electron concentration and average energy as dependent variables, and with parameters determined by Monte Carlo simulation. We show that conduction outside the well is dominant in the "pinchoff" region and that consequently the speed advantage of the HEMT over conventional devices does not arise from high saturation velocities in the quantum well but rather from a lower access resistance as suggested by a velocity profile calculation. It is further demonstrated that several effects which are unimportant in conventional FET's are of significance in the HEMT. Among these effects are electronic heat conduction and to some extent real space transfer.     

Two-dimensional numerical model for the high electron mobility transistor

A two-dimensional numerical drift-diffusion model for the High Electron Mobility Transistor (HEMT) is presented. Special attention is paid to the modeling of the current flow over the heterojunction. A finite difference scheme is used to solve the equations, and a variable mesh spacing was implemented to cope with the strong variations of functions near the heterojunction. Simulation results are compared to experimental data for a 0.7 μm gate length device. Small-signal transconductances and cut-off frequency obtained from the 2-D model agree well with the experimental values from S-parameter measurements. It is shown that the numerical models give good insight into device behaviour, including important parasitic effects such as electron injection into the bulk GaAs.     

Breakdown quenching in high electron mobility transistor by usingbody contact

In this paper, the effect of a body contact (BC) to quench breakdown effects and increase the breakdown voltage in high-electron mobility transistors (HEMTs) is theoretically investigated. The body contact is formed by a highly p-type doped substrate connected to an ohmic back contact. By means of a two-dimensional (2-D) self consistent Monte Carlo simulator we show that the BC prevents holes generated by impact ionization (II) from accumulating in the channel and in the buffer, thus inhibiting the parasitic bipolar effect (PBE). This improves the breakdown behavior and extends the range of the usable drain voltages     

Circuit simulation models for the high electron mobility transistor

A three-terminal model is formulated for the high electron mobility transistor (HEMT) using charge-voltage relationships derived from the Boltzmann transport. Emphasis is placed on modeling the current transport of the two-dimensional electron gas (TEG) and the capacitance of the embedded parasitic MESFET structure. Furthermore, a distributed circuit topology is used to better model high-frequency effects, such as the transit time delay, in both small-signal and large-signal-transient analysis. The HEMT model is implemented in the circuit simulation program HP-SPICE. Both dc and ac simulation results are discussed.     

Effect of traps on low-temperature high electron mobility transistor characteristics

The I-V characteristics of MBE-grown AlGaAs/GaAs high electron mobility transistors (HEMT's) are studied using a bias and temperature sequence between 77 and 300 K to control trap occupancy. Low-temperature threshold voltage, transconductance, and saturation current are found to be either increased or decreased significantly relative to their 300 K values depending on the gate bias condition during cool down. This behavior is shown to be caused by variations in trap occupancy in the highly doped AlGaAs layer.     

Photoluminescence evaluation of pseudomorphic high electron mobility transistor device waters

Photoluminescence (PL) has been used for some time the evaluation of pseudomorphic high electron mobility transistor material structures. Among the results routinely obtained from these structures are estimates of electron sheet density in the InGaAs channel, either from empirical relationships or from first principles (from direct observation of the Fermi level). We present a semiempirical line shape model for the study of PL line shapes at low temperatures. We show that the primary source of error for optical measurement of the sheet density is in the filling of the channel by electrons injected by the incident laser. We also demonstrate the potential for extraction of structural parameters such as channel composition and thickness from careful observation of variations in PL transition energies.     

Two-dimensional transient simulation of an idealized high electron mobility transistor

We develop a model for the high electron mobility transistor (HEMT) in which we include both hot-electron effects and conduction outside the quantum subband system using hydrodynamic-like transport equations. With such a model we can assess the significance of the various physical phenomena involved in the operation of the HEMT. We calculate results with a two-dimensional numerical technique for both steady-state and transient operation. For a 3-µm device at 77 K, we determine a transconductance of 450 mS/mm, a current-switching speed of 6 ps, and a capacitive charging speed of 4 ps/fanout gate which corresponds to the performance measured by other workers. We also see that electronic heating, velocity overshoot, and conduction outside the quantum well are significant near the pinchoff point. We conclude that the advantage of HEMT is twofold. The excellent conduction in the quantum well results in a low access resistance, and the low impurity concentration in the GaAs results in optimum overshoot effects.     

A high-speed 1-kbit high electron mobility transistor static RAM

A 1-kbit static RAM with enhancement and depletion-mode devices was designed and fabricated using the high electron mobility transistor (HEMT) technology. The RAM circuit was optimized to achieve ultra-high-speed performance. A subnanosecond address access time of 0.6 ns was measured at room temperature for a total power dissipation of 450 mW. The minimum WRITE-ENABLE pulse width required to change the state of memory cell is less than 2 ns on probe testing. The best chip has 3 bits that failed to function, which corresponds to a bit yield of 99.7 percent. According to the simulation, variations of the threshold voltage inside the memory cell greatly reduce its stable functional range. High-speed operation requires more uniform threshold voltage control to achieve fully operational LSI memory circuits.     

Device linearity and intermodulation distortion comparison of dual material gate and conventional AlGaN/GaN high electron mobility transistor

In the work proposed, linearity performance of dual material gate (DMG) AlGaN/GaN HEMT has been analyzed and compared with the corresponding performance of Single Material Gate (SMG) AlGaN/GaN HEMT using ATLAS device simulation. Specifically, we investigate the linearity of DMG and conventional AlGaN/GaN HEMT based on the linearity metrics such as g_m, g_m2, g_m3, VIP₂, VIP₃, IIP₃, IMD₃ and 1-dB compression point. The impact of various device parameters on the device linearity such as the channel length, doping and thickness of the barrier and spacer layer, Al mole fraction and the work function difference of the two gate metals has also been investigated. It is observed that a suitably designed DMG AlGaN/GaN HEMT can considerably improve the linearity performance and minimize intermodulation distortion due to reduced drain induced barrier lowering and high-field effect; and a more uniform electric field for applications in 3-G mobile communication and low noise amplifiers.     

Cross modulation and nonlinear distortion in RF transistor amplifiers

In order to avoid untractable calculations, the transistor four-pole is assumed to be short-circuited for ac at its output. Furthermore, the internal impedance of the signal source is assumed to be zero. First the nonlinear distortion effects in a grounded base intrinsic transistor are calculated. Then, the formulas are reverted to a grounded emitter intrinsic transistor, taking into account the extrinsic base lead resistance. They are confirmed by measurements of third harmonic distortion and of cross modulation. The measured curves of cross modulation vs collector bias current show a sharp minimum. This unexpected effect is explained by an extension of the theory, which takes into account previously neglected terms. The explanation is successfully tested by experiments. Comparisons with cross modulation in amplifier tubes are made.     

Low-noise high electron mobility transistors for monolithic microwave integrated circuits

High electron mobility transistors (HEMT's) for monolithic microwave integrated circuits have been fabricated that have demonstrated excellent performance. External transconductance of 300 mS/mm is observed and noise figures of 1 and 1.8 dB with associated gains of 16.1 and 11.3 dB at 8 and 18 GHz, respectively, have been measured. These are comparable to the best reported noise figures for either HEMT's or MESFET's and are the highest associated gains reported for such low-noise figures. Analysis of these devices indicates that further improvements in these results is possible through optimization of HEMT layers and fabrication technology to reduce gate-source parasitic resistance.     

A 40-ps high electron mobility transistor 4.1 K gate array

A high-electron mobility transistor (HEMT) 4.1 K-gate array has been developed, using a selective dry etching process and a MBE (molecular-beam epitaxy) growth technology. The circuit design uses direct-coupled FET logic (DCFL). The chip contains 4096 NOR gates, each with a 0.8-μm gate length, and measures 6.3 mm×4.8 mm. A basic gate delay of 40 ps has been achieved. A 16×16-bit parallel multiplier, used to test this array, has a multiplication time of 4.1 ns at 300 K, where the power dissipation is 6.2 W     

Ka-band InP high electron mobility transistor monolithic microwave integrated circuit reliability

The reliability of AlInAs/GaInAs high electron mobility transistor (HEMT) monolithic microwave integrated circuits on InP substrates from HRL Labs has been studied with elevated-temperature lifetests on Ka-band LNAs, as well as ramped-voltage tests on individual capacitors. In the lifetests the LNAs were put under normal DC bias, and aging was accelerated by heating to channel temperatures of 190°C and 210°C. Room-temperature characterizations involved DC tests of HEMT parameters as well as 30 GHz measurements of gain, noise figure and phase. Aging caused the noise figure to drop by a few tenths of a dB, and the phase changed by ±10°. The gain dropped gradually by several dB. Taking 1 dB drop in gain as the failure criterion, we find an activation energy of 1.1 eV, and a mean time to failure (MTTF) at an operating channel temperature of 70°C of 7×10⁶ h. In the ramped-voltage tests, 10×10 μm² capacitors were taken to breakdown at two different temperatures, and several ramp rates. This yielded a voltage acceleration factor of γ=36–39 nm/V, and thermal activation energy of 0.11–0.13 eV. Next, ramped voltage tests were conducted on 200×200 μm² capacitors, typical of those in circuits. These were done at 25°C and 3.0 V/s only, and at least 1000 specimens were tested per wafer. The known acceleration factors were used to find the MTTFs at 70°C, with operating biases of 5 or 10 V. For the majority of the population the MTTFs are about 10⁹ h, while only 0.07% of the population has MTTF less than 1×10⁶ h. The combination of results from elevated-temperature lifetests and ramped-voltage capacitor tests indicates excellent reliability for this MMIC technology in terms of known “wearout” failure mechanisms.     

Harmonic distortion in the junction field-effect transistor with field-dependent mobility

It has been found that a harmonic analysis of the usual power-law transfer characteristic of the JFET does not yield equations which accurately predict the third-harmonic distortion products for short-gate structures. However, if field-dependent mobility in the drain-source channel is taken into consideration in the equations for the drain current, a transfer characteristic is obtained of the form3Z_{D}(1-e^{-r})/ Gamma^{2}, where ZDis the normalized channel height and Γ is the field factor. Equations for the distortion products M2and M3, which are derived from this type of characteristic, accurately predict M2and M3for actual devices as a function of physical parameters. Lower limits on the values of M2and M3which can be achieved in a practical JFET are presented.