Near-Stoichiometric Ti : LiNbO$_{3}$ Strip Waveguides Fabricated by Standard Ti Diffusion and Post-VTE

We report near-stoichiometric (NS) Ti : LiNbO$_{3}$ waveguides fabricated by indiffusion of 4-, 5-, 6-, 7- $mu{hbox {m}}$-wide 120-nm-thick Ti-strips at 1060 $^{circ}hbox{C}$ for 10 h into a congruent $hbox{LiNbO}_{3}$ (i.e., standard Ti diffusion procedure) and post-vapour-transport-equilibration (VTE) treatment at 1100 $^{circ}hbox{C}$ for 5 h. These waveguides are NS and single-mode at 1.5 $mu{hbox {m}}$, and have a loss of 1.0/0.8 dB/cm for the TM/TE mode. In the width/depth direction of the waveguide, the mode field follows a Gauss/Hermite–Gauss profile, and the Ti profile follows a sum of two error functions/a Gauss function. The post-VTE resulted in increase of diffusion width/depth by 2.0/1.0 $mu{hbox {m}}$. A two-dimensional refractive index profile in the guiding layer is suggested.      

InGaAs/GaAs 0.98- $mu{hbox {m}}$ Low-Divergence Central-Lobe Semiconductor Lasers With $delta$ -Doped Resonant Tunneling Quantum Wells

In this paper, we describe a new structure design for producing low-threshold, high-efficiency, and high-brightness 0.98-$mu{hbox {m}}$ lasers. In this structure, we incorporated a self-discriminating weak optical confinement asymmetrical waveguide coupled to passive waveguides, and an active region based on three InGaAs quantum wells (QWs) coupled to Te n-type $delta$-doping. Optimized coupling between the $delta$-doping and the three QWs, together with waveguide optimization and doping profile optimization, yields $J_{rm th}=98 {hbox {A/cm}}^{2}$ per QW, ${T}_{0}=80;^{circ}hbox{C}$, and a far-field central lobe angle of $sim 10^{circ}$.      

Low-Threshold Strained Quantum-Well GaSb-Based Lasers Emitting in the 2.5- to 2.7-$mu$ m Wavelength Range

GaInAsSb–GaSb strained quantum-well (QW) ridge waveguide diode lasers emitting in the wavelength range from 2.51 to 2.72 $ mu{hbox {m}}$ have been grown by molecular beam epitaxy. The devices show ultralow threshold current densities of 44 $hbox{A}/{hbox {cm}}^{2}$ (${L}rightarrow infty $) for a single QW device at 2.51 $ mu{hbox {m}}$, which is the lowest reported value in continuous-wave operation near room temperature (15 $^{circ}hbox{C}$) at this wavelength. The devices have an internal loss of 3 ${hbox {cm}}^{-1}$ and a characteristic temperature of 42 K. By using broader QWs, wavelengths up to 2.72 $mu{hbox {m}}$ could be achieved.      

A Compact Four-Wavelength Quantum-Cascade Laser Source

A four-wavelength quantum-cascade (QC) laser source that operates using a single current channel is presented. The source includes two different heterogeneous cascade QC lasers, one with emission wavelengths of 7.0 $mu{hbox {m}}$ and 11.2 $mu{hbox {m}}$, and the other with 8.7 $mu{hbox {m}}$ and 12.0 $mu{hbox {m}}$ . For 3.0-mm and 3.5-mm cavity lengths, QC lasers with emission wavelengths of 8.7, 11.2, and 12.0 $mu{hbox {m}}$ have threshold current densities within less than a factor of 2, which allows them to be conveniently driven in series by a single current source.      

High Heat Flux Two-Phase Cooling in Silicon Multimicrochannels

This paper presents performances of two-phase cooling of a chip at very high heat flux with refrigerant R236fa in a silicon multimicrochannel heat sink. This heat sink was composed of 134 parallel channels, 67 $mu {hbox {m}}$ wide, 680 $mu {hbox {m}}$ high, and 20 mm long, with 92-$mu {hbox {m}}$ -thick fins separating the channels. The base heat flux was varied from 3 to 255 ${hbox {W/cm}}^{2}$ , the volume flow rate from 0.18 to 0.67 l/min, and the exit vapor quality from 0 to 80%. The working pressure and saturation temperature were set at 273 kPa and 25 $^{circ}{hbox {C}}$, respectively. The present database includes 1040 local heat transfer coefficients. The base temperature of the chip could be maintained below 52 $^{circ}{hbox {C}}$ while dissipating 255 ${hbox {W/cm}}^{2}$ with 10 $~^circ{hbox {C}}$ of inlet subcooling and 90 kPa of pressure drop. A comparison of the respective performances with an extrapolation of the present results shows that two-phase cooling should be able to cool the chip 13 K lower than liquid cooling for the same pumping power at a base heat flux of 350 ${hbox {W/cm}}^{2}$.      

17 GHz RF Front-Ends for Low-Power Wireless Sensor Networks

A 17 GHz low-power radio transceiver front-end implemented in a 0.25 $mu{hbox {m}}$ SiGe:C BiCMOS technology is described. Operating at data rates up to 10 Mbit/s with a reduced transceiver turn-on time of 2 $mu{hbox {s}}$, gives an overall energy consumption of 1.75 nJ/bit for the receiver and 1.6 nJ/bit for the transmitter. The measured conversion gain of the receiver chain is 25–30 dB into a 50 $Omega$ load at 10 MHz IF, and noise figure is 12 $pm$0.5 dB across the band from 10 to 200 MHz. The 1-dB compression point at the receiver input is $-$37 dBm and ${hbox{IIP}}_{3}$ is $-$25 dBm. The maximum saturated output power from the on-chip transmit amplifier is $-$1.4 dBm. Power consumption is 17.5 mW in receiver mode, and 16 mW in transmit mode, both operating from a 2.5 V supply. In standby, the transceiver supply current is less than 1 $mu{hbox {A}}$.      

A Noise-Coupled Time-Interleaved Delta-Sigma ADC With 4.2 MHz Bandwidth, ${-}$ 98 dB THD, and 79 dB SNDR

This paper describes a wideband high-linearity $Delta Sigma $ ADC. It uses noise coupling combined with time interleaving. Two versions of a two-channel time-interleaved noise-coupled $Delta Sigma $ ADC were realized in a 0.18- $mu{hbox {m}}$ CMOS technology. Noise coupling between the channels increases the effective order of the noise-shaping loops, provides dithering, and prevents tone generation in all loops. Time interleaving enhances the effects of noise coupling. Using a 1.5 V supply, the device achieved excellent linearity (${rm SFDR} > {hbox {100~dB}}$, ${rm THD}= -{hbox {98~dB}}$) and an SNDR of 79 dB in a 4.2 MHz signal band.      

A 2.4-GHz Resistive Feedback LNA in 0.13-$mu$m CMOS

A $g_{m}$-boosted resistive feedback low-noise amplifier (LNA) using a series inductor matching network and its application to a 2.4 GHz LNA is presented. While keeping the advantage of easy and reliable input matching of a resistive feedback topology, it takes an extra advantage of $g_{m}$ -boosting as in inductively degenerated topology. The gain of the LNA increases by the $Q$ -factor of the series RLC input network, and its noise figure (NF) is reduced by a similar factor. By exploiting the $g_{m}$-boosting property, the proposed fully integrated LNA achieves a noise figure of 2.0 dB, S21 of 24 dB, and IIP3 of ${- 11}~ hbox{dBm}$ while consuming 2.6 mW from a 1.2 V supply, and occupies 0.6 ${hbox {mm}}^{2}$ in 0.13-$mu{hbox {m}}$ CMOS, which provides the best figure of merit. This paper also includes an LNA of the same topology with an external input matching network which has an NF of 1.2 dB.      

A Sub-0.2$^{circ}/$ hr Bias Drift Micromechanical Silicon Gyroscope With Automatic CMOS Mode-Matching

This paper describes a system architecture and CMOS implementation that leverages the inherently high mechanical quality factor (Q) of a MEMS gyroscope to improve performance. The proposed time domain scheme utilizes the often-ignored residual quadrature error in a gyroscope to achieve, and maintain, perfect mode-matching (i.e., $sim$0 Hz split between the high-Q drive and sense mode frequencies), as well as electronically control the sensor bandwidth. A CMOS IC and control algorithm have been interfaced with a 60 $mu{hbox {m}}$ thick silicon mode-matched tuning fork gyroscope $({rm M}^{2}mathchar"707B {rm TFG})$ to implement an angular rate sensing microsystem with a bias drift of 0.16$^{circ}/{hbox{hr}}$. The proposed technique allows microsystem reconfigurability—the sensor can be operated in a conventional low-pass mode for larger bandwidth, or in matched mode for low-noise. The maximum achieved sensor Q is 36,000 and the bandwidth of the microsensor can be varied between 1 to 10 Hz by electronic control of the mechanical frequencies. The maximum scale factor of the gyroscope is 88 ${hbox{mV}}/^{circ}/{hbox{s}}$ . The 3$~$ V IC is fabricated in a standard 0.6 $ mu{hbox {m}}$ CMOS process and consumes 6 mW of power with a die area of 2.25 ${hbox {mm}}^{2}$.      

CMOS Avalanche Photodiode Embedded in a Phase-Shift Laser Rangefinder

This paper presents the design and the characterization of a CMOS avalanche photodiode (APD) working as an optoelectronic mixer. The $hbox{P}^{+}hbox{N}$ photodiode has been implemented in a commercial 0.35-$muhbox{m}$ CMOS technology after optimization with SILVACO. The surface of the active region is $ hbox{3.78} cdot hbox{10}^{-3} hbox{cm}^{2}$. An efficient guard-ring structure has been created using the lateral diffusion of two n-well regions separated by a gap of 1.2 $mu hbox{m}$. When biased at $-$2 V, the best responsitivity $S_{lambda ,{rm APD}} = hbox{0.11} hbox{A/W}$ is obtained at $lambda = hbox{500} hbox{nm}$. This value can easily be improved by using an antireflection coating. At $lambda = hbox{472} hbox{nm}$, the internal gain is about 75 at $-$6 V and 157 at $-$7 V. When biased at $-$6 V, the APD achieves a dark current of 128 $muhbox{A} cdot hbox{mm}^{-2}$ and an excess noise factor $F = hbox{20}$ . Then, the APD is successfully used as an optoelectronic mixer to improve the signal-to-noise ratio of a low-voltage embedded phase-shift laser rangefinder.      

A $Q$ -Band Four-Element Phased-Array Front-End Receiver With Integrated Wilkinson Power Combiners in 0.18-$mu{{hbox{m}}}$ SiGe BiCMOS Technology

A four-element phased-array front-end receiver based on 4-bit RF phase shifters is demonstrated in a standard 0.18- $mu{{hbox{m}}}$ SiGe BiCMOS technology for $Q$-band (30–50 GHz) satellite communications and radar applications. The phased-array receiver uses a corporate-feed approach with on-chip Wilkinson power combiners, and shows a power gain of 10.4 dB with an ${rm IIP}_{3}$ of $-$13.8 dBm per element at 38.5 GHz and a 3-dB gain bandwidth of 32.8–44 GHz. The rms gain and phase errors are $leq$1.2 dB and $leq {hbox{8.7}}^{circ}$ for all 4-bit phase states at 30–50 GHz. The beamformer also results in $leq$ 0.4 dB of rms gain mismatch and $leq {hbox{2}}^{circ}$ of rms phase mismatch between the four channels. The channel-to-channel isolation is better than $-$35 dB at 30–50 GHz. The chip consumes 118 mA from a 5-V supply voltage and overall chip size is ${hbox{1.4}}times {hbox{1.7}} {{hbox{mm}}}^{2}$ including all pads and CMOS control electronics.      

Experimental Demonstration of Deeply-Etched SiO$_{2}$ Ridge Optical Waveguides and Devices

Deeply-etched ${hbox{SiO}}_{2}$ optical ridge waveguides are fabricated and characterized. A detailed discussion of the fabrication process (especially for the deep etching process) is presented. The measured propagation losses for the fabricated waveguides with different core widths range from $0.33sim {hbox {0.81}}~{hbox {dB}}/{hbox {mm}}$. The loss is mainly caused by the scattering due to the sidewall roughness. The losses in bending sections are also characterized, which show the possibility of realizing a small bending radius (several tens of microns). 1 $,times {rm N}$ ( ${rm N}=2$, 4, 8) multimode interference couplers based on the deeply-etched ${hbox{SiO}}_{2}$ ridge waveguide are also fabricated and show fairly good performances.      

LMS-Based Noise Leakage Calibration of Cascaded Continuous-Time Modulators

In cascaded $DeltaSigma$ modulators (DSMs), the quantization noise of the earlier stage leaks to the output unless completely cancelled by the digital noise cancellation filter (NCF). The noise leakage is worse in the continuous-time (CT) implementation due to the poorly controlled time constant of the analog loop filter. A parameter-based continuous-time to discrete-time transform is developed to get an exact digital NCF, and the analog filter time constant is calibrated to match with the digital NCF. A binary pulse tone is injected into the quantizer to detect the filter time-constant error, and eliminated by zero-forcing its residual power based on the adaptive least-mean-square (LMS) algorithm. A 2-1-1 cascaded CT-DSM prototype in 0.18-$mu{hbox {m}}$ CMOS demonstrates that the spectral density of the leaked noise is lower than 10 ${rm nV}/surd{hbox {Hz}}$ after the capacitors in the Gm-C loop filters are trimmed with 1.1% step. With a 1- ${rm V}_{rm pp}$ full-scale input, it achieves a dynamic range of 68$~$ dB within 18-MHz bandwidth at an over-sampling ratio of 10. The analog core and the digital logic occupy 1.27 ${hbox {mm}}^{2}$, and consume 230 mW at 1.8 V.      

Dopant-Segregated Schottky Silicon-Nanowire MOSFETs With Gate-All-Around Channels

In this letter, we demonstrated dopant-segregated Schottky (DSS) p-MOSFET with gate-all-around silicon-nanowire (SiNW) channel of 10 nm in diameter. The DSS transistor shows improved performance as compared to a reference Schottky barrier (SB) transistor without dopant segregation. The DSS transistor shows $I_{rm ON}$ of 319 $mu hbox{A}/muhbox{m}$ at a low gate overdrive of $-$ 0.6 V, high $I_{rm ON}/I_{rm OFF}$ ratio $(sim!hbox{10}^{5})$, and short-channel performance with subthreshold slope $sim$90 mV/dec down to 100-nm gate length with relatively thick (6 nm) deposited gate oxide. The DSS transistor also shows significant reduction ( $sim!hbox{40}times$ lower) in the series resistance as compared to the SB transistor. The origin of the improved performance of the DSS is the thin dopant layer segregated at the nickel monosilicide/SiNW point contact which results in the enhanced hole injection at the source side and the suppressed electron injection at the drain side.      

Impacts of $hbox{N}_{2}$ and $hbox{NH}_{3}$ Plasma Surface Treatments on High-Performance LTPS-TFT With High-$kappa$ Gate Dielectric

Low-temperature polycrystalline-silicon thin-film transistors (LTPS-TFTs) with high- $kappa$ gate dielectrics and plasma surface treatments are demonstrated for the first time. Significant field-effect mobility $mu_{rm FE}$ improvements of $sim$86.0% and 112.5% are observed for LTPS-TFTs with $hbox{HfO}_{2}$ gate dielectric after $hbox{N}_{2}$ and $ hbox{NH}_{3}$ plasma surface treatments, respectively. In addition, the $hbox{N}_{2}$ and $ hbox{NH}_{3}$ plasma surface treatments can also reduce surface roughness scattering to enhance the field-effect mobility $mu_{rm FE}$ at high gate bias voltage $V_{G}$, resulting in 217.0% and 219.6% improvements in driving current, respectively. As a result, high-performance LTPS-TFT with low threshold voltage $V_{rm TH} sim hbox{0.33} hbox{V}$, excellent subthreshold swing S.S. $sim$0.156 V/decade, and high field-effect mobility $mu_{rm FE} sim hbox{62.02} hbox{cm}^{2}/hbox{V} cdot hbox{s}$ would be suitable for the application of system-on-panel.      

A Dual-Band Self-Oscillating Mixer for -Band and -Band Applications

A self-oscillating mixer that employs both the fundamental and harmonic signals generated by the oscillator subcircuit in the mixing process is experimentally demonstrated. The resulting circuit is a dual-band down-converting mixer that can operate in $C$ -band from 5.0 to 6.0 GHz, or in $X$-band from 9.8 to 11.8 GHz. The oscillator uses active superharmonic coupling to enforce the quadrature relationship of the fundamental outputs. Either the fundamental outputs of the oscillator or the second harmonic oscillator output signals that exists at the common-mode nodes are connected to the mixer via a set of complementary switches. The mixer achieves a conversion gain between 5–12 dB in both frequency bands. The output 1-dB compression points for both modes of the mixer are approximately $-{hbox{5 dBm}}$ and the output third-order intercept point for $C$ -band and $X$ -band operation are 12 and 13 dBm, respectively. The integrated circuit was fabricated in 0.13-$mu {hbox{m}}$ CMOS technology and measures ${hbox{0.525 mm}}^{2}$ including bonding pads.      

Ray-Tracing Studies on Optical Periscopes Suitable for Out-of-Plane Interconnects on Optical Backplanes

Micro-periscopes suitable for out-of-plane optical interconnects in multi-mode optical waveguide systems are investigated by ray-tracing simulations. Various parameter setups, e.g., curved mirrors and add-on lens systems, were investigated by applying methods of statistical design of experiments, such as fractional factorial design and surface response analysis. The optimum optical net-loss was found to be in the order of magnitude of 3.5 dB for such periscopes. Furthermore, misplacement analysis' for these periscopes were performed in respect to a connection line of two tentative waveguides. The position of a $-$3 dB loss-line, was found to be as close as 35 $mu{hbox {m}}$ and as far as 70 $mu{hbox {m}}$ parallel to the ideal connection line of the waveguides.      

Q-Band pHEMT and mHEMT Subharmonic Gilbert Upconversion Mixers

This letter makes a comparison between Q-band 0.15 $mu{rm m}$ pseudomorphic high electron mobility transistor (pHEMT) and metamorphic high electron mobility transistor (mHEMT) stacked-LO subharmonic upconversion mixers in terms of gain, isolation and linearity. In general, a 0.15 $mu{rm m}$ mHEMT device has a higher transconductance and cutoff frequency than a 0.15 $mu{rm m}$ pHEMT does. Thus, the conversion gain of the mHEMT is higher than that of the pHEMT in the active Gilbert mixer design. The Q-band stacked-LO subharmonic upconversion mixers using the pHEMT and mHEMT technologies have conversion gain of $-$7.1 dB and $-$0.2 dB, respectively. The pHEMT upconversion mixer has an ${rm OIP}_{3}$ of $-$12 dBm and an ${rm OP}_{1 {rm dB}}$ of $-$24 dBm, while the mHEMT one shows a 4 dB improvement on linearity for the difference between the ${rm OIP}_{3}$ and ${rm OP}_{1 {rm dB}}$. Both the chip sizes are the same at 1.3 mm $times$ 0.9 mm.      

$hbox{TiN/ZrO}_{2}$/Ti/Al Metal–Insulator–Metal Capacitors With Subnanometer CET Using ALD-Deposited $hbox{ZrO}_{2}$ for DRAM Applications

We provide the first report of the structural and electrical properties of $hbox{TiN/ZrO}_{2}$/Ti/Al metal–insulator–metal capacitor structures, where the $hbox{ZrO}_{2}$ thin film (7–8 nm) is deposited by ALD using the new zirconium precursor ZrD-04, also known as Bis(methylcyclopentadienyl) methoxymethyl. Measured capacitance–voltage ($C$– $V$) and current–voltage ( $I$–$V$) characteristics are reported for premetallization rapid thermal annealing (RTP) in $hbox{N}_{2}$ for 60 s at 400 $^{circ}hbox{C}$, 500 $^{circ}hbox{C}$, or 600 $^{ circ}hbox{C}$. For the RTP at 400 $^{circ}hbox{C}$ , we find very low leakage current densities on the order of nanoamperes per square centimeter at a gate voltage of 1 V and low capacitance equivalent thickness values of $sim$ 0.9 nm at a gate voltage of 0 V. The dielectric constant of $ hbox{ZrO}_{2}$ is 31 $pm$ 2 after RTP treatment at 400 $^{circ}hbox{C}$.      

Demonstration of Tunneling FETs Based on Highly Scalable Vertical Silicon Nanowires

This letter demonstrates a vertical silicon-nanowire (SiNW)-based tunneling field-effect transistor (TFET) using CMOS-compatible technology. With a $hbox{Si} hbox{p}^{+}{-}hbox{i}{-} hbox{n}^{+}$ tunneling junction, the TFET with a gate length of $sim$200 nm exhibits good subthreshold swing of $sim$ 70 mV/dec, superior drain-induced-barrier-lowering of $sim$ 17 mV/V, and excellent $I_{rm on} {-} I_{rm off}$ ratio of $sim!!hbox{10}^{7}$ with a low $I_{rm off} (sim!!hbox{7} hbox{pA}/muhbox{m})$. The obtained 53 $muhbox{A}/muhbox{m} I_{rm on}$ can be further enhanced with heterostructures at the tunneling interface. The vertical SiNW-based TFET is proposed to be an excellent candidate for ultralow power and high-density applications.