Computer-Aided Dynamic Characterization of Fourth-Order PWM DC–DC Converters

Average-value modeling of dc–dc converters has been an area of active research for many years. Developing accurate average-value models of higher order converters is further complicated by the presence of parasitics and waveform nonlinearity. This paper extends the numerical state-space averaging to the fourth-order capacitor-based switching stages. The proposed model takes into account conduction losses associated with switching-stage components and is seamlessly functional in all operational modes. The proposed model is validated with a hardware prototype and detailed simulation and is shown to accurately predict large-signal time-domain transients as well as small-signal frequency-domain characteristics.      

Realization of Parasitics in Stability of DC–DC Converters Loaded by Constant Power Loads in Advanced Multiconverter Automotive Systems

Distributed DC power systems are becoming increasingly common in advanced automotive systems. Constant power load (CPL) behavior of tightly regulated DC-DC converters in multiconverter power systems is equivalent to the dynamic negative impedance, destabilizing the DC bus and, consequently, the system. Various techniques have been developed to control ideal/lossless converters loaded by CPLs. Loss components significantly enhance the stability of the cascaded converters. In this paper, the effects of parasitics in the behavior of DC-DC converters loaded by CPLs are investigated. Furthermore, the stability of power converters loaded by CPLs in parallel to conventional constant voltage loads in the presence of loss components is analyzed. Design criteria are presented for converter operation in continuous and discontinuous conduction modes, which gives recommendations on the design of multiconverter DC power systems to avoid negative impedance instability. The proposed stable operation criteria are validated with hardware prototypes and simulation analyses.     

Novel Family of PWM Soft-Single-Switched DC–DC Converters With Coupled Inductors

In this paper, a novel family of pulsewidth-modulation soft-single-switched dc–dc converters without high voltage and current stresses is described. These converters do not require any extra switch to achieve soft switching, which considerably simplifies the control circuit. In all converter family members, the switch is turned on under zero-current condition and is turned off at almost zero-voltage condition. From the proposed converter family, the boost topology is analyzed, and its operating modes are explained. The presented experimental results of a prototype boost converter confirm the theoretical analysis.      

Switched-Capacitor/Switched-Inductor Structures for Getting Transformerless Hybrid DC–DC PWM Converters

A few simple switching structures, formed by either two capacitors and two-three diodes (C-switching), or two inductors and two-three diodes (L-switching) are proposed. These structures can be of two types: ldquostep-downrdquo and ldquostep-up.rdquo These blocks are inserted in classical converters: buck, boost, buck-boost, Cuk, Zeta, Sepic. The ldquostep-downrdquo C- or L-switching structures can be combined with the buck, buck-boost, Cuk, Zeta, Sepic converters in order to get a step-down function. When the active switch of the converter is on, the inductors in the L-switching blocks are charged in series or the capacitors in the C-switching blocks are discharged in parallel. When the active switch is off, the inductors in the L-switching blocks are discharged in parallel or the capacitors in the C-switching blocks are charged in series. The ldquostep-uprdquo C- or L-switching structures are combined with the boost, buck-boost, Cuk, Zeta, Sepic converters, to get a step-up function. The steady-state analysis of the new hybrid converters allows for determing their DC line-to-output voltage ratio. The gain formula shows that the hybrid converters are able to reduce/increase the line voltage more times than the original, classical converters. The proposed hybrid converters contain the same number of elements as the quadratic converters. Their performances (DC gain, voltage and current stresses on the active switch and diodes, currents through the inductors) are compared to those of the available quadratic converters. The superiority of the new, hybrid converters is mainly based on less energy in the magnetic field, leading to saving in the size and cost of the inductors, and less current stresses in the switching elements, leading to smaller conduction losses. Experimental results confirm the theoretical analysis.     

Single-Inductor–Multiple-Output Switching DC–DC Converters

Emerging feature dense portable microelectronic devices pose several challenges, including demanding multiple supply voltages from a single miniaturized power-efficient platform. Unfortunately, the power inductors used in magnetic-based switching converters (which are power efficient) are bulky and difficult to integrate. As a result, single-inductor–multiple-output (SIMO) solutions enjoy popularity, but not without design challenges. This brief describes, illustrates, and evaluates how SIMO dc–dc converters operate, transfer energy, and control (through negative feedback) each of their outputs.      

High-Bandwidth Multisampled Digitally Controlled DC–DC Converters Using Ripple Compensation

This paper investigates multi sampled digitally controlled switched-mode power supplies with switching ripple compensation. In digital controllers for power converters, the main bandwidth limitations come from A/D conversion time, computational delays, and small-signal delay of the digital pulsewidth modulator (DPWM). In hard-wired digital-controller technologies, such as in dedicated digital IC and/or in field-programmable gate arrays (FPGAs), the calculation delays can be made negligible with respect to the switching period; thus, when fast ADCs are used, the overall phase lag is dominated by the DPWM. The multi sampling approach can strongly reduce the DPWM delay, thus breaking the bandwidth limitations of conventional single-sampled solutions. In this paper, the additional aliasing effects, which would require a filtering action, are avoided, exploiting the periodic nature of the switching ripple under steady-state conditions using a repetitive-based filtering action. Simulation and experimental results on a 1.2-V-10-A 500-kHz synchronous buck converter, where the digital control has been implemented in the FPGA, confirm the properties of the proposed solution.     

Current Share in Multiphase DC–DC Converters Using Digital Filtering Techniques

This paper introduces a new method of passive current balancing for digital control of multiphase dc–dc converters based upon the duty-cycle-matching principle. Current balance is achieved by inserting a digital filter into the control path. The method does not rely on a current balancing loop, and therefore, the stability and performance concerns associated with the traditional current balance loop are obviated. Being sensorless, it is insensitive to current measurement inaccuracies caused by noise, component value tolerance, or variation. It will be shown that effective current balancing can be achieved via some simple modifications to standard voltage-mode control laws, allowing current balancing to be achieved with minor additional complexity. The effectiveness of the method has been demonstrated by experimental validation of a multiphase dc–dc converter. The current share scheme has been shown to perform well dynamically, matching currents cycle by cycle during load steps, and clearly benefiting from the absence of the slow current share loop popular in traditional methods. The proposed current share filter blends well with existing digital controllers. Given the very low complexity in implementing the filter, the degree of matching achieved is exceptional.      

Analysis and Verification of Two-Level Random Aperiodic PWM Schemes for DC–DC Converters

A typical two-level pulsewidth modulation scheme for a dc–dc converter generates a signal that has two values: 0 and 1. For a random aperiodic scheme, the switching period can be modulated in a random fashion with a known probability density function (pdf). In this paper, analytical expressions for both discrete and continuous spectra are provided for the case where different pdfs are used to modulate the switching signal of a dc–dc converter. Experimental results for a random aperiodic scheme that is used to optimize the output ripple of a buck dc–dc converter are provided to support the theoretical claims.      

Power Line Communication in Digitally Controlled DC–DC Converters Using Switching Frequency Modulation

This paper investigates power line communication (PLC) in digitally controlled high-frequency switched-mode power supplies in distributed architectures that share the same bus voltage. Communication between different DC-DC converters is obtained by using switching frequency modulation and by detecting the switching signal on the common supply bus voltage. In case of low power transmission, a small duty-cycle perturbation at half of switching frequency is added to enhance the energy of the transmitted signal. Each converter operates at three different switching frequencies: the first is associated with bit 1 transmission, the second is associated with bit 0 transmission, and the third is associated with no transmission state. In the proposed solution, there is no need for an additional power amplifier in order to inject the communication signal on the power lines, but the signal used for the PLC is inherently generated by the pulsewidth modulation of DC-DC converters. Even if aimed at a dedicated digital IC, the communication architecture has been implemented in field-programmable gate arrays. Simulation and experimental results on DC-DC synchronous buck converters confirm that the performance is achievable by the proposed PLC techniques.     

General Design Issues of Sliding-Mode Controllers in DC–DC Converters

This paper examines the practical design issues of sliding-mode (SM) controllers as applied to the control of dc-dc converters. A comprehensive review of the relevant literature is first provided. Major problems that prevent the use of SM control in dc-dc converters for industrial and commercial applications are investigated. Possible solutions are derived, and practical design procedures are outlined. The performance of SM control is compared with that of conventional linear control in terms of transient characteristics. It has been shown that the use of SM control can lead to an improved robustness in providing consistent transient responses over a wide range of operating conditions.     

Optimal PWM Control of Switched-Capacitor DC–DC Power Converters via Model Transformation and Enhancing Control Techniques

This paper presents an efficient and effective method for an optimal pulsewidth-modulated (PWM) control of switched-capacitor dc-dc power converters. Optimal switching instants are determined based on minimizing the output ripple magnitude, the output leakage voltage and the sensitivity of the output load voltage with respect to both the input voltage and the load resistance. This optimal PWM control strategy has several advantages over conventional PWM control strategies: 1) it does not involve a linearization, so a large-signal analysis is performed; and 2) it guarantees the optimality. The problem is solved via both the model transformation and the optimal enhancing control techniques. A practical example of the PWM control of a switched-capacitor dc-dc power converter is presented.     

A Systematic Approach to Synthesizing Multi-Input DC–DC Converters

The objective of this paper is to propose a general approach for developing multi-input converters (MICs). The derived MICs can deliver power from all of the input sources to the load either individually or simultaneously. By analyzing the topologies of the six basic pulsewidth modulation (PWM) converters, the method for synthesizing an MIC is inspired by adding an extra pulsating voltage or current source to a PWM converter with appropriate connection. As a result, the pulsating voltage source cells (PVSCs) and the pulsating current source cells (PCSCs) are proposed for deriving MICs. According to the presented synthesizing rules, two families of MICs, including quasi-MICs and duplicated MICs, are generated by introducing the PVSCs and the PCSCs into the six basic PWM converters.      

A Fast Transient Recovery Module for DC–DC Converters

This paper presents a novel fast transient recovery module to improve the transient response of dc–dc converters to meet the challenging power supply requirement of fast dynamic load changes. The current-pump module operates only at transient state to provide additional current injection and current drain for step-up and step-down loads, respectively. The dual-mode control is proposed to switch the voltage control mode of dc–dc converters to hysteretic control mode during transient. The measurement results show that the fast transient recovery module and dual-mode control can improve the recovery time of dc–dc converters by more than an order.      

A Switching-Capacitor PWM DC–DC Converter and Its Variations

This paper proposes a novel switching-capacitor pulsewidth modulation (PWM) converter. The converter is a combination of a switching-capacitor converter and a PWM converter, and it has the following advantages: 1) zero-voltage switching of all the MOSFETs; 2) with an autotransformer self-driven method, there is no need to adjust the synchronous rectifier control timing, and this reduces body diode conduction loss; 3) its efficiency is not sensitive to the leakage inductor, so a discrete transformer can be used, and it is suitable for both voltage regulator module (VRM) and voltage regulator down (VRD) application; and 4) a single-phase option makes it more flexible, and it can achieve higher efficiency in the whole load range with a phase-shedding control strategy. A 700-kHz 1.2-V/35-A POL prototype and a four-phase 700-kHz 1.2-V/130-A-output VRM prototype were built to verify the analysis.      

Dual-Current Pump Module for Transient Improvement of Step-Down DC–DC Converters

This paper presents a novel dual-current pump module (DCPM) to improve the transient response of dc-dc converters. The DCPM operates only during transient to provide two additional current injections for step-up load and current drains for step-down load. Due to the two current pump paths, the current stress on the switches of the DCPM is also reduced. The measurement results show that the DCPM can enhance the dynamic recovery time of the buck dc-dc converter by more than an order.     

Analysis of Fourth-Order DC–DC Converters: A Flow Graph Approach

The signal flow graph (SFG) nonlinear modeling approach is well known for modeling DC-DC converters and it is a powerful analysis tool for higher order converter systems. Modeling of several specific fourth-order DC-DC converter circuits have been reported using conventional state-space averaging. Particular emphasis has been given, so far, only to arrive at any of the large, small-signal (SS) and steady-state models but not a generalized one. This paper gives the generalized SFG model of the fourth-order DC-DC converter topology that is useful for generating different types of fourth-order DC-DC converter circuits unified models. Further, it is shown that the deduction of large, SS and steady-state models from these unified SFGs is easy and straightforward. All possible fourth-order DC-DC converter circuits from its generalized topology have been identified and an analysis of a few converter circuits is given here for illustration of the proposed modeling method. Large-signal (LS) models are developed for different topology configurations and are programmed in SIMULINK simulator. LS responses against supply and load disturbances are obtained. Experimental observations are provided to validate the proposed modeling method.     

A Digital Two-Switching-Cycle Compensation Algorithm for Input-Voltage Transients in DC–DC Converters

In this paper, a new control algorithm is proposed to achieve excellent dynamic performance for dc–dc converters undergoing an input-voltage change. Using the concept of capacitor charge balance, the proposed algorithm predicts the two-switching-cycle duty ratio series to drive the converter back to steady state following an input-voltage transient. The equations needed to calculate the required duty cycle series are presented. By using the proposed algorithm, good transient performance, such as small output-voltage overshoot/undershoot and short recovery time, is achieved. Simulations and experiments are performed using a synchronous buck converter to verify the effectiveness of the proposed algorithm. Results show that the proposed method produces superior dynamic performance over that of a conventional current-mode PID controller.      

Reaching High Power Density in Multikilowatt DC–DC Converters With Galvanic Isolation

In this paper, the possibility of reaching high power densities in multikilowatt dc-dc converters with galvanic isolation is demonstrated and the main design issues are discussed. The issues related to converter topology, transformer design, and thermal management are addressed, and new conceptual solutions are proposed. Implementing zero-voltage-switching quasi-zero-current-switching topology, optimized transformer design with leakage layer, and thermal management based on conduction enhanced by heat pipes at critical places resulted in very high power density and efficiency. The power density reached by the converter prototype is 11.13 kW/L with water cooling and 6.6 kW/L with air cooling. In the same time, the measured efficiency exceeded 97% in a broad load range. The new design concepts are demonstrated on a 50-kW converter prototype that was successfully tested at full-load conditions.     

Step-Up/Step-Down DC–DC ZVS PWM Converter With Active Clamping

This paper presents a regenerative step-up/step-down DC-DC zero-voltage-switching pulsewidth-modulation converter with active clamping. The switch losses are reduced due to the implementation of a simple active snubber circuit that provides soft commutation in all the switches of the converter. The theoretical analysis, basic equations, design methodology, and experimental results are shown in this paper. A control methodology to assure the output voltage regulation is also proposed. The main advantages of the proposed power converter are the small number of components, simplicity of the controller, robustness, small weight and size, and high efficiency.     

Digital Hysteretic Voltage-Mode Control for DC–DC Converters Based on Asynchronous Sampling

This paper investigates a digital voltage-mode controller for dc–dc converters based on hysteresis modulation. The control structure implements a high-bandwidth hysteretic differentiator as its main building block, and realizes a nonconventional structure of PID compensation with performances comparable to analog hysteretic controls, thus breaking the bandwidth and dynamic limitations commonly encountered in typical digital control arrangements. The employment of an asynchronous A/D converter based on the threshold inverter quantization concept dramatically shrinks the average delay time that separates the sampling instant from the corrective control action. Moreover, the hysteretic nature of the derivative action results in an inherent nonlinear response to large signal load variations, which translates into fast control intervention and reduced settling times. The hysteretic differentiator employs a ring-oscillator-based modulator, which ensures resolution up to 390 ps without asking for a high-frequency clock. Both the 6-bit asynchronous A/D converter and the ring-oscillator-based modulator are designed and manufactured in the same IC using a standard 0.35 $mu$m CMOS process. Analytical modeling, computer simulations, and experimental results on a synchronous buck converter confirm the validity of the approach and the dynamic performances achievable by the proposed control architecture.