多单片机系统直接并行通信

介绍了两种多单片机系统的直接并行通信方法，即主从方法和多主方法。这两种方法均采用８２１２并行口组成通信总线，实现多单片机系统的直接并行通信     

多单片机处理系统并行通讯的实现

<正> 一、引言对于系统较大、实时性强、功能多、存贮量大、扩展能力要求强的工业控制系统,可采用多个单片机,组成一个多微处理器系统,使之具有并行处理功能。并行工作的各微处理器之间的信息交换,可采用串行通讯方式亦可用并行通讯方式。但对于实时性强,并     

基于FIFO芯片的单片机并行通信

本文介绍以FIFO芯片作为数据暂存器的单片机并行通信方法。文中给出双单片机系统和多单片机系统的通信接口设计方法。     

一种8位I／O口的单片机显示器和键盘接口

单片机应用系统中,多用LED数码管作为显示装置,以矩阵键盘作为输入装置。常用的单片机与显示器、键盘的接口有2种方式:并行方式和串行方式。并行方式以单片机的并行口(或扩展I/O口)通过一定的驱动装置连接LED数码管的段、位驱动器     

单片机多机并行通讯的一种方法

单片机多机通讯一般采用串行总线方式,但在通讯距离短,通讯数据量大,通讯速率高的场合也会用到多机并行通讯。本文介绍一种采用简单逻辑电路实现单片机多机并行通讯的方法。     

PC机与单片机之间并行通讯的设计

１引言在单片机的广泛应用与开发中,有时需要组成主从分布式微机系统,该系统必须要解决ＰＣ机与单片机之间的通讯问题。ＰＣ机与单片机之间的通讯,可采用串行通讯方式,也可采用并行通讯方式。串行通讯一般使用在信息量不大的远程通讯上;并行通讯一般是基于总线级的传...     

一种8位I/O口的单片机显示器和键盘接口

单片机应用系统中,多用LED数码管作为显示装置,以矩阵键盘作为输入装置.常用的单片机与显示器、键盘的接口有2种方式:并行方式和串行方式.并行方式以单片机的并行口(或扩展I/O口)通过一定的驱动装置连接LED数码管的段、位驱动器和矩阵式键盘,进行动态显示和扫描查询键盘.其电路简单,但占用的I/O口位较多.串行方式采用单片机的串行口连接移位寄存器,再驱动LED的段和矩阵式键盘.这种电路虽然所占的I/O口位较少,但接口芯片的数量将随LED数码管数量的增加而增加,电路比较复杂.本文介绍的接口电路,属并行方式,采用了合适的芯片进行硬件译码和驱动,故电路更为简单.与通常所用的并行方式相比,在连接相同数量的LED显示器和输入键的情况下,所占用的I/O口位较少,能满足一般单片机应用系统的需要.     

AT89C51单片机双机并行通讯设计

本文介绍了两AT89C51单片机之间采用并行通信,实现了双机互连的方法,分析了在每一种通信接口工作方式下数据传送的特点。在三种并行通信接口为AT89C51单片机应用系统扩充硬件资源的设计提供了新的途径。     

AT89C51单片机双机并行通讯设计

本文介绍了两AT89C51单片机之间采用并行通信，实现了双机互连的方法，分析了在每一种通信接口工作方式下数据传送的特点。在三种并行通信接口为AT89C51单片机应用系统扩充硬件资源的设计提供了新的途径.     

由单片机构成的带串行接口的LED显示驱动器

在单片机的人机对话中,经常用到多位LED进行数据显示。微机通常采用并行接口的静态或分时显示接口。这种方式占用比较多的I/O口及连线,如微机系统的主要硬件电路在主印制板上,而显示器在面板上,则它们之间的连线在10根以上;况且用并行显示,I/O也紧张。对于单片机系统来说,也     

异构机群系统上带返回信息的可分负载多轮调度算法

针对处理机具有不同的计算速度、通信能力的异构机群计算环境,以及实际应用中许多问题的求解在处理完任务后向中心处理机节点返回处理结果信息的情形,通过允许计算和通信操作重叠执行,采取FIFO调度策略和多次并行分配计算任务的方法,提出一种带返回结果信息的调度轮数可变的可分负载多轮调度算法.实验结果表明,该算法对于处理具有返回结果信息的应用的调度性能优于UMR可分负载多轮调度算法,并且可以获得近似最优的调度轮数.     

异构集群系统的可分负载多轮调度算法

针对更实际的异构集群计算环境,充分考虑处理机具有不同的计算速度、通信能力和存储容量的特性,通过允许计算和通信操作重叠执行,采取多次并行分配计算任务的方法,设计一种可分负载多轮调度算法。实验结果表明,该算法不但能获得与均匀多轮调度(UMR)算法相当的渐近最优调度时间长度,并且能够处理更大规模的应用负载,实用性更强。     

并行遗传算法在非均衡负载节点并行机上的实现

基于平衡负载、减小通信开销的考虑,对于非均衡负载节点并行机提出了两种并行遗传算法一动态负载平衡的孤岛模型和主从模型,并与基本的孤岛模型做了比较。两种算法在实际使用中均取得了较好的效果。     

Techniques for compiling programs on distributed memory multicomputers

It is widely accepted that distributed memory parallel computers will play an important role in solving computation-intensive problems. However, the design of an algorithm in a distributed memory system is time-consuming and error-prone, because a programmer is forced to manage both parallelism and communication. In this paper, we present techniques for compiling programs on distributed memory parallel computers. We will study the storage management of data arrays and the execution schedule arrangement of Do-loop programs on distributed memory parallel computers. First, we introduce formulas for representing data distribution of specific data arrays across processors. Then, we define communication cost for some message-passing communication operations. Next, we derive a dynamic programming algorithm for data distribution. After that, we show how to improve the communication time by pipelining data, and illustrate how to use data-dependence information for pipelining data. Jacobi's iterative algorithm and the Gauss elimination algorithm for linear systems are used to illustrate our method. We also present experimental results on a 32-node nCUBE-2 computer.     

An interface to a reliable packet delivery service for parallelsystems

Modern distributed memory parallel computers provide hardware support for the efficient and reliable delivery of interprocessor messages. This facility needs to be accessed by lightweight protocols that do not waste the performance of the underlying hardware; the heavyweight layering techniques traditionally used in distributed systems are wholly inappropriate. A low-level communication interface is therefore presented which exploits modern architectures effectively, while maintaining a good match to existing parallel programming environments. The interface defines mechanisms to access an asynchronous reliable packet delivery service. It permits messaging protocols to be efficiently synthesized by considering the activity at their end-points alone. This arrangement effectively decouples the implementation of protocols from low-level architectural features, and hence aids the portability of parallel programming environments. Furthermore, the interface allows the communication network to be shared by multiple programming paradigms, giving additional flexibility over existing systems     

单套网络与多套网络通信性能的比较与分析

目前,以单套网络作为通信系统的机群广泛应用于科学计算中,为了进一步提高机群计算处理能力,引入了多套网络作为机群通信系统。多套网络能够明显地提高机群的通信性能,但是怀疑其应用性能是否也有相应的提高。为了解决疑问,在GM通信系统的基础上实现了双套网络的通信系统(PCS),并全面而又具体地对GM和PCS进行性能比较,实验数据表明:在通信性能方面,PCS的带宽比GM提高了98.4%,而延迟只增加了0.3!s￣0.5!s;在应用性能方面,对于通信量比较大、大消息比较频繁的应用程序,PCS能够取得很好的性能提高,如IS程序,执行时间减少了25.3%,而对于小消息通信比较频繁的应用程序,性能会略有下降,如LU程序,执行时间增加了0.4%。     

基于LAN的并行计算环境

文章给出厂一个这种模型的并行计算机系统，设计了一个简单的工作算法．并对该算法的性能进行了分析，最终发现影响并行计算的性能的主要因素——传输速度。为了提高其性能，必须对传输介质、传输设备和通信协议等进行改造。     

New architectures: Performance highlights and new algorithms

Parallel computers are having a profound impact on computational science. Recently highly parallel machines have taken the lead as the fastest supercomputers, a trend that is likely to accelerate in the future. We describe some of these new computers, and issues involved in using them. We present elliptic PDE solutions currently running at 3.8 gigaflops, and an atmospheric dynamics model running at 1.7 gigaflops, on a 65 536-processor computer.

One intrinsic disadvantage of a parallel machine is the need to perform inter-processor communication. It is important to ensure that such communication time is maintained at a small fraction of computation time. We analyze standard multigrid algorithms in two and three dimensions from this point of view, indicating that performance efficiencies in excess of 95% are attainable under suitable conditions on moderately parallel machines. We also demonstrate that such performance is not attainable for multigrid on massively parallel computers, as indicated by an example of poor multigrid efficiency on 65 536 processors. The fundamental difficulty is the inability to keep 65 536 processors busy when operating on very coarse grids.

Most algorithms used for implementing applications on parallel machines have been derived directly from algorithms designed for serial machines. The previously mentioned multigrid example indicates that such ‘parallelized’ algorithms may not always be optimal. Parallel machines open the possibility of finding totally new approaches to solving standard tasks—intrinsically parallel algorithms. In particular, we present a class of superconvergent multiple scale methods that were motivated directly by massevely parallel machines. These methods differ from standard multigrid methods in an intrinsic way, and allow all processors to be used at all times, even when processing on the coarsest grid levels. Their serial versions are not sensible algorithms. The idea that parallel hardware—the Connection Machine in this case—can lead to discovery of new mathematical algorithms was surprising for us.     

基于单片机的多并行接口设备数据传输的集成和控制

在要求传输距离近,通信速度快的数据采集应用中,如CCD、视频数据采集,往往采用并行接口方式。该文针对目前多并行接口设备数据传输方式中采用多计算机收集数据和采用并行接口数据采集卡存在的不足,提出了采用单片机对多台利用并行接口进行数据传输的设备进行集成和控制,完成数据的传输。在数据传输中,针对计算机的标准并行接口,及所有外围设备的数据线是共用,而控制线则需要独立地和计算机建立握手协议的特点,通过单片机接管外围设备的控制线,完成对多设备数据传输的集成和控制。该方法已经在近景三维测量系统中得到了应用,并取得了满意的结果。