CNFET-based voltage rectifier circuit for biomedical implantable applications

Carbon nanotube field effect transistor(CNFET) shows lower threshold voltage and smaller leakage current in comparison to its CMOS counterpart. In this paper, two kinds of CNFET-based rectifiers, full-wave rectifiers and voltage doubler rectifiers are presented for biomedical implantable applications. Based on the standard 32 nm CNFET model, the electrical performance of CNFET rectifiers is analyzed and compared. Simulation results show the voltage conversion efficiency(VCE) and power conversion efficiency(PCE) achieve 70.82% and 72.49% for CNFET full-wave rectifiers and 56.60% and 61.17% for CNFET voltage double rectifiers at typical 1.0 V input voltage excitation, which are higher than that of CMOS design. Moreover, considering the controllable property of CNFET threshold voltage, the effect of various design parameters on the electrical performance is investigated. It is observed that the VCE and PCE of CNFET rectifier increase with increasing CNT diameter and number of tubes. The proposed results would provide some guidelines for design and optimization of CNFET-based rectifier circuits.     

Towards VCSEL-based integrated optical traps for biomedical applications

A new concept to miniaturise optical trapping and manipulation systems is presented. Integrated optical traps based on top-emitting vertical-cavity surface-emitting lasers (VCSELs) with near-infrared emission in combination with photoresist microlenses were fabricated, characterised and demonstrated. Elevation and trapping of 10 /spl mu/m-sized polystyrene particles in water is achieved at optical output powers as small as 9 mW.     

应用于生物医疗的0.6-V 8.3-ENOB 异步时序逐次逼近型模数转换器

A microwatt asynchronous successive approximation register （SAR） analog-to-digital converter （ADC） is presented. The supply voltage of the SAR ADC is decreased to 0.6 V to fit the low voltage and low power require- ments of biomedical systems. The tail capacitor of the DAC array is reused for least significant bit conversion to decrease the total DAC capacitance thus reducing the power. Asynchronous control logic avoids the high frequency clock generator and further reduces the power consumption. The prototype ADC is fabricated with a standard 0.18 μm CMOS technology. Experimental results show that it achieves an ENOB of 8.3 bit at a 300-kS/s sampling rate. Very low power consumption of 3.04 μW is achieved, resulting in a figure of merit of 32 fJ/conv.-step.     

10 K NbN ADC for IR sensor applications

The authors report the design, fabrication and test results of a 12-bit NbN SFQ counting A/D converter operating at 9 to 10 K and its insertion into a test IR focal plane array sensor system. The NbN IC is based on a linearized SQUID front-end which generates SFQ pulses at a frequency proportional to the signal. A gated SFQ counter integrates the signal over the sample time and the data is driven off chip through a serializing latching voltage state logic (MVTL) output shift register. The TRW A/D converter chip has been packaged and inserted into an IR focal plane array sensor test facility, or test bed, at the NASA Jet Propulsion Laboratory. The entire system has been successfully demonstrated producing IR images at 100 frames/s with the NbN A/D converter operating at 9 K, dissipating 0.3 mW. Performance of the A/D converter chip, the package including magnetic shielding and medium/high speed signal I/O, and the integrated test bed system are discussed.     

An ultralow-power UHF transceiver integrated in a standard digitalCMOS process: transmitter

In the first part of the paper, also in this issue of the JOURNAL, the design of the frequency synthesizer and receiver section of an FSK transceiver was described. It operates in the 434-MHz ISM (Industrial, Scientific, Medical) band and is realized in a standard digital 0.5-μm CMOS process. This companion paper focuses on the realization of the transmitter section. It includes a power amplifier, an upconverter, and the circuit generating the baseband quadrature signals with a continuous phase modulation. The overall measured efficiency of the packaged circuit is higher than 38% for a 1.2-V supply and an output power reaching 10 dBm at 433 MHz. The system is designed to still operate at 1-V supply, delivering more than 1 mW with an efficiency higher than 15%     

A novel wideband fractal-shaped MIMO antenna for brain and skin implantable biomedical applications

A novel fractal-shaped wideband multiple-input multiple-output (MIMO) antenna is proposed for brain and skin implantable applications. This antenna works in the 2.4–2.48 GHz band of industrial, scientific, and medical (ISM) standards. The fractal-shaped wideband MIMO antenna is miniature in size with a footprint of $0.13\mathrm{\lambda }\times 0.06\mathrm{\lambda }\times 0.01\mathrm{\lambda }$. Rogers RT/Duroid 6010 high-dielectric substrate material is used to fabricate the optimized design in order to validate the implantable MIMO antenna structure. The same high-permittivity substrate material has been used as a superstrate. Experiments were carried out in brain and skin-mimicking gel at 2.45 GHz in the ISM band. The proposed antenna has a peak gain of −21.3 dBi at 2.45 GHz. High isolation (>20 dB) between two MIMO ports is attained. The proposed antenna achieves a fractional bandwidth of 36.76% and an impedance bandwidth of 1.02 GHz. According to IEEE safety regulations for 1- and 10-g tissues, the computed maximum specific absorption rate (SAR) is safe bound.     

A fully integrated 4-channel GMR biochip for biomedical detection applications

This paper proposed a fully integrated 4-channel GMR biochip for biomedical detection assays, including the acquisition analog frontend for small signal extraction, 180° phase shifter, resistor ladder and control circuits for carrier cancellation, and amplifiers. Besides, the overall system was evaluated comprehensively by experiment, and the output noise is as low as \(321.7\mathrm {nV/\sqrt{Hz}},\) which is lower than the signal produced by one single 500nm magnetic particle during the detection.     

An ultralow-power UHF transceiver integrated in a standard digitalCMOS process: architecture and receiver

A broad range of high-volume consumer applications require low-power battery-operated wireless microsystems and sensors. These systems should conciliate a sufficient battery lifetime with reduced dimensions, low cost, and versatility. Their design highlights the tradeoff between performance, lifetime, cost, and power consumption. Also, special circuit and design techniques are needed to comply with the reduced supply voltage (down to 1 V, for single battery cell operation). These considerations are illustrated by the design of a prototype receiver chip realized in a standard 0.5-μm digital CMOS process with 0.6-V threshold voltage. The chip is dedicated to a distributed sensors network and is based on a direct-conversion architecture. The circuit operates at 1-V power supply in the 434-MHz European ISM band and consumes only 1 mW in receive mode. It achieves a -95 dBm sensitivity for a data rate of 24 kb/s     

Adaptive successive approximation ADC for biomedical acquisition system

This work proposes a low-power adaptive successive approximation ADC that operates in 12-bit and 8-bit resolution for data acquisition in biomedical system. A fully differential architecture and an energy-efficient switching scheme are employed. The modified switching operation allows the output voltage of the DAC capacitor array to approach the common mode voltage in order to reduce the offset voltage variation of the comparator. A test chip is implemented using a 0.18-µm CMOS process. The core area is 904×650 μm² The measurement results show that performance integrity and power efficiency are both significantly achieved in 12-bit resolution only. After the test using 1.8-V supply voltage, the SNDR is 65.59 dB and ENOB is 10.62 bits. Using 200 kS/s sampling rate, the ADC core consumption is 40.24 μW and 18.63 μW, for 12-bit and 8-bit case, respectively.     

Ultra-low-power variable-resolution successive approximation ADC for biomedical application

An ultra-low-power variable-resolution successive approximation analogue-to-digital converter (ADC) is presented. A novel binary search algorithm architecture is proposed to replace the conventional digital-to-analogue converter to significantly reduce system area and power consumption. The proposed ADC consumes less than 22.2 /spl mu/W of power at a conventional 2 V battery supply with a sampling rate of 200 samples/s, and standby power consumption of less than 1 /spl mu/W.     

An experimental BiCMOS video 10 bit ADC

The possibility of realizing a high-quality, low-power, and low-cost video 10 bit analog-to-digital converter is examined utilizing BiCMOS circuit and process technology. A single-power-supply, 10 bit 10 MHz operation, 500 mW power dissipation, and a 4.2×6.2 mm chip size with 4200 elements were obtained     

Design of an integrated low power high CMRR instrumentation amplifier for biomedical applications

The objective of this paper is to discuss the advantages and drawbacks of using Trapezoidal Association of Transistors (TAT) in the implementation of a low-power high-CMRR CMOS instrumentation amplifier (IA) aimed for biomedical applications. IAs are well suited for biomedical applications due to its high CMRR. For the sake of comparison, two versions of the circuit were designed, prototyped and characterized. The performance of a version with its current mirrors implemented with TAT, where supposedly higher CMRR could be achievable, is compared to another with single-transistor implementation of current mirrors in order to analyze the CMRR performance. The IA circuit was designed in AMIS 1.5 μm technology and manufactured through the MOSIS Service. In addition to the better performance attained by the classic implementation of the amplifier, with CMRR higher than 120 dB, this version of the IA consumed less than one third of the area from the TAT version. Comparison of both versions from same topology indicates no advantages of using TATs in the current mirrors of this type of IA.     

Fully integrated blue/UV SOI CMOS photosensor for biomedical and environmental applications

In this paper, we present a microsystem for measuring optical power in blue/UV wavelengths (from λ = 200 nm to λ = 450 nm) which includes a photodiode and the analog processing circuit of the photodiode signal, fully integrated in 2 μm SOI CMOS technology. The photodiode has a maximum responsivity for λ = 400 nm. Th photosensor functions as a current to frequency converter. Measurements of the microsystem illuminated by blue and UV LEDs demonstrate the good linear behavior, sensitivity and efficiency of the system.     

An OTA gain enhancement technique for low power biomedical applications

The performance requirement of an operational trans-conductance amplifier (OTA) for the high gain and low power neural recording frontend has been addressed in this paper. A novel split differential pair technique is proposed to improve the gain of the OTA without any additional bias current requirements. The design demonstrates a significant performance enhancement when compared to existing techniques, such as gain-boosting and recycling. A qualitative and quantitative treatment is presented to explore the impact of the split ratio on the performance parameters of gain, bandwidth, and linearity. A prototype implemented in TSMC 65 nm CMOS technology achieved 68 dB open loop-gain (13 dB higher than the conventional circuit) and a 17 kHz 3-dB bandwidth. A linearity of ? 62 dB has been achieved with 7 mV pk–pk signal at the input. The circuit operates from a 1 V supply and draws 0.6 uA static current. The prototype occupies 3300 um² silicon area.     

Nondissipative switched networks for high-power applications

The letter seeks to extend the concepts of active-filter theory to high-power applications. Current-fed switched-capacitor networks and voltage-fed switched-inductor networks are efficient topologies suitable for high-power operation. Passive and active switched networks realised include the transformer, gyrator and a negative inductor using a generalised impedance convertor.     

Heuristic receiver for implantable UWB applications

High data rate implantable wireless systems come with many challenges, chief among them being low power operation and high linearity. A low noise amplifier (LNA) designed for this application must include high gain, low noise figure (NF) and better linearity at low power consumption within the required frequency band. The down converter also requires a passive mixer to achieve low power and better linearity. In this paper, design is based on an Impulse Response (IR) Ultra-wideband (UWB) receiver operating at (3.1–5) GHz implemented in 0.25 μm CMOS Silicon on Sapphire (SOS). This paper reports the design and measurement of a UWB receiver with a designed and measured linearity of 17 dBm, a gain of 30.5 dB and a minimum NF of 4.5 dB, which make it suitable for implantable radio applications.     

一种嵌入式10位2MS/s逐次逼近模数转换器

设计了一种10位2 MS/s嵌入式逐次逼近结构ADC。为提高ADC精度,其中DAC采用电压和电荷按比例缩放混合结构,比较器使用了输入失调校准和输出失调校准技术。采用TSMC0.18μm1P6M数字CMOS工艺进行流片验证,整个ADC核面积仅为0.9×0.6 mm2。测试结果表明,在2 MHz采样率、输入信号为180 kHz正弦信号情况下,该ADC模块具有8.51位的有效分辨率,最大微分非线性为-0.8~+0.7LSB,最大积分非线性为-1.7~+1.5 LSB,而整个模块的功耗仅为1.2 mW。     

一种集成高压感性能量耦合前端的植入式神经电刺激器

本文提出了一种包含片上感性能量耦合前端和高压刺激生成电路的高集成度神经电刺激器。其中高压感性能量耦合前端由高压全波整流桥（交流输入可达100V）,高压串联稳压 器（24V和5V输出）,和包含了带隙基准的线性稳压器（1.8V和3.3V输出）构成。凭借高压串联稳压器的大电压输出（24V）,该神经电刺激器能够在高的电极-组织接触电阻情 况下输出较大的刺激电流。本文所述芯片使用CSMC 1μm 高压BCD工艺制备,芯片面积为5.8 mm2。在13.56 MHz交流输入情况下测试,表现出良好的稳定性。与类似的芯片相比 ,该芯片具有宽输入范围、高输出电压和高集成度的优势,非常适合植入式神经电刺激的应用。     

Multifrequency microwave thermograph for biomedical applications

This paper presents problems related to thermal radiation of human bodies in microwave range with respect to diagnosis of breast carcinoma. A mathematical model of thermal radiation transfer through tissues is introduced and methods of measurement of temperature, depth and size of a heat source, by means of multifrequency microwave thermograph are described. Theoretical considerations are supplemented by presentation of experimental results.     

A new non-uniform adaptive-sampling successive approximation ADC for biomedical sparse signals

This paper presents a new sampling technique and a successive approximation analog to digital converter (SA-ADC) which samples sparse signals in a non-uniform adaptive way. The proposed sampling technique has the capability to be incorporated in the structure of the SA-ADC. The proposed SA-ADC changes the rate of sampling in accordance with the rate of changes of the signal. In this way, the data volume is reduced considerably without losing the important information in the signal. Simulation results in the 0.18 um CMOS technology shows a power saving of up to 90.5 % and a compression ratio of 7.5 compared to the conventional sampling technique of ECG signals.