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1.
非外延集电区的超高压锗硅异质结双极晶体管   总被引:1,自引:1,他引:0  
介绍了在0.18 μm逻辑工艺平台上全新设计的超高压锗硅异质结双极晶体管(SiGe HBT),该器件改变了外延的一维纵向集电区,而采用了通过离子注入掺杂的“L形”二维集电区结构,集电区包括本征基区下方的纵向集电区和场氧底部横向集电区.该器件可在同一工艺中通过版图中横向集电区长度的变化实现不同的击穿电压,因此可制作超高压...  相似文献   

2.
Liu  W.U. Costa  D. Harris  J. 《Electronics letters》1990,26(17):1361-1362
A novel, doubly self-aligned process technology for AlGaAs/GaAs heterojunction bipolar transistors (HBT) has been developed. This doubly self-aligned process enables self-alignment for all emitter, base, and collector contacts and the fabricated device occupies an area approaching the intrinsic device area. The resulting base-collector capacitance of a fabricated device is reduced below half of the base-collector capacitance of conventional devices. The reductions in the capacitance are reflected in the superior cutoff frequency and maximum oscillation frequency of the doubly self-aligned devices as compared with conventional devices.<>  相似文献   

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本文提出并成功地试制了一种InP异质结双极型晶体管.其主要特点是利用在半绝缘InP衬底中注硅形成收集区,然后再进行液相外延形成基区和发射区.本结构能有效减少基区一收集区的结电容C_(BC)和寄生电容.避免了薄基区上制作基极欧姆接触时经常发生的基极-收集极之间的短路问题,提高了器件的可靠性结果表明,该器件具有较高的共发射极电流增益(h_(FE)=150~250),并能够双向工作.文章对该结构的优点进行了分析,给出了器件的工艺过程.  相似文献   

5.
辛金锋  王军 《通信技术》2011,(10):116-117,120
对现代的双极型晶体管而言,载流子在基极和集电极的空间电荷区(CB SCR)传输延迟可比基极渡越时间,甚至要大于后者。为了更精确地表征了SiGe HBT的射频噪声性能,对van Vliet模型做了扩展,使其包含基极集电极空间电荷区的延迟效应。用2个与噪声相关的延迟时间对transport模型进行了扩展,使得在没有非准静态Y参数的情况下仍然可以对基极和集电极电流噪声进行精确建模。最后,在JC=12.2 mA/μm2,AE=0.12×18μm2条件下,分别对2种模型的基极和集电极噪声电流谱及其归一化相关系数做图并与计算得出的解析值相比较,验证了模型的有效性。  相似文献   

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徐小波  李瑞雪 《微电子学》2018,48(4):496-499, 514
研究了与CMOS兼容的SOI SiGe HBT结构。首先,分析了SOI SiGe HBT与传统SiGe HBT在结构上的不同之处。然后,针对新结构的全部耗尽工作模式,建立了考虑电流效应的集电结渡越时间模型。最后,讨论了渡越时间与集电区掺杂浓度、集电结电压、传输电流的关系,并与传统器件的渡越时间进行了比较。该渡越时间模型的建立为SOI SiGe HBT特征频率的设计与优化提供了理论基础。  相似文献   

8.
A C-doped GaInP/GaAs HBT using a selective buried sub-collector has been fabricated by two growth steps. The device was fabricated with minimum overlap of the extrinsic base and the sub-collector region to reduce base-collector capacitance. The experiment shows that the base collector capacitance is reduced to about half of that of an HBT without selective buried sub-collector while the base resistance remains unchanged. A current gain of 35, fT of 50 GHz and fmax of 140 GHz are obtained with this technology  相似文献   

9.
Improved power linearity of InGaP/GaAs heterojunction bipolar transistors (HBTs) with collector design is reported. The collector design is based on nonuniform collector doping profile which is to employ a thin high-doping layer (5/spl times/10/sup 17/ cm/sup -3//200 /spl Aring/) inside the collector (1/spl times/10/sup 16/ cm/sup -3//7000 /spl Aring/). The additional thin high-doping layer within the collector shows no obvious effects and impacts in dc characteristics and device fabrication if the layer was inserted close to the subcollector. For an HBT with a thin high-doping layer being inserted 4000 /spl Aring/ from the base-collector junction, the experimental result on third-order intermodulation demonstrates the significant reduction by as large as 9 dBc and improved IIP3 by 5 dB under input power of -10 dBm at frequency of 1.8 GHz.  相似文献   

10.
The base-collector capacitance of an InP/GaInAs heterojunction bipolar transistor (HBT) was measured as a function of collector current and base-collector voltage. The experimentally obtained results were considerably smaller than the expected dielectric capacitance. For example, at a collector current density of 50 kA/cm2 the value of the intrinsic Cbc was 33% less than the expected dielectric capacitance. A model that takes into account modulation of electron velocity in the collector depletion region by the base-collector voltage was employed to account for the experimental results. An arbitrary profile of the electron velocity in the collector, which accounts for the velocity overshoot effect, was assumed in developing this model. Excellent agreement was obtained with no fitting parameters. The model relates the change in Cbc to the variation of the collector delay time with base-collector voltage  相似文献   

11.
新结构微波功率SiGe HBT的数值分析   总被引:1,自引:1,他引:0  
提出一种新结构的微波功率SiGe异质结双极晶体管(SiGe HBT),该结构通过在传统SiGe HBT的外基区下的集电区中挖槽并填充SiO2的方法来改善器件的高频性能.将相同尺寸的新结构和传统结构的器件仿真结果进行比较,发现新结构器件的基区-集电区电容减少了55%,因而使器件的最大有效增益提高了大约2dB,其工作在低压(Vce=4.5V)和高压(Vce=28V)情况下的最高振荡频率分别提高了24%和10%.  相似文献   

12.
A physically based, large signal heterojunction bipolar transistor (HBT) model is presented to account for the time dependence of the base, collector, and emitter charging currents, as well as self heating effects. The model tracks device performance over eight decades of current. The model can be used as the basis of SPICE modeling approximations, and to this end, examples are presented. A thesis for the divergence of high frequency large signal SPICE simulations from measured data is formulated, including a requisite empirical equation for the base-collector junction capacitance  相似文献   

13.
This paper investigates the temperature dependence (from 77 to 300 K) of dc, ac, and power characteristics for n-p-n SiGe heterojunction bipolar transistors (HBTs) with and without selectively implanted collector (SIC). In SiGe HBTs without SIC, the valance band discontinuity at the base-collector heterojunction induces a parasitic conduction band barrier while biasing at saturation region and high current operation at cryogenic temperatures. This parasitic conduction band barrier significantly reduces the current gain and cutoff frequency. For transistors biased with fixed collector current, the measured output power, power-added efficiency, and linearity at 2.4 GHz decrease significantly with decreasing operation temperatures. The temperature dependence of output power characteristic is analyzed by Kirk effect, current gain, and cutoff frequency at different temperatures. The parasitic conduction band barrier in SiGe HBTs with SIC is negligible, and thus the device achieves better power performance at cryogenic temperatures compared with that in SiGe HBT without SIC.  相似文献   

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提出了一个T等效异质结双极晶体管高频噪声电路模型.该模型是对通常用在硅双极晶体管中的Hawkins噪声模型进行改进得到的,主要的改进包括发射极理想因子、发射极电阻、内部BC结电容、外部BC结电容和其它寄生元素对器件噪声性能的影响.为了从等效噪声电路模型中计算出精确的噪声参数,采用了噪声相关矩阵法来计算噪声参数,从而避免了在等效电路变换中可能产生的简化和复杂的噪声测量.进一步利用该模型分析了等效电路元素对器件最小噪声系数的影响,分析计算结果和物理解释一致.同时通过基于异质结双极晶体管器件物理的公式,给出了器件参数对器件最小噪声系数的影响.  相似文献   

16.
We report a novel BiCMOS compatible lateral SiC N-emitter, SiGe P-base Schottky metal-collector NPM HBT on SOI. The proposed lateral NPM HBT performance has been evaluated in detail using 2-dimensional device simulation by comparing it with the equivalent NPN HBT and homojunction silicon NPM BJT structures. Based on our simulation results, it is observed that while both the lateral NPM and NPN HBTs exhibit high current gain, high cut-off frequency compared to the homojunction NPN BJT, the lateral NPM HBT has the additional benefit of suppressed Kirk effect and excellent transient response over its counterpart lateral NPN HBT. The improved performance of the proposed NPM HBT is discussed in detail and a CMOS compatible process is suggested for its fabrication.  相似文献   

17.
Consistent modeling of capacitances and transit times of GaAs-based HBTs   总被引:1,自引:0,他引:1  
This paper investigates how time delays and capacitances observed under small-signal conditions can be consistently accounted for in heterojunction bipolar transistor (HBT) large-signal models. The approach starts at the circuit level by mapping the large-signal equivalent circuit (which consists of charge and current sources) to the well-known small-signal circuit (which consists of capacitances, transit-time, and resistances). It is shown that and how bias dependent charge sources at either pn-junction impact transit-time, base-collector capacitance, and their mutual dependence. It is demonstrated for the example of a GaAs-based HBT that the interrelation of the elements is observed in measurements as predicted. The results of the investigation enhance understanding of HBT model characteristics and provide a criterion to check model consistency.  相似文献   

18.
A modified analysis of the pulse response of silicon MOS capacitors is presented which takes into account the lateral spreading of the depletion region around the gate area. Two aspects of this lateral depletion region which have previously been ignored, namely the bulk generation and space charge in this region, are taken into account and used to explain the experimentally observed dependence of the capacitor relaxation time on the device aspect ratio. The analysis allows the bulk lifetime to be obtained more accurately and also enables the surface recombination velocity resulting from a particular device processing schedule to be estimated. The results obtained agree well with those determined from junction leakage current measurements and the relevance of the lateral edge effect to the characteristics of a more complex charge coupled device has been discussed.  相似文献   

19.
This paper describes a novel fully planar AlGaAs/GaAs heterojunction bipolar transistor (HBT) technology using selective chemical beam epitaxy (CBE). Planarization is achieved by a selective regrowth of the base and collector contact layers. This process allows the simultaneous metallization of the emitter, base and collector on top of the device. For the devices with an emitter-base junction area of 2×6 μm2 and a base-collector junction area of 14×6 μm2, a current gain cut off frequency of 50 GHz and a maximum oscillation frequency of 30 GHz are achieved. The common emitter current gain hFE is 25 for a collector current density Jc of 2×104 A/cm2  相似文献   

20.
研究了GaAs HBT高能电子(~1MeV)辐照的总剂量效应。结果表明,电子辐照后GaAs HBT的基极电流增大,辐照损伤程度随辐照总剂量增加而增加,这和其他研究观察到的现象相同。所不同的是,实验中发现随辐照剂量增大器件集电极饱和电压、残余电压均增大。因此认为,高能电子辐照造成的位移损伤在GaAs HBT集电区和BC结内诱生的大量复合中心使集电极串联电阻增大,以及BE、BC结内形成的复合中心俘获结内载流子使载流子浓度降低造成BE、BC结自建电势差下降是集电极饱和电压和残余电压增加的主要原因。  相似文献   

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