Pulse current trimming of polysilicon resistors

The practical application of pulse current trimming of polysilicon resistors has been investigated and successfully implemented in large scale integrated circuit production. In-package pulse current trimming of heavily doped polysilicon resistors allows precise control of the final resistor value and can effectively compensate for process variation in polysilicon sheet resistance. The technique requires no additional process complexity, is layout efficient, remarkably accurate, and is quick and inexpensive from a test perspective. Resistance reduction occurring during the trim process is shown to be reversible to a small, but usable, extent for n-type polysilicon. Thermal modeling of the resistor trim process shows that the peak temperature reached within the polysilicon film must exceed the highest temperature encountered during wafer fabrication before any permanent resistance change occurs. As the resistor is further trimmed, the film temperature approaches the melting point of silicon     

An assessment of the applicability of embedded resistor trimming and rework

The successful use of embedded resistors in many applications will require that the fabricated resistors be trimmed prior to lamination into printed circuit boards to attain required design tolerances. Depending on the application, the economic value of the board being fabricated, and the process used to create the embedded resistors, it may also be prudent to consider reworking resistors that are incorrectly trimmed or with initial values that are too large (untrimmable resistors). This paper uses a model of the resistor/board yield coupled with a cost model of the trim and rework processes to identify conditions under which applications should neither trim nor rework, trim but not rework, or perform both trimming and rework of embedded resistors, as a function of the design tolerance for the resistors and the accuracy with which the embedded resistors can be fabricated. Example results are presented for several applications ranging from small boards with a high density of embedded resistors to large boards with a low density of embedded resistors. Distinct regions of trimming and rework applicability that are nearly application independent can be identified as a function of design tolerance, printing/plating/etching variation, and the characteristics of the trimming process.     

An approach to ensure stability of precision laser trimmed thick film resistors

In view of its complete automation, very high throughput, least in process variation, etc., laser trimming has been an industry standard in thick film technology. Random variations in print thickness, uncertainty of sheet resistivity in a paste lot and other process variations in a production line make it difficult to ensure a reasonably good yield for high precision resistors, where the tolerances under consideration are of the order of ±0.30%. Special attention has to be given to the resistor configuration type of laser cut and post trim processing. The studies were performed on samples drawn from a regular production line which contained two resistor—one with AR (L/W) > 1 where an L cut/Vernier cut combination was used for trimming and the other with AR < 1 where a P cut/Vernier cut combination was used. The post trim resistors' performance was studied under two conditions—one at room temperature and the other after baking at 150°C for 100hr and then maintained at room temperature. These studies lead to the conclusion that for high precision resistors the resistors should be so designed that the L cut/Vernier cut combination can be adopted for trimming. Secondly the trimmed resistor should be stored at 150°C for a period of 100 hr to make the post trim behaviour more predictable and also to achieve better yield.     

一种片后数字修调技术及其应用

介绍了一种片后数字修调(Trim)技术。传统的修调技术一般是利用熔吹、激光或E2PROM对电路进行修正。该技术提出了一种可反复的修调方案,并可对电阻、电容等各种元器件进行调整,可广泛应用于一些要求出色动态特性的场合。设计中,将其应用于一个收发芯片的有源滤波器电路,实现了对滤波器截止频率的片后调整。     

New trim configurations for laser trimmed thick-film resistors—theoretical analysis, numerical simulation and experimental verification

In this paper a new approach to laser trimming is investigated and compared with traditional trimming. It relies on creating an additional contact for lowering resistance values thus simplifying the design and widening resistance trimming ranges. This enables to achieve a correction with shorter cut length of, so it can lead to a faster and cheaper fabrication process of hybrid integrated circuit. This paper analyses trimming range and trimming characteristics computed for different shapes of added contact using a new, very fast and easily programmable method. Moreover the experimental verification of such approach is presented. The relative trimming range and sensitivity are analyzed as a function of additional contact shape and cut length. Next long-term stability, pulse durability and low frequency noise are compared for two- and three-contact resistors versus trim pathway length.     

Quantitative Analysis of Resistance Tolerance of Polymer Thick Film Printed Resistors

Low cost methodologies of resistor fabrications are needed for cost effective embedding of resistors into polymeric substrates. Polymer thick film resistors (PTFRs) are low temperature processable, low cost resistors with a wide resistivity range. The electrical resistance variation of these resistors is in the range of around plusmn20% after deposition and trimming procedure is employed to tune the resistances to meet specifications. This adds to the cost and complicates the fabrication process when the resistors are embedded. In this study, the influences of PTFRs geometries on the resistance tolerances were investigated. Results indicated that the resistance accuracy of stencil printed resistors was markedly higher than that of the screen-printed resistors. The screen-printed resistor edge geometries were observed to be rough. Finite element method analyses revealed that the resistance tolerances were associated with edge roughness. Remedies to reduced variations were proposed and the relationship between resistance tolerances and aperture orientations was also outlined     

Pulse trimming of thin-film resistors

Resistivity decreases can be induced in Cr-SiO films by current pulses of short duration. Precision resistance measurements between pulses permit trimming of film resistors to 0.1 percent in less than one second, provided pulse power, duration, and frequency are adjusted properly. A trimmer system that contacts several resistors through multiple probes and controls the process through a paper-tape reader is described. Pulse trimming has been applied to film resistors ranging from pure Cr up to Cr-40 mole % SiO. After annealing at 400°C, additional resistance decreases of at least 20 percent are possible with all compositions containing SiO. The interval between 15 and 30 mole % SiO is most suitable because substantial resistance changes are obtained at pulse powers well below the limits at which resistors burn out.     

Quantitative Analysis of Resistance Variations in Nickel-Phosphorus (NiP) Resistors

Embedded resistors can be fabricated by plating resistive Nickel-Phosphorus (NiP) alloy to form resistors on circuit boards. As-deposited NiP alloy resistors typically have poor resistance tolerances and require tuning by costly laser trimming to meet specifications. The cost of the resistors can be reduced if the tolerances can be reduced without laser trimming. In this study, a group of parameters affecting patterning accuracies, plating and sheet resistivities were varied to evaluate their effects on the resistance tolerances of electroless-plated NiP resistors. The effect of the substrate on sheet resistivity variations was also characterized. Design guidelines to obtain NiP resistors with low tolerance without laser trimming arc discussed.     

A Random Trimming Approach for Obtaining High-Precision Embedded Resistors

Embedded resistors will potentially allow electronic applications to cost less and perform better. However, it is difficult to fabricate embedded resistors to the correct resistance value, so embedded resistors are often fabricated with a lower value and then trimmed to raise the resistance to the desired value. A computer simulation for the trimming process of an embedded resistor has been developed that has been verified and calibrated against experimental results. A study of embedded resistors containing random voids of varying size has been performed. A new trimming strategy in which the trims are made randomly (rather than conventional L-shaped trims) is proposed and the results of the analysis demonstrate that single-dive trimming combined with random trimming allows higher precision embedded resistors to be obtained than conventional trimming patterns.     

镍-磷（Ni—P）电阻器的电阻变化的定量分析

在PCB上镀复形成电阻器的电阻性镍-磷（Ni-P）合金可以制造嵌入电阻器。这样沉积的Ni-P合金电阻器具有不良的电阻公差,要求采用旨在满足规格的昂贵的激光修整进行调节。如果无须激光调整即可降低公差,则可降低电阻器成本。本文中,变化影响图形精度、镀层和薄膜电阻率的一组参数,以评价它们对化学镀Ni-P电阻器的电阻公差的影响。还表征了基材对薄膜电阻率变化的影响。还讨论了无须激光调整可以获得低公差的Ni-P电阻器的设计指南。     

应用无掩膜印刷术埋嵌微型聚合物厚膜电阻

Optomec公司开发了一种名为M3DTM的新型印刷技术,用于沉积高精度PTF(Polymer Thick Film)电阻。这种新方法生产出的电阻,面积小到0.05mm2,阻值范围达到100Ω-10000Ω,阻值公差能够保持在10%以内。M3DTM技术可以直接利用CAD文件决定电阻的位置以及阻值大小,而不需要制作掩膜模版,也不需要事后对阻值进行微调,是一种印刷埋嵌电阻的高性价比解决方案。     

A finite-mesh technique for laser trimming of thin-film resistors

A laser trimming technique in which a finite number of links are cut in a regular mesh of identical-valued resistors is described. The method eliminates long-term resistance drift due to slow annealing in the `heat-affected-zone' adjacent to the laser kerf. It is shown that the precision and resolution can be comparable to those achieved with conventional methods, and that quite wide ranges (up to 4:1) of absolute values can be obtained with small meshes. A computational method for constructing a lookup table of resistor values for different cut patterns is described     

Electrical trimming of heavily doped polycrystalline silicon resistors

The newly discovered phenomenon of resistance decrease in heavily doped polycrystalline silicon resistors by conduction of high current densiy has been investigated experimentally. Threshold values exist for the impurity concentration and for the applied current density for the occurrence of this phenomenon. Decreased resistance is stable as far as current higher than the threshold value is not applied thereafter. Applications to D/A converters and operational amplifiers are described. Electrical trimming of resistors in the circuits with accuracy of ±0.01 percent is easily attained.     

激光调阻预置式变速光刻控制

全自动激光调阻机是各种薄、厚膜片式电阻的工业化专用生产设备,提高调阻性能是提升设备生产力,降低生产成本,节能增效的主要途径.因此,在原系统基础上对激光调阻中光束定向控制系统进行改进设计,以先验知识为基础,构造预置、简单变速、实时变速等光刻控制模型,得到预置式变速光刻控制方法.它能根据不同的精度、速度要求和片阻初值偏差进行优化决策,实现在激光粗调电阻时,采用快速光刻;在激光精调电阻时,采用慢速光刻.这样不仅动态改变了片阻的光刻阻值变化率,提高了调阻精度,而且缩短了粗调光刻时间,提高了调阻速度,从整体上提高了激光调阻性能.     

High-temperature storage and thermal cycling studies of thick filmand wirewound resistors

The operating ambient temperature for underhood automotive and aerospace applications is increasing. This work was undertaken to evaluate the suitability of thick film and wirewound resistors for distributed aircraft control systems in a 200°C-225°C operating environment. High temperature stability testing of power wirewound and thick film resistors is reported. Dale power wirewound 1 Ω, 100 Ω, and 10 kΩ resistors with power ratings of 5 W and 25 W were tested. The TCR of the 100 Ω, and 10 kΩ resistors was very small, however, the 1 Ω resistor varied by 5% over the temperature range from 25°C to 300°C. Stability with long term storage (10000 h) at 300°C was measured for the wirewound resistors unpowered and powered at 20% of rated power. With the exception of the 10 kΩ/25W resistor, the change in resistance was less than 4%. Wirewound resistors were also thermal cycled 1000 times over a temperature range from -55°C to 225°C with only one failure due to a broken internal connection. Three 900 Series thick film resistor pastes from Heraeus-Cermalloy were studied: 100 Ω/sq., 1 kΩ/sq., 10 kΩ/sq. The temperature coefficient of resistance (TCR) was measured from 27°C to 500°C in 50°C increments. The change in resistance was <±6% up to 300°C. A 2 × 2 matrix of variables was included in the 300°C storage test: untrimmed resistors, resistors trimmed up 50% in value, unpowered, and powered at 1/8 W. Palladium/Silver was the initial termination choice for these 300°C studies, but silver migration under electrical bias lead to electrical shorts between conductor traces on the substrates with powered resistors. Gold terminated thick film resistors were used for powered storage testing at 300°C. The change in resistance after 10000 h at 300°C was < 3% for all test combinations     

Evaluation of electrolessly deposited NiP integral resistors on flexible polyimide substrate

Integral nickel–phosphorus (NiP) resistors were fabricated on flexible polyimide (PI) substrates by electroless NiP deposition. The deposition process was first set up for standard rigid epoxy substrates and then modified for the flexible substrates. The effects of the PI surface modifications on the interfacial adhesion (NiP/PI) were measured experimentally by the pull-off method. The process parameters were optimised to give good adhesion. The mechanical durability of the electrolessly deposited thin film NiP resistors was tested by measuring the electrical resistance during cyclic loading. The results showed the resistors to be mechanically stable. The electrical resistance was also monitored continuously during exposure to corrosive gas environment. The corrosive environment had no significant effect on the resistance of either the electrolessly deposited resistors or the commercial integral resistors used as a reference. The results show that resistors can be fabricated on flexible PI substrate by the described method.     

Intentional overstress trimming of active semiconductor devices

An alternative methodology for adjusting the performance of electronic systems to ensure that they are operating according to the required specifications is described. Intentional electrical overstress is employed to systematically adjust the performance of integrated devices and circuits. It is shown that such an approach can trim selected circuits even after they have been assembled into packages. The trimming approach discussed is based upon the introduction of systematic and repeatable changes in transistor parameters by energetic pulses applied between appropriate terminals of the device. A preliminary reliability assessment of the technique has been performed, and the available results are discussed     

Advanced electrical and stability characterization of untrimmed and variously trimmed thick-film and LTCC resistors

As-fired thick-film resistors have the resistance tolerance within ±20% and this tolerance is increased for smaller components. Therefore the novel trimming methods are necessary for microresistors, especially when they are embedded in LTCC substrate. This paper compares electrical (normalized temperature dependence of resistance, low frequency noise) and stability properties (relative resistance drift, changes of current noise index) of untrimmed, voltage pulse trimmed and laser trimmed unglazed thick-film resistors after step-increased long-term thermal ageing at 162 °C, 207 °C and 253 °C. Moreover the effect of long term exposure (1000 h, 125 °C) and thermal shocks (1000 shocks between −55 °C and 125 °C) is analysed for untrimmed and voltage pulse trimmed buried LTCC resistors.     

Electrical trimming of ion-beam-sputtered polysilicon resistors byhigh current pulses

Phosphorus doped polysilicon resistors have been fabricated from microcrystalline silicon films which were deposited by ion beam sputtering using an argon ion beam of diameter 3 cm, energy 1 keV and current density 7mA/cm², with a deposition rate of 100-120 Å/min. The resistors, having a sheet resistance of 70 Ω/square and a carrier concentration of 7.5×10¹⁹ cm^-3, were stressed with current pulses of width 10 μs and duty cycle 0.6% for 5 min. There was a steady decrease of resistance with increasing pulse current density above a threshold value 5×10 ⁵ A/cm². A maximum fall of 27% was observed for a 95 μm long resistor. The current-voltage characteristics were also recorded during the trimming process. The trimming characteristics were simulated using a small-signal resistivity model of Lu et al. (1983). and the I-V characteristics by a large-bias conduction model. A close fitting of the experimental data with the theoretical values needed an adjustment of some grain boundary parameters for the different pulse current densities used for stressing. The nature of variation of the grain boundary parameters indicates that the rapid Joule heating of the grain boundaries due to current pulses passivates the grain boundary interfaces, at lower currents above the threshold, and then, at higher values of currents, causes zone melting and gradual recrystallization of the disordered boundary layers and subsequent dopant segregation. It confirms the mechanism suggested in the physical model of Kato et al. (1982). The role played by the field-enhanced diffusivity and electromigration of dopant ions, due to the high instantaneous temperature of the grain boundaries, has also been discussed. The pulse trimming technique is simple and does not cause damage to the adjacent components on a monolithic chip     

RuO_2基厚膜电阻电脉冲调阻工艺研究

用厚膜法制备了RuO2基厚膜电阻,研究了电阻值变化与脉冲电压的关系,分析了调阻工艺的特点;测量了电阻的可调整极限,目标值、偏差与初始电阻的特性,最佳阻值调整范围;研究了二次烧结对调整电阻值的影响规律。