Improved Electrical Performance and Reliability of Poly-Si TFTs Fabricated by Drive-In Nickel-Induced Crystallization with Chemical Oxide Layer

Ni-metal-induced crystallization (MIC) of amorphous Si (α-Si) has been employed to fabricate low-temperature polycrystalline silicon thin-film transistors (TFTs). However, the Ni residues degrade the device performance. In this study, a new method for manufacturing MIC–TFTs using drive-in Ni-induced crystallization with a chemical oxide layer (DICC) is proposed. Compared with that of MIC–TFTs, the on/off current ratio (I _on/I _off) of DICC–TFTs was increased by a factor of 9.7 from 9.21 × 10⁴ to 8.94 × 10⁵. The leakage current (I _off) of DICC–TFTs was 4.06 pA/μm, which was much lower than that of the MIC–TFTs (19.20 pA/μm). DICC–TFTs also possess high immunity against hot-carrier stress and thereby exhibit good reliability.     

Crystallization of μc-Si on plastic substrate by using a pulsed double-frequency YAG laser

Thin film transistors （TFTs） of microcrystalline silicon （μc-Si） can provide higher mobility and stability than that of a-Si and better uniformity than that of poly-Si TFTs, and it would be more suitable to be applied to larger-area AMOLEDs. By using 2coYAG laser ann. ealing, crystalline μc-Si thin film on plastic substrate has been investigated and the proper laser energy needed for crystallization has been indicated. It has been found that the dehydrogenation process at 300-450℃ for a few of hours could be omitted by decreasing the H content in the crystallization precursor, which is suitable for laser crystallization on plastic substrates. The crystalline volume fraction （Xc） and the grain size of the resulted μc-Si could be adjusted by controlling the laser energy. By this method, the μc-Si on plastic substrate with Xc and grain size is respectively 85% （at the maximum） and 50 nm.     

Using Phosphorus-Doped α-Si Gettering Layers to Improve NILC Poly-Si TFT Performance

Ni-metal-induced lateral crystallization (NILC) has been utilized to fabricate polycrystalline silicon (poly-Si) thin-film transistors (TFTs). However, the current crystallization technology often leads to trapped Ni and NiSi₂ precipitates, thus degrading device performance. In this study, phosphorus-doped amorphous silicon (p-α-Si) and chemical oxide (chem-SiO₂) films were used as Ni-gettering layers. After a gettering process, the Ni impurity within the NILC poly-Si film and the leakage current were both reduced, while the on/off current ratio was increased. This gettering process is compatible with NILC TFT processes and suitable for large-area NILC poly-Si films.     

Surface-induced highly oriented perylo[1,12-b,c,d]selenophene thin films for high performance organic field-effect transistors

Epitaxial crystallization of perylo[1,12-b,c,d]selenophene (PESE) on highly oriented polyethylene (PE) substrate through vapor phase deposition has been achieved. Oriented PESE crystals with different crystalline morphologies can be fabricated by changing the temperature of PE substrate during vacuum evaporation. When the PE substrate temperature is lower than 70 °C, sparsely dispersed PESE lathlike crystals are produced with their long axis preferentially aligned perpendicular to the chain direction of PE crystals. While the close films of PESE with lathlike crystals aligned with long axis parallel to the chain direction of PE film were obtained above 90 °C. Transistors based on expitaxially crystallized PESE films have been fabricated and the transistor properties were also studied. It is found that transistors show different electrical characteristics depending on the preparation conditions of expitaxially crystallized PESE films. The transistors based on the PESE/PE-SiO₂/Si with PESE deposited on oriented PE film at low temperature, i.e., <70 °C, display a similar poor properties with the PESE/OTS-SiO₂/Si type transistors. However, when the deposition temperature was elevated to 90 °C, the transistors exhibit a maximum field-effect mobility of 4.4 × 10⁻² cm² V⁻¹ s⁻¹ and maximum on/off ratio of 2.0 × 10⁵, which are about 2 orders of magnitudes higher than the PESE/OTS-SiO₂/Si based transistors.     

Thin-film transistors fabricated with poly-Si films crystallized atlow temperature by microwave annealing

Solid phase crystallization of amorphous silicon films for poly-Si thin film transistors (TFTs) has advantages of low cost and excellent uniformity, but the crystallization temperature is too high. Using a microwave annealing method, we lowered the crystallization temperature and shortened the crystallization time. The complete crystallization time at 550°C was within 2 h. The device parameters of TFTs with the poly-Si films crystallized by microwave annealing were similar to those of TFTs with the poly-Si films crystallized by conventional furnace annealing. The new crystallization method seems attractive because of low crystallization temperature, short crystallization time, and comparable film properties     

High performance low temperature metal-induced unilaterallycrystallized polycrystalline silicon thin film transistors forsystem-on-panel applications

Thin film transistors (TFTs) with low-temperature processed metal-induced laterally crystallized (MILC) channels and self-aligned metal-induction crystallized (MIC) source and drain regions have been demonstrated recently as potential devices for realizing electronics on large-area, inexpensive glass panels. While these TFTs are better than their solid-phase crystallized counterparts in many device performance measures, they suffer from higher off-state leakage current and early drain breakdown. A new technology is proposed, employing metal-induced-unilateral crystallization (MIUC), which results in the removal from the edges of and within the channel region all major grain boundaries transverse to the drain current flow. Compared to the conventional “bilateral” MILC TFTs, the new MIUC devices are shown to have higher field-effect mobility, significantly reduced leakage current, better immunity to early drain breakdown, and much improved spatial uniformity of the device parameters. Thus they are particularly suitable for realizing low temperature CMOS systems on inexpensive glass panels     

Out-of-plane thermal expansion coefficient of biphenyldianhydride-phenylenediamine polyimide film

The out-of-plane thermal expansion coefficient α_⊥ of biphenyldianhydride-phenylenediamine (BPDA-PDA) polyimide thin film between 20 and 400°C has been measured using a laser spot scanning interferometer. The α_⊥ varies from 100 ppm/°C at 20°C to 400 ppm/°C at 400°C. As the result of highly anisotropic microstructure, the α_⊥ is much larger than the in-plane thermal expansion coefficient α_∥ and increases dramatically when the temperature exceeds the glass transition temperature (≈320°C).     

Distribution of Elements in a Cu-Added FeSi<Subscript>2</Subscript> Alloy Under Peritectoid and Eutectoid Reactions

The distribution of Si, Fe, and Cu in FeSi₂ alloys, with or without the addition of Cu, were studied by electron probe microanalysis (EPMA). Alloys were prepared by slow solidification from the melt. Without Cu addition, both ε- and α-phases were clearly observed, and a β-phase surrounding the ε-phase was additionally observed after in situ annealing at 950°C for 12 h. With inclusion of 0.5 at.% Cu, the eutectoid reaction (α → β + Si) was enhanced greatly. Only 0.01 at.% Cu was dissolved into the ε-phase, with the excess Cu atoms being largely found at the outer edge of the ε-phase. Ex situ annealing at 950°C for 12 h greatly changed the distribution of Si, Fe, and Cu. The ε-phase changed its Si/Fe atomic ratio from 1.470 to 1.907, indicating an early stage of the peritectoid reaction (ε + α → β) and/or the subsequent reaction (ε + Si → β), with an increase in the Cu content up to 0.04 at.%. The size of this new phase was smaller than the original ε-phase, and this new phase was surrounded by a shell of Si/Fe with an atomic ratio of 0.727 to 1.788 and a Cu content of 0.01 at.% to 0.11 at.%. In situ annealing under the same condition yielded different results: a large amount of Si segregates from the α-phase matrix, leaving a Si/Fe atomic ratio of only 0.506 to 0.530. The peritectoid reaction of the ε-phase was found to depend on the Cu content. For the ε-phase with undetectable levels of Cu, the Si/Fe atomic ratio remained at 0.954 to 0.998, but this ratio decreased with increasing Cu content to 0.55 at 2.20 at.% Cu. A plot of at.% Cu versus Si/Fe atomic ratio revealed a local minimum at the ε-phase and expectedly at both the β- and α-phases. Nonstoichiometric structures (neither α-, β- nor ε-phases) seemed to have higher at.% Cu compared with those with the closest Si/Fe composition.     

Cw laser crystallization of glow discharge a-Si:H on glass substrates

Glow discharge hydrogenated amorphous Si films were crystallized using a cw Ar laser. The properties of the crystallized films were studied by optical and electron microscopy, electrical measurements and elastic recoil detection (ERD) analysis. In addition, a preferential plasma etching technique was used to determine the degree of crystallization. Large (>3 μm) high quality crystallites were induced above a threshold laser power of 100 W/cm by an explosive crystallization process. This was accompanied by the formation of bubbles and ejection of material from the crystallization centers. The sheet resistivity decreased by five to six orders of magnitude. Some 50–90% of the hydrogen remained in the films after laser annealing. A simple model shows that solid state diffusion accounts for the final hydrogen distribution in the laser annealed films. The use of this material for the fabrication of devices on glass substrates is discussed.     

Solid phase crystallization of amorphous silicon on glass by thin film heater for thin film transistor (TFT) application

A new process for solid phase crystallization (SPC) of amorphous silicon (a-Si) using thin film heater is reported. With this localized Ti silicide thin film heater, we successfully crystallized 500 Å-thick a-Si in a few minutes without any thermal deformation of glass substrate. The size of crystallized silicon grain was abnormally big (30-40 μm). Polycrystalline thin film transistors (TFT) fabricated using this unique thin film heater showed better mobility than those of conventional ones by furnace annealing.     

Electrical Properties of Organic–Inorganic Semiconductor Device Based on Rhodamine-101

Rhodamine-101 (Rh101) thin films on n-type Si substrates have been formed by means of evaporation, thus Sn/Rh101/n-Si heterojunctions have been fabricated. The Sn/Rh101/n-Si devices are rectifying. The optical energy gaps have been determined from the absorption spectra in the wavelength range of 400 nm to 700 nm. Rh101 has been characterized by direct optical absorption with an optical edge at 2.05 ± 0.05 eV and by indirect optical absorption with␣an optical edge at 1.80 ± 0.05 eV. It was demonstrated that trap-charge-limited current is the dominant transport mechanism at large forward bias. A␣mobility value of μ = 7.31 × 10⁻⁶ cm² V⁻¹ s⁻¹ for Rh101 has been obtained from the forward-bias current–voltage characteristics.     

Nano-graphoepitaxy of semiconductors for 3D integration

The advantages of integrating semiconductor devices at more than one level (‘3D integration’) are now recognized. Key to achieving monolithic 3DICs is the ability to form single crystal semiconductor islands at the upper level without unduly heating the lower level structures. In prior work a surface relief grating of 3.8 μm pitch in the substrate was used to mediate single crystal formation while continuous wave (CW) heating a thin film of amorphous silicon; the term ‘graphoepitaxy’ was coined. CW heating is not possible in our case because it would overheat the lower layers. Moreover the area of the crystallites need only be about 100 nm to accommodate today’s transistors. Thus we have chosen a substrate grating pitch of 190 nm (hence the term ‘nano-graphoepitaxy’) and a modulated CW laser to reduce the heating time to several μs. Preliminary results indicate the substrate grating lines can indeed determine the position of the crystallite boundaries when the film thickness is 100 nm; the effect is much less pronounced in 500 nm thick films.     

2.3-μm High-Power Type I Quantum-Well GaInAsSb/AlGaAsSb/GaSb Laser Diode Arrays with Increased Fill Factor

Arrays of 100-μm-wide GaInAsSb/AlGaAsSb laser diode emitters with a fill factor of 30% have been fabricated. Suppression of lateral lasing was achieved by the incorporation of grooves between the emitters. A quasi-continuous wave (CW) (30 μs, 300 Hz) output power of 16.7 W from a 4-mm-long laser bar has been demonstrated.     

Investigation of energy levels of Er-impurity centers in Si by the method of ballistic electron emission spectroscopy

The method of ballistic electron emission spectroscopy is used for the first time to study the energy spectrum of Er-impurity complexes in Si. The features are observed in the ballistic electron spectra of mesa diodes based on p ⁺-n ⁺ Si structures with a thin (∼30 nm) p ⁺-Si:Er surface layer in the region of ballistic-electron energies eV _t lower than the conduction-band-edge energy E _c in this layer. They are associated with the tunnel injection of ballistic electrons from the probe of the scanning tunnel microscope to the deep donor levels of the Er-impurity complexes in the p ⁺-Si:Er layer with subsequent thermal excitation into the conduction band and the diffusion to the p ⁺-n ⁺ junction and the direct tunneling in it. To verify this assumption, the ballistic-electron transport was simulated in the system of the Pt probe, native-oxide layer SiO₂-p ⁺-Si:Er-n ⁺, and Si substrate. By approximating the experimental ballistic-electron spectra with the modeling spectra, the ground-state energy of the Er complex in Si was determined: E _d ≈ E _c − 0.27 eV. The indicated value is consistent with the data published previously and obtained from the measurements of the temperature dependence of the free-carrier concentration in Si:Er layers.     

Fabrication and Electrical Characterization of Heterojunction Mn-Doped GaN Nanowire Diodes on <Emphasis Type="Italic">n</Emphasis>-Si Substrates (GaN:Mn NW/<Emphasis Type="Italic">n</Emphasis>-Si)

We demonstrated that manganese (Mn)-doped GaN nanowires (NWs) exhibit p-type characteristics using current–voltage (I–V) characteristics in both heterojunction p–n structures (GaN:Mn NWs/n-Si substrate) and p–p structures (GaN:Mn NWs/p-Si). The heterojunction p–n diodes were formed by the coupling of the Mn-doped GaN NWs with an n-Si substrate by means of an alternating current (AC) dielectrophoresis-assisted assembly deposition technique. The GaN:Mn NWs/n-Si diode showed a clear current-rectifying behavior with a forward voltage drop of 2.4 V to 2.8 V, an ideality factor of 30 to 37, and a parasitic resistance in the range of 93 kΩ to 130 kΩ. On the other hand, we observed that other heterojunction structures (GaN:Mn NWs/p-Si) showed no rectifying behaviors as seen in p–p junction structures.     

Reduced leakage current of nickel induced crystallization poly-Si TFTs by a simple chemical oxide layer

Ni-metal-induced crystallization (MIC) of amorphous Si (α-Si) has been used to fabricate low-temperature polycrystalline silicon (poly-Si) thin-film transistors (TFTs). However, the leakage current of MIC-TFT is high. In this study, a chemical oxide layer was used to avoid excess of Ni atoms into α-Si layer during MIC process, which was simple and without extra expensive instrument. The minimum leakage current and on/off current ratio were significantly improved.     

Electric field-enhanced metal-induced lateral crystallization and P-channel poly-Si TFTs fabricated by it

The poly-Si thin film was obtained by electric field-enhanced metal-induced lateral crystallization technique at low temperature. Raman spectra, X-ray diffraction (XRD) and scan electron microscope (SEM) were used to analyze the crystallization state, crystal structure and surface morphology of the poly-Si thin film. Results show that the poly-Si has good crystallinity, and the electric field has the effect of enhancing the crystallization when DC electric voltage is added to the film during annealing. Secondary ion mass spectroscopy (SIMS) shows that the metal Ni improves the crystallization by diffusing into the a-Si thin film, so the crystallization of the lateral diffused region of Ni is the best. The p-channel poly-Si thin film transistors (TFTs) were fabricated by this large-size grain technique. The I_DS−V_DS and the transfer characteristics of the TFTs were measured, from which, the hole mobility of TFTs was 65 cm²/V s, the on and off current ratio was 5×10⁶. It is a promising method to fabricate high-performance poly-Si TFTs at low temperature for applications in AMLCD and AMOLED.     

XeCl Excimer laser annealing used in the fabrication of poly-Si TFT's

Mo-gate n-channel poly-Si thin-film transistors (TFT's) have been fabricated for the first time at a low processing temperature of 260°C. A 500-1000-A-thick a-Si:H was successfully crystallized by XeCl excimer laser (308nm) annealing without heating a glass substrate. TFT's were fabricated in the crystallized Si film. The channel mobility of the TFT was 180cm²/V.s when the a-Si:H was crystallized by annealing with a laser having an energy density of 200 mJ/cm². This result shows that high-speed silicon devices can be fabricated at a low temperature using XeCl excimer laser annealing.     

蒽基磷酸衍生物自组装膜修饰的有机薄膜晶体管

本工作主要介绍一种利用新型磷酸衍生物作为分子自组装膜来修饰二氧化硅介电层,从而提升有机薄膜晶体管性能的方法。将红荧烯真空蒸镀到这种分子自组装膜修饰的基片表面制备的晶体管其空穴迁移率为0.18cm2/Vs , 比裸二氧化硅作介电层的晶体管性能有10多倍的性能提升。研究表面这种磷酸衍生物自组装膜在促进红荧烯蒸镀成膜方面有特殊作用,可以诱导其形成有序结晶膜,从而提高晶体管整体性能。     

High Q-Factor and Low Threshold Continuous-Wave Near-Infrared Lasing with Quasi-2D Perovskites

Quasi-2D perovskites have shown great potential in achieving solution-processed electrically pumped laser diodes due to their multiple-quantum-well structure, which induces a carrier cascade process that can significantly enhance population inversion. However, continuous-wave (CW) optically pumped lasing has yet to be achieved with near-infrared (NIR) quasi-2D perovskites due to the challenges in obtaining high-quality quasi-2D films with suitable phase distribution and morphology. This study regulates the crystallization of a NIR quasi-2D perovskite ((NMA)₂FA_n−1Pb_nI_3n+1) using an 18-crown-6 additive, resulting in a compact and smooth film with a largely improved carrier cascade efficiency. The amplified spontaneous emission threshold of the film is reduced from 47.2 to 35.9 µJ cm⁻². Furthermore, by combining the film with a high-quality distributed feedback grating, this study successfully realizes a CW NIR laser of 809 nm at 110 K, with a high Q-factor of 4794 and a low threshold of 911.6 W cm⁻². These findings provide an important foundation for achieving electrically pumped laser diodes based on the unique quasi-2D perovskites.