Hf-doped Ta2O5 stacks under constant voltage stress

The stress-induced leakage current in Hf-doped Ta₂O₅ layers (7; 10 nm) under constant voltage stress at gate injection was investigated in order to assess the mechanisms of conduction, the traps involved and the effect of Hf doping. The amount of Hf is found to affect the conduction mechanisms, the temperature dependence of the leakage current and the current response to the stress. A significant leakage current increase is observed only when the stress voltage and/or stress time exceed the corresponding threshold values, where the charge trapping at the pre-existing traps dominates below and defect generation above these threshold values. The energy levels of the traps responsible for the current transport are estimated. The stress effect on dominant conduction mechanisms appears quite weak, and the nature of the traps controlling the current transport before and after the stress seems to be nearly identical. The results indicate that the constant voltage stress affects the pre-existing traps in Hf-doped Ta₂O₅ and modifies their parameters, but there is no evidence for stress-induced generation of traps with completely new nature different from oxygen-vacancy related defects.     

High-k HfO2-Ta2O5 mixed layers: Electrical characteristics and mechanisms of conductivity

Electrical properties of mixed HfO₂-Ta₂O₅ films (10;15 nm) deposited by rf sputtering on Si have been studied from the view point of their applications as high-k layers, by standard capacitance-voltage and temperature dependent current-voltage characteristics. The effect of HfO₂ addition to the Ta₂O₅ is thickness dependent and the thicker layers exhibit advantages over the pure Ta₂O₅ (higher dielectric constant, enhanced charge storage density and improved interface quality). The process of HfO₂ and Ta₂O₅ mixing introduces negative oxide charge, tends to creates shallow bulk traps and modifies the dominant conduction mechanisms in the stack capacitors as compared to the Ta₂O₅-based one (a contribution of tunneling processes through traps located below the conduction band of mixed layers to the leakage current in the HfO₂-Ta₂O₅ stacks is observed). The traps involved in both Poole-Frenkel and tunneling processes are identified.     

Influence of the metal electrode on the characteristics of thermal Ta2O5 capacitors

The effect of various electrodes (Al, W, TiN) deposited by evaporation (Al) and sputtering (W, TiN) on the electrical characteristics of thermal thin film (15-35 nm) Ta₂O₅ capacitors has been investigated. The absolute level of leakage currents, breakdown fields, mechanism of conductivity, dielectric constant values are discussed in the terms of possible reactions between Ta₂O₅ and electrode material as well as electrode deposition process-induced defects acting as electrically active centers. The dielectric constant values are in the range 12-26 in dependence on both Ta₂O₅ thickness and gate material. The results show that during deposition of TiN and Al a reaction that worsens the properties of Ta₂O₅ occurs while there is not an indication for detectable reduction of Ta₂O₅ when top electrode is W, and the leakage current is 5-7 orders of magnitude lower as compared to Al and TiN-electroded capacitors. The high level of leakage current for TiN and Al gate capacitors are related to the radiation defects generated in Ta₂O₅ during sputtering of TiN, and damaged interface at the electrode due to a reaction between Al and Ta₂O₅, respectively. It is demonstrated that the quality of the top electrode affects the electrical characteristics of the capacitors and the sputtered W is found to be the best. The sputtered W gate provides Ta₂O₅ capacitors with a good quality: the current density <7 × 10⁻¹⁰ A/cm² at 1 V (0.7 MV/cm, 15 nm thick Ta₂O₅). W deposition is not accompanied by an introduction of a detectable damage leading to a change of the properties of the initial as-grown Ta₂O₅ as in the case of TiN electrode. Damage introduced during TiN sputtering is responsible for current deterioration (high leakage current) and poor breakdown characteristics. It is concluded that the sputtered W top electrode is a good candidate as a top electrode of storage capacitors in dynamic random access memories giving a stable contact with Ta₂O₅, but sputtering technique is less suitable (favorable) for deposition of TiN as a metal electrode due to the introduction of radiation defects causing both deterioration of leakage current and poor breakdown characteristics.     

Structural and optical properties on thulium-doped LHPG-grown Ta2O5 fibres

Structural, spectroscopic and dielectric properties of thulium-doped laser-heated pedestal Ta₂O₅ as-grown fibres were studied. Undoped samples grow preferentially with a single crystalline monoclinic structure. The fibre with the lowest thulium content (0.1 at%) also shows predominantly a monoclinic phase and no intra-4f¹² Tm³⁺ recombination was observed. For sample with the highest thulium amount (1.0 at%), the appearance of a dominant triclinic phase as well as intraionic optical activation was observed. The dependence of photoluminescence on excitation energy allows identification of different site locations of Tm³⁺ ions in the lattice. The absence of recombination between the first and the ground-state multiplets as well as the temperature dependence of the observed transitions was justified by an efficient energy transfer between the Tm³⁺ ions. Microwave dielectric properties were investigated using the small perturbation theory. At a frequency of 5 GHz, the undoped material exhibits a dielectric permittivity of 21 and for thulium-doped Ta₂O₅ samples it decreases to 18 for the highest doping concentration. Nevertheless, the dielectric losses maintain a very low value.     

Electrical and interfacial characteristics of nanolaminate (Al2O3/ZrO2/Al2O3) gate stack on fully depleted SiGe-on-insulator

The structural and electrical characteristics of a novel nanolaminate Al₂O₃/ZrO₂/Al₂O₃ high-k gate stack together with the interfacial layer (IL) formed on SiGe-on-insulator (SGOI) substrate have been investigated. A clear layered Al₂O₃ (2.5 nm)/ZrO₂ (4.5 nm)/Al₂O₃ (2.5 nm) structure and an IL (2.5 nm) are observed by high-resolution transmission electron microscopy. X-ray photoelectron spectroscopy measurements indicate that the IL contains Al-silicate without Ge atom incorporation. A well-behaved C–V behavior with no hysteresis shows the absence of Ge pileup or Ge segregation at the gate stack/SiGe interface.     

Electrical properties of SiO2/TiO2 high-k gate dielectric stack

The trapping/detrapping behavior of charge carriers in ultrathin SiO₂/TiO₂ stacked gate dielectric during constant current (CCS) and voltage stressing (CVS) has been investigated. Titanium tetrakis iso-propoxides (TTIP) was used as the organometallic source for the deposition of ultra-thin TiO₂ films at low temperature (<200 °C) on strained-Si/relaxed-Si_0.8Ge_0.2 heterolayers by plasma-enhanced chemical vapor deposition (PECVD) in a microwave (700 W, 2.45 GHz) plasma cavity discharge system at a pressure of 66.67 Pa. Stress-induced leakage current (SILC) through SiO₂/TiO₂ stacked gate dielectric is modeled by taking into account the inelastic trap-assisted tunneling (ITAT) mechanism via traps located below the conduction band of TiO₂ layer. The increase in the gate current density observed during CVS from room temperature up to 125 ^oC has been analyzed and modeled considering both the buildup of charges in the layer as well as the SILC contribution. Trap generation rate and trap cross-section are extracted. A capture cross-section in the range of 10⁻¹⁹ cm² as compared to 10⁻¹⁶ cm² in SiO₂ has been observed. A temperature-dependent trap generation rate and defects have also been investigated using time-dependent current density variation during CVS. The time dependence of defect density variation is calculated within the dispersive transport model, assuming that these defects are produced during random hopping transport of positively charge species in the insulating high-k stacked layers. SILC generation kinetics, i.e. defect generation probability under different injected fluences for various high-constant stress voltages in both polarities have been studied. An empirical relation between trap generation probability and applied stress voltage for various injected fluences has been developed.     

Towards metal electrode interface scavenging of rare-earth scandates: A Sc2O3 and Gd2O3 study

Amorphous Gd₂O₃ and Sc₂O₃ thin films were deposited on Si by high-pressure sputtering (HPS). In order to reduce the uncontrolled interfacial SiO_x growth, firstly a metallic film of Gd or Sc was sputtered in pure Ar plasma. Subsequently, they were in situ plasma oxidized in an Ar/O₂ atmosphere. For post-processing interfacial SiO_x thickness reduction, three different top metal electrodes were studied: platinum, aluminum and titanium. For both dielectrics, it was found that Pt did not react with the films, while Al reacted with them forming an aluminate-like interface and, finally, Ti was effective in scavenging the SiO₂ interface thickness without severely compromising gate dielectric leakage.     

Hot carrier effects in n-MOSFETs with SiO2/HfO2/HfSiO gate stack and TaN metal gate

Charge trapping and trap generation in field-effect transistors with SiO₂/HfO₂/HfSiO gate stack and TaN metal gate electrode are investigated under uniform and non-uniform charge injection along the channel. Compared to constant voltage stress (CVS), hot carrier stress (HCS) exhibits more severe degradation in transconductance and subthreshold swing. By applying a detrapping bias, it is demonstrated that charge trapping induced degradation is reversible during CVS, while the damage is permanent for hot carrier injection case.     

Characterization of the annealing impact on La2O3/HfO2 and HfO2/La2O3 stacks for MOS applications

The impact of various rapid thermal annealing used during the integration on the La₂O₃/HfO₂ and HfO₂/La₂O₃ stacks deposited by Atomic Layer deposition was analyzed. The consequences of lanthanum localization in such stacks on the evolution of the films during the rapid thermal annealing are investigated in term of morphology, crystalline structure, silicate formation and film homogeneity as a function of the depth. It appeared that the La₂O₃ location has an impact on the temperature of the quadratic phase formation which could be linked to the formation of SiOHfLa silicate and the resistance of the films to dissolution in HF 0.05 wt%.     

Improved retention characteristic of charge-trapped flash device with sealing layer/Al2O3 or Al2O3/high-k stacked blocking layers

Although programming and erase speeds of charge trapping (CT) flash memory device are improved by using Al₂O₃ as blocking layer, its retention characteristic is still a main issue. CT flash memory device with Al₂O₃/high-k stacked blocking layer is proposed in this work to enhance data retention. Moreover, programming and erase speeds are slightly improved. In addition, sealing layer (SL), which is formed by an advanced clustered horizontal furnace between charge trapping layer and Al₂O₃ as one of the blocking layers is also studied. The retention characteristic is enhanced by SL approach due to lower gate leakage current with less defect. With the combination of SL and Al₂O₃/high-k stacked blocking layer approaches, retention property can be further improved.     

Trap parameters and conduction mechanism in HfO2-Ta2O5 mixed stacks in response to microwave irradiation

The effect of microwave treatment at room temperature on the leakage current and mechanisms of conductivity in mixed HfO₂-Ta₂O₅ (10 nm) stacks has been studied by temperature dependent (20-100 °C) current-voltage characteristics. It was established that the short term irradiation (∼6 s) affects the electrically active centers in the mixed oxide, provokes modification of the dominant conduction mechanism at about and above 1 MV/cm and improves the temperature stability of capacitors manifesting as low level of current at high temperatures (current decrease up to two orders of magnitude at 100 °C after the treatment is detected). The traps involved in the conduction processes in pre- and post-irradiation capacitors are identified. The longer exposure (10-15 s) is effective in a significant reduction of leakage current (up to 3-4 orders of magnitude in wide range of applied voltages). The potential of microwave treatment at room temperature as technological step for improving the temperature stability of leakage current in high-k stacked capacitors is discussed.     

Time-dependent-dielectric-breakdown characteristics of Hf-doped Ta2O5/SiO2 stack

The Time-Dependent-Dielectric Breakdown (TDDB) characteristics of MOS capacitors with Hf-doped Ta₂O₅ films (8 nm) have been analyzed. The devices were investigated by applying a constant voltage stress at gate injection, at room and elevated temperatures. Stress voltage and temperature dependences of hard breakdown of undoped and Hf-doped Ta₂O₅ were compared. The doped Ta₂O₅ exhibits improved TDDB characteristics in regard to the pure one. The maximum voltage projected for a 10 years lifetime at room temperature is −2.4 V. The presence of Hf into the matrix of Ta₂O₅ modifies the dielectric breakdown mechanism making it more adequate to the percolation model. The peculiarities of Weibull distribution of dielectric breakdown are discussed in terms of effect of three factors: nature of pre-existing traps and trapping phenomena; stress-induced new traps generation; interface layer degradation.     

Effect of thin Si insertion at metal gate/high-k interface on electrical characteristics of MOS device with La2O3

The effect of a thin Si layer insertion at W/La₂O₃ interface on the electrical characteristics of MOS capacitors and transistors is investigated. A suppression in the EOT increase can be obtained with Si insertion, indicating the inhibition of diffusion of oxygen atoms into La₂O₃ layer by forming an amorphous La-silicate layer at the W/La₂O₃ interface. In addition, positive shifts in V_fb and V_th caused by Si insertion implies the formation of amorphous La-silicate layer at the top of La₂O₃ dielectrics reduces the positive fixed charges induced by the metal electrode. Consequently, a large improvement in mobility has been confirmed for both at peak value and at high E_eff of 1 MV/cm with Si inserted nFETs. Although a degradation trend on EOT scaling has been observed, the insertion of thin Si layer is effective in pushing the scaling limit.     

Thin titanium oxide films deposited by e-beam evaporation with additional rapid thermal oxidation and annealing for ISFET applications

Titanium oxide (TiO₂) has been extensively applied in the medical area due to its proved biocompatibility with human cells [1]. This work presents the characterization of titanium oxide thin films as a potential dielectric to be applied in ion sensitive field-effect transistors. The films were obtained by rapid thermal oxidation and annealing (at 300, 600, 960 and 1200 °C) of thin titanium films of different thicknesses (5 nm, 10 nm and 20 nm) deposited by e-beam evaporation on silicon wafers. These films were analyzed as-deposited and after annealing in forming gas for 25 min by Ellipsometry, Fourier Transform Infrared Spectroscopy (FTIR), Raman Spectroscopy (RAMAN), Atomic Force Microscopy (AFM), Rutherford Backscattering Spectroscopy (RBS) and Ti-K edge X-ray Absorption Near Edge Structure (XANES). Thin film thickness, roughness, surface grain sizes, refractive indexes and oxygen concentration depend on the oxidation and annealing temperature. Structural characterization showed mainly presence of the crystalline rutile phase, however, other oxides such Ti₂O₃, an interfacial SiO₂ layer between the dielectric and the substrate and the anatase crystalline phase of TiO₂ films were also identified. Electrical characteristics were obtained by means of I-V and C-V measured curves of Al/Si/TiO_x/Al capacitors. These curves showed that the films had high dielectric constants between 12 and 33, interface charge density of about 10¹⁰/cm² and leakage current density between 1 and 10⁻⁴ A/cm². Field-effect transistors were fabricated in order to analyze I_D x V_DS and log I_D × Bias curves. Early voltage value of −1629 V, R_OUT value of 215 MΩ and slope of 100 mV/dec were determined for the 20 nm TiO_x film thermally treated at 960 °C.     

Initial leakage current related to extrinsic breakdown in HfO2/Al2O3 nanolaminate ALD dielectrics

Multiple successive breakdown events are reported for HfO₂/Al₂O₃ nanolaminate dielectrics grown by atomic-layer deposition. The first breakdown distribution is not a Weibull distribution and shows a long TBD tail at high failure percentiles. Analysis of the correlation between time-to-breakdown and initial current leakage allows identifying this tail with extrinsic breakdown. Screening of the data to eliminate the extrinsic tail demonstrates that the successive breakdown events are completely uncorrelated and perfectly match the successive breakdown theory. The statistical correlation between initial current and extrinsic breakdown distribution is explained in terms of variations of the unintentional interfacial SiO_x layer at the silicon substrate/dielectric interface.     

Metal gates and gate-deposition-induced defects in Ta2O5 stack capacitors

The effect of various electrodes (Al, W, TiN) deposited by evaporation (Al) and sputtering (W, TiN) on the electrical characteristics of Ta₂O₅ stack capacitors has been investigated. The leakage currents, breakdown fields, mechanism of conductivity and dielectric constant are discussed in the terms of possible reactions between Ta₂O₅ and electrode material as well as electrode-deposition-process-induced defects acting as electrically active centers. During deposition of TiN and Al a reaction that worsens the properties of Ta₂O₅ occurs while there is not an indication for detectable reduction of Ta₂O₅ when top electrode is W. The sputtered W top electrode is a good candidate as a gate of storage capacitors in DRAMs, but sputtering technique is less suitable for deposition of TiN due to the introduction of radiation defects causing deterioration of leakage current. Although some reaction between Al and Ta₂O₅ occurs, the resulting electrical properties of the capacitors are still acceptable.     

Resistive switching effects of HfO2 high-k dielectric

Resistive switching behavior of HfO₂ high-k dielectric has been studied as a promising candidate for emerging non-volatile memory technology. The low resistance ON state and high resistance OFF state can be reversibly altered under a low SET/RESET voltage of ±3 V. The memory device shows stable retention behavior with the resistance ratio between both states maintained greater than 103. The bipolar nature of the voltage-induced hysteretic switching properties suggests changes in film conductivity related to the formation and removal of electronically conducting paths due to the presence of oxygen vacancies induced by the applied electric field. The effect of annealing on the switching behavior was related to changes in compositional and structural properties of the film. A transition from bipolar to unipolar switching behavior was observed upon O₂ annealing which could be related to different natures of defect introduced in the film which changes the film switching parameters. The HfO₂ resistive switching device offers a promising potential for high density and low power memory application with the ease of processing integration.     

Atomic oxygen-assisted molecular beam deposition of Gd2O3 films for ultra-scaled Ge-based electronic devices

The atomic oxygen-assisted molecular beam deposition of Gd₂O₃ films on Ge(0 0 1) substrates has been performed at various growth temperatures. The compositional aspects, the interface details and the surface structure have been investigated by in situ X-ray photoelectron spectroscopy, time-of-flight secondary ion mass spectroscopy and in situ atomic force microscopy, and ex situ. The interface layer of GeO₂ has been subsequently fabricated by means of atomic oxygen exposure in order to passivate the high-k/Ge interface. The electrical characterization on the final Gd₂O₃/GeO₂/Ge structure has been reported. The electrical characterization on the Al gate/Gd₂O₃/GeO₂/Ge structure exhibits a MOS behavior, indicating the beneficial effect of GeO₂ passivation.     

Al-oxynitrides as a buffer layer for Pr2O3/SiC interfaces

We elaborate the possibility of combining high-k dielectrics with wide band gap semiconductors, i.e. Pr₂O₃ on SiC. The thermal stability of interfacial aluminum oxynitride (AlON) layers between Pr-oxide and SiC has been investigated by synchrotron radiation photoemission spectroscopy (SRPES). The interface of Pr₂O₃ with SiC is reactive. Such reaction is successfully prevented by utilizing a stable interlayer derived from AlON. No elemental carbon is observed in detectable amount after Pr-Oxide deposition on AlON covered 3C-SiC and subsequent vacuum annealing. After vacuum annealing at 500 °C AlON transformed to AlN and Pr-aluminate with a small amount of CN close to the SiC surface which were thermally stable even at 900 °C. AlON hence provides a good diffusion barrier between Pr-oxide dielectric and 3C-SiC.     

X-ray metrology for high-k atomic layer deposited HfxZr1−xO2 films

Hafnium-based dielectrics are the most promising material for SiO₂ replacement in future nodes of CMOS technology. While devices that utilize HfO₂ gate dielectrics suffer from lower carrier mobility and degraded reliability, our group has recently reported improved device characteristics with a modified Hf_xZr_1−xO₂ [R.I. Hegde, D.H. Triyoso, P.J. Tobin, S. Kalpat, M.E. Ramon, H.-H. Tseng, J.K. Schaeffer, E. Luckowski, W.J. Taylor, C.C. Capasso, D.C. Gilmer, M. Moosa, A. Haggag, M. Raymond, D. Roan, J. Nguyen, L.B. La, E. Hebert, R. Cotton, X.-D. Wang, S. Zollner, R. Gregory, D. Werho, R.S. Rai, L. Fonseca, M. Stoker, C. Tracy, B.W. Chan, Y.H. Chiu, B.E. White, Jr., in: Technical Digest - International Electron Devices Meet, vol. 39, 2005, D.H. Triyoso, R.I. Hegde, J.K. Schaeffer, D. Roan, P.J. Tobin, S.B. Samavedam, B.E. White, Jr., R. Gregory, X.-D. Wang, Appl. Phys. Lett. 88 (2006) 222901]. These results have lead to evaluation of X-ray reflectivity (XRR) for monitoring high-k film thickness and control of Zr addition to HfO₂ using measured film density. In addition, a combination of XRR and spectroscopic ellipsometry (SE) is shown to be a fast and non-intrusive method to monitor thickness of interfacial layer between high-k and the Si substrate.